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Low-noise metamorphic HEMTs with reflowed 0.1 mu m T-gate

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348 IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 6, JUNE 2004

Low-Noise Metamorphic HEMTs

With Reflowed 0.1-

m T-Gate

Y. C. Lien, Edward Yi Chang, Member, IEEE, H. C. Chang, L. H. Chu, G. W. Huang, Member, IEEE, H. M. Lee,

C. S. Lee, S. H. Chen, P. T. Shen, and C. Y. Chang, Fellow, IEEE

Abstract—A 0.1- m T-gate fabricated using e-beam

lithog-raphy and thermally reflow process was developed and applied to the manufacture of the low-noise metamorphic high electron-mobility transistors (MHEMTs). The T-gate developed using the thermally reflowed e-beam resist technique had a gate length of 0.1 m and compatible with the MHEMT fabrication process. The MHEMT manufactured demonstrates a cutoff frequency of 154 GHz and a maximum frequency max of 300 GHz. The noise figure for the 160 m gate-width device is less than 1 dB and the associated gain is up to 14 dB at 18 GHz. This is the first report of a 0.1 m MHEMT device manufactured using the reflowed e-beam resist process for T-gate formation.

Index Terms—Cutoff frequency, e-beam, gate length,

max-imum frequency, metamorphic high electron-mobility transistors (MHEMTs), noise figure (NF), T-gate, thermally reflow.

I. INTRODUCTION

F

OR THE high-frequency wireless applications, meta-morphic HEMTs (MHEMTs) using an In Al As–In Ga As heterostructure grown on GaAs substrate [1], [2] constitutes a good alternative to pseudomorphic AlGaAs–InGaAs–GaAs HEMTs (PHEMTs) and to lattice matched InAlAs–InGaAs–InP HEMTs (InP-HEMTs). For the MHEMT devices, a strain relaxed, compositionally graded metamorphic buffer layer is used to accommodate the large lattice mismatch between the top layers and the substrate. The MHEMT has received much attention recently due to its capability to combine the advantage of the InP-based structure and the GaAs substrate and has demonstrated excellent elec-trical performance for high-frequency applications [3], [4]. In order to achieve superior RF performance for high-frequency applications, short gate length is required for the compound semiconductor field effect transistors. The gain and noise characteristics of the MHEMTs at high frequency are strongly dependent on the gate length (Lg) and the gate resistance values. T-shaped gates are generally used for the HEMTs to maximize the device performance.

Manuscript received January 12, 2004. This work was supported by the National Science Council of Taiwan, R.O.C., under Contract NSC912215E009036. The review of this letter was arranged by Editor D. Ritter.

Y. C. Lien, E. Y. Chang, H. C. Chang, L. H. Chu, H. M. Lee, C. S. Lee, S. H. Chen, and P. T. Shen are with the Department of Materials Science and Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C. (e-mail: edc@cc.nctu.edu.tw).

G. W. Huang is with National Nano Device Laboratories, Hsinchu 30050, Taiwan, R.O.C.

C. Y. Chang is with the Department of Electronics Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C.

Digital Object Identifier 10.1109/LED.2004.829027

Different lithography methods have been developed for the submicrometer T-gates in recent years [5], [6]. For example, multilayer photo resist processes have been used to obtain submicrometer T-shaped gates [7]. In order to further improve device performance, dielectric deposition process with etching back technology have been widely used to form dielectric sidewall and shrink the gate length that is originally limited by the lithography resolution [8]. However, tightly controlled process and relatively complicated steps with long process time are required for these processes.

The thermally reflowed resist process is another approach for gate shrinkage and has previous been reported [9], [10]. However, thermally reflow of e-beam photo resist to achieve sub-0.1- m T-gate for MHEMT application has never been re-ported. In this study, resist profile for 0.1- m T-shaped gate was achieved by thermally reflowing the bilayer e-beam resist using hotplate and the 0.1- m T-shaped gate was achieved by the stan-dard lift off process and was applied to the MHEMT manufac-ture. Comparing with a two-step lithography of hybrid T-shaped gate [11] and Y-shaped gate [12], the reflowed gate process is a much simpler, relatively inexpensive and flexible process. Ad-ditionally, it is also free of plasma damage and is compatible with the MHEMT process for high-frequency application.

II. PROCESSFLOW

The In Al As–In Ga As MHEMT uses

In Al As as the buffer layer between the GaAs sub-strate and the InP lattice-matched HEMT structure and was grown by the molecular beam epitaxy (MBE) method on the 3-in diameter GaAs substrate. The sequence for the device fabrication is as follows. The mesas were isolated by wet chemical etch and the ohmic contacts were formed by evapo-rating Au–Ge–Ni–Au on heavily doped InGaAs layer and then alloyed at 320 C using rapid thermal annealing. The contact resistance as measured by the transmission line model method was 0.04 mm. For the reflowed T-gate process, the bi-layer resist which consist of polymethylmethacrylate (PMMA) and polymethyl methacrylate-methacrylic acid P(MMA-MAA) was exposed first by e-beam lithography (Leica EBML300) with an opening of 0.25 m, and then went through thermally reflow treatment at 115 C on a hotplate for 60 s to reduce the opening to 0.1 m. The liftoff profile was obtained due to the bottom resist PMMA was successfully shrunk to form the desired footprint opening of 0.1 m without any obvious change on the top P(MMA-MAA) layer after thermal treatment. In addition, the reflow condition was optimized after testing different

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LIEN et al.: LOW-NOISE METAMORPHIC HEMTs WITH REFLOWED 0.1- m T-GATE 349

Fig. 1. Scanning electron microscopy micrograph. (a) Conventional e-beam resist and its 0.25-m T-gate. (b) The resist after shrinking by thermally reflow and its 0.1-m T-gate.

Fig. 2. Transconductance of the0:1 m 2 160 m MHEMT.

temperatures (from 105 to 135 C, per step C) and time (20, 40, 60, and 80 s). The detailed process optimization has been published in [10]. Although the reflowed temperature over 125 C will obtain shorter gate length, there is a risk of footprint opening being closed by high temperature and long time reflow. Therefore the optimized reflow condition of 115 C for 60 s was decided. In order to verify the reflow effect, MHEMTs with nonreflowed T-gate were also fabricated. Fig. 1 illustrates the cross sections of the two types of T-gate profiles. Fig. 1(a) is the e-beam resist after exposure and its 0.25 m T-gate after liftoff. Fig. 1(b) is the resist after thermal reflow and its 0.1- m T-gate after liftoff. As shown in Fig. 1(b), the e-beam resist profile after thermal reflow was very ideal for liftoff and T-gate formation.

After gate lithography process, gate recess was performed using succinic-base solution and Ti–Pt–Au (100–100–300 nm) were deposited as the Schottky gate metal and liftoff process was performed to form the T-shaped gate. As shown in Fig. 1,

Fig. 3. Typical current gain H , MAG/MSG, and unilateral gain U as a function of frequency of the0:1 2 160 m MHEMT.

Fig. 4. Noise figure and associated gain as a function of frequency atV = 1 V and I = 14 mA of the 0:1 2 160 m MHEMT.

the recess width on the devices was about 0.13 m for both with and without reflow samples. After T-gate formation, 100-nm-thick silicon nitride film was deposited by PECVD as the pas-sivation layer. Finally, the airbridges were formed with 2 m of plated Au.

III. DEVICEPERFORMANCE

The drain current and transconductance versus gate bias of the m MHEMT fabricated using the thermally re-flowed T-gate are shown in Fig. 2. The device exhibits a good pinchoff characteristics and the saturation drain current is 200 mA/mm. The transconductance of the device at 1.2-V drain-source voltage is 750 mS/mm and the pinchoff voltage is 500 mV. The gate to drain breakdown voltage measured was 10-V at a gate reverse current of 1 mA/mm. The high break-down voltage is due to lower Idss target caused by longer recess. The S-parameters for the MHEMT devices were measured from 1–40 GHz and current gain H , MAG/MSG, and unilat-eral gain U as a function of frequency are shown in Fig. 3. The

and obtained for the m MHEMT were 154

and 300 GHz, respectively. In addition, the measurement of the noise figure (NF) and associated gain have been performed in the frequency range between 2 and 18 GHz, and the results are shown in Fig. 4. The NF is less than 1 dB up to 18 GHz with an associated gain of 14 dB at 18 GHz.

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350 IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 6, JUNE 2004

TABLE I

SUMMARY OFDEVICEPERFORMANCE OF THEMHEMT WITHNON-REFLOWED ANDREFLOWEDT-GATE

Table I summarizes the measured electrical performance of the m MHEMT and the performance was com-pared with the performance of the nonreflowed m MHEMT. Although the transconductance of the MHEMT with reflowed T-gate increased only slightly, the and were improved substantially from 105–154 GHz and from 180–300 GHz, respectively. However, the increase in transcon-ductance is less pronounced (from 700–750 mS/mm). In other words, carriers are at their saturation velocity when current saturates and this is evident by the fact that the knee voltage at Idss is less than the pinchoff voltage in the current–voltage curve. Thus, the transconductance has less dependence on gate length and the increase in cutoff frequency mainly comes from gate–source capacitance. The improved RF performance was due to the T-gate shrinkage from 0.25 to 0.1 m after the thermal reflow process.

IV. CONCLUSION

A thermal reflow process for e-beam bilayer resist to achieve 0.1- m T-gate formation was successful developed and applied to the MHEMT fabrication. The m MHEMT fab-ricated demonstrated a cutoff frequency of 154 GHz and a maximum frequency up to 300 GHz, the noise figure of the fabricated MHEMT was less than 1 dB with 14 dB associ-ated gain at 18 GHz. The excellent device performance of the 0.1 m MHEMT manufactured demonstrated that the reflowed T-gate process is compatible with the MHEMT process and can be practically used for the MHEMT manufacturing.

ACKNOWLEDGMENT

The authors would like to thank National Nano Device Lab-oratories RF group for S-parameter measurements.

REFERENCES

[1] M. Chertouk, H. Heiss, D. Xu, S. Krauss, W. Klein, W. Bohm, G. Trankle, and G. Weimann, “Metamorphic InAlAs/InGaAs HEMT’s on GaAs substrates with a novel composite channels design,” IEEE

Electron Device Lett., vol. 17, pp. 273–275, Feb. 1996.

[2] M. Zaknoun, B. Bonte, C. Gaquiere, Y. Cordier, Y. Druelle, D. Theron, and Y. Crosnier, “InAlAs/InGaAs metamorphic HEMT with high cur-rent density and high breakdown voltage,” IEEE Electron Device Lett., vol. 19, pp. 345–347, Mar. 1998.

[3] S. Bollaert, Y. Cordier, V. Hoel, M. Zaknoune, H. Happy, S. Lepilliet, and A. Cappy, “Metamorphic In Al As/In Ga As HEMTs on GaAs substrate,” IEEE Electron Device Lett., vol. 20, pp. 123–125, Jan. 1999.

[4] B. Matinpour, N. Lal, J. Laskar, R. E. Leoni, and C. S. Whelan, “K-band receiver front-ends in a GaAs metamorphic HEMT process,” IEEE

Trans. Electron Devices, vol. 49, pp. 2459–2463, Dec. 2001.

[5] K. Hosogi, N. Nakano, H. Minami, T. Katoh, K. Nishitami, and M. Otsubo, “Photo/EB hybrid exposure process for T-shaped gate super low-noise HEMTs,” Electron Lett., vol. 27, pp. 2011–2012, 1991. [6] E. Y. Chang, K. C. Lin, E. H. Liu, C. Y. Chang, T. H. Chen, and J.

Chen, “Submicrometer T-shaped gate HEMT fabrication using deep UV lithography,” IEEE Electron Device Lett., vol. 15, pp. 277–279, Mar. 1994.

[7] Y.-L. Lai, E. Y. Chang, C. Y. Chang, H. P. Yang, H. P. Nakamura, and S. L. Shy, “A simple fabrication process of T-shaped gates using a deep-UV/electron-beam/deep-UV tri-layer resist system and electron-beam lithography,” Jpn. J. Appl. Phys., vol. 35, p. 6440, 1996.

[8] T. Suemitsu, H. Yokoyama, T. Ishii, T. Enoki, G. Meneghesso, and E. Zanoni, “30-nm two-step recess gate InP-based InAlAs/InGaAs HEMTs,” IEEE Trans. Electron Devices, vol. 49, pp. 1694–1700, Oct. 2002.

[9] C. C. Meng, G. R. Liao, and S. S. Lu, “Formation of submicrometer T-gate by rapid thermally reflowed resist with metal transfer layer,”

Electron. Lett., vol. 37, no. 16, pp. 1045–1046, 2001.

[10] H.-M. Lee, E. Y. Chang, S.-H. Chen, and C. Y. Chang, “New nanometer T-gate fabricated by thermally reflowed resist technique,” Jpn. J. Appl.

Phys., pt. 2, vol. 41, no. 12B, pp. L1508–L1510, 2002.

[11] K. Tabatatabaie-Alavi, D. M. Shaw, and P. J. Duval, “Evolution of T-shape gate lithography for compound semiconductors field effect transistors,” IEEE Trans. Semiconduct. Manufact., vol. 16, pp. 365–369, Aug. 2003.

[12] N. Hara, K. Makiyama, T. Takahashi, K. Sawada, T. Arai, T. Ohki, M. Nihei, T. Suzuki, Y. Nakasha, and M. Nishi, “Highly uniform InAlAs-In-GaAs HEMT technology for high-speed optical communication system ICs,” IEEE Trans. Semiconduct. Manufact., vol. 16, pp. 370–375, Aug. 2003.

數據

Fig. 1. Scanning electron microscopy micrograph. (a) Conventional e-beam resist and its 0.25- m T-gate

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