The Determination of
S-Parameters From the Poles
of Voltage-Gain Transfer Function for RF IC Design
Shey-Shi Lu, Senior Member, IEEE, Yo-Sheng Lin, Member, IEEE, Hung-Wei Chiu, Yu-Chang Chen, and
Chin-Chun Meng, Member, IEEE
Abstract—A method for estimating the -parameters of active circuits using hand analysis is introduced. This method involves the determination of -parameters from the poles of voltage-gain transfer function. It is found that the information on the frequency responses of input/output return loss, input/output impedance, and reverse isolation is all hidden in the poles or equivalently in the de-nominator of the voltage-gain transfer function of a circuit system. The method has been applied to three commonly used RF circuit configurations and one fabricated CMOS wide-band amplifier to illustrate the usefulness of the proposed theory.
Index Terms—Broad-band amplifier, poles, -parameters, transfer function.
I. INTRODUCTION
I
T IS well known that the frequency response of voltage gain of a circuit can be determined from the poles and zeros of the voltage-gain transfer function [1]. While knowing the voltage gain (or ) is enough in traditional analog circuit design, ad-ditional information on the input and output return losses (or and ) is indispensable in microwave radio frequency (RF) circuit design because input/output impedance matching is important. In addition, the reverse isolation (or reverse voltage gain ) of a circuit has to be found to ensure circuit stability. Usually, the conventional analog circuit design starts from the calculation of the voltage-gain transfer function. One of the sys-tematic approaches to derive the denominator of a transfer func-tion efficiently is to write down the simultaneous equafunc-tions by node or mesh analysis [2] and then find the determinant of the simultaneous equations. Some examples of how to derive the voltage-gain transfer function of a circuit efficiently can also be found in [3]. From the denominator and the numerator of the transfer function, poles and zeros are found, respectively. With the information of poles and zeros plus dc or mid-band gain, the frequency response of voltage gain of a circuit can be de-scribed. In a 50- lossless transmission line system, is con-sequently obtained because it is twice the voltage gain if theManuscript received January 8, 2004; revised May 22, 2004 and July 30, 2004. This work was supported by the National Science Council under Grant NSC93-2215E002-028, Grant 91EC17A05-S10017, and Grant NSC93-2752-E002-002-PAE. This paper was recommended by Associate Editor P. K. Rajan. S.-S. Lu, H.-W. Chiu, and Y.-C. Chen are with the Department of Electrical Engineering and Graduate Institute of Electronics, National Taiwan University, Taipei, Taiwan, R.O.C. (e-mail: sslu@ntu.edu.tw).
Y.-S. Lin is with the Department of Electrical Engineering, National Chi-Nan University, Puli, Taiwan, R.O.C. (e-mail: stephenlin@ncnu.edu.tw).
C.-C. Meng is with the Department of Communication Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan, R.O.C. (e-mail: ccmeng@mail.nctu.edu.tw).
Digital Object Identifier 10.1109/TCSI.2004.840084
source impedance associated with voltage source is 50 and the output port is matched [4]. As to the input and output re-turn losses (or and ), cumbersome calculations have to be done to find the input and output impedances, not to mention the tedious work in obtaining reverse voltage gain, which is one half of in a 50- circuit system. That is, all of the neces-sary quantities (or -parameters) are calculated independently according to the traditional approach of analog circuit design.
For the circuits whose expressions of -parameters, -pa-rameters, or other small-signal parameters can be easily obtained, the expressions of -parameters can be obtained by plugging these small-signal parameters into the -param-eter transformations [5], and then simplifying these equations. However, such an approach is too complex and tedious to gain useful insights. There are methods of plugging in to determine -parameter macros on SPICE for the analog circuit [6], but they do not give the analytical forms. Therefore, in this paper, a technique to perform useful -parameter estimation using hand analysis is introduced. Specifically, a method for the determi-nation of -parameters and input/output impedance from the poles of the denominator of the voltage-gain transfer function is presented. It is found that input/output return loss, input/output impedance, and reverse isolation/gain can be derived from the expressions of poles or, equivalently, the denominator of the voltage-gain transfer function. That is, input/output return loss, input/output impedance, and reverse isolation/gain can be found in a unified way. In Section II, the theory of determining -pa-rameters from the poles of the voltage-gain transfer function is presented. In Section III, three commonly used RF circuits are taken as examples to illustrate the proposed theory.
In addition, broad-band amplifiers are used in a large variety of applications, such as wireless systems, instrumentation, and optical communications [7]–[11]. Among the variety of broad-band amplifiers, the Kukeilka configuration is one of the most popular circuits [11], [12]. However, no detailed analysis of this kind of circuit implemented in CMOS tech-nology has ever been presented. To verify the proposed theory, in Section IV, we present the derived analytic expressions of the closed-loop poles, voltage/current gain, input/output impedance, input/output return loss, reverse isolation/gain, and transimpedance gain for the CMOS broad-band amplifier with the Kukeilka configuration. The predicted results (12.8-dB gain and 2.0-GHz bandwidth) from our theory are consistent with the simulated (12.3-dB gain and 2.1-GHz bandwidth) and measured results (10.5-dB gain and 1.7-GHz bandwidth), sug-gesting that our theory can be successfully applied to CMOS RF IC design.
Fig. 1. Setup for the measurement/simulation of theS-parameters of a circuit system in the context of a 50- measurement/simulation system.
II. THEORY
Assume that the voltage-gain transfer function of a circuit system is known and is given by
(1)
where is dc or mid-band gain, is source
re-sistance of the voltage source, is load resistance,
and and stand for the numerator
and denominator of the transfer function for solving, respec-tively, zeros and poles. Note that the numerator and denomi-nator, in general, are functions of and . In a 50- system, . To facilitate the following discussion, we will call the denominator of the transfer function the
character-istic equation .
The setup for the measurement/simulation of the -param-eters of a circuit system is shown in Fig. 1. (the source impedance associated with the voltage source) and (load impedance) are connected to the input and output ports of the circuit system, respectively, and are equal to the characteristic impedance (50 ) of the input and output transmission lines, which are assumed to be lossless. and can be obtained
by setting and , while and can be
ob-tained by setting and . What are also shown
in Fig. 1 are the expressions of the -parameters in terms of the parameters shown in Fig. 1. Since is twice the voltage gain under the previous assumed condition, can be obtained
easily and is equal to . In order to find input
return loss , has to be determined. By
defini-tion, is given by
(2) where is the input impedance of the circuit. The poles of
are the roots of . From the expressions of
–parameters in terms of - or -parameters [6], it is found that the denominators, or the poles, of all -parameters are the
same. Hence, is equivalent to the characteristic
equation for the poles of voltage gain. That
is
(3) where the symbol “ ” stands for “equivalent to.” The zeros of
are the roots of the zero equation . This
zero equation can be viewed as the transformation of the pole
equation with replaced by . This implies
that
(4) In other words, the zeros of can be obtained by replacing in the expressions of the poles with . At dc or mid-band
frequencies, , where is the
input resistance and is assumed to be known. Therefore, can be written as follows for all frequencies:
(5) Once is known, can be readily obtained. According to (3), the other way of finding is to isolate from the other
terms in the expression of , and the sum of
all of the other terms as a whole is . Once is known, can be readily obtained. Based on similar arguments, can be given by
(6) where is the output resistance and is assumed to be known.
Once is known, can be readily obtained. The other
way of finding is to isolate from the other terms in
the expression of and the sum of all of the
other terms as a whole is . Once is known, can be
readily obtained.
is twice the reverse voltage gain. Since the poles of are the same as those of , can be completely described if the dc or mid-band gain and the zeros of the “reverse circuit” are known.
III. APPLICATIONS
To illustrate the method presented in Section II, three circuits are used as examples: 1) the shunt–shunt feedback amplifier; 2) the source inductor feedback low noise amplifier; and 3) the simple common source amplifier.
A. Shunt–Shunt Feedback Amplifier
The schematic and the small-signal equivalent circuit of a two-stage local shunt–shunt feedback amplifier are shown in Fig. 2(a) and (b), respectively. For clarity and simplicity, gate-to-drain capacitance and the output resistance of transistors are ne-glected. The transfer function of voltage gain is given by (7)
Fig. 2. (a) Schematic and (b) small-signal equivalent circuit of the shunt–shunt feedback amplifier.
where
(8)
Once is known, is two times of (7). According to
conventional circuit analysis, and have to be calculated in order to find and . Based on direct circuit analysis, they can be shown as follows:
(9a)
(9b)
Based on our theory, if we rewrite the expression of
, and can be found, and they agree
with (9a) and (9b) as follows:
(10)
The second way to find and with our theory is the ap-plication of (5) and (6) to yield
(11a)
(11b)
It can be shown that the results of (11a) and (11b) are equal to those obtained by inserting (9a) and (9b) into (5) and (6), respectively.
B. Source Inductor Feedback Low-Noise Amplifier
Another commonly used RF circuit is the source inductor feedback low-noise amplifier as shown in Fig. 3(a). If we ne-glect the gate-to-drain capacitance and the output resistance in the small-signal equivalent circuit as shown in Fig. 3(b), the transfer function can be shown to be
(12)
where
(13)
where . By isolating and from the
other terms, and were found to be
(14a) (14b)
where . The results of (14a) and (14b) are in
agreement with those derived from direct circuit analysis. Once
Fig. 3. (a) Schematic and (b) small-signal equivalent circuit of the source inductor feedback low-noise amplifier.
The second way to find and with our theory is the application of (5) and (6) to yield
(15a)
(15b)
It is clear that the results of (15a) and (15b) are equal to those ob-tained by inserting (14a) and (14b) into (5) and (6), respectively.
Fig. 4. (a) Schematic and (b) small-signal equivalent circuit of the simple common source amplifier.
C. Simple Common-Source Amplifier
In the previous two examples, the focus is on and , and the transistor feedback element was neglected for the sake of clarity. However, this assumption inevitably results in zero or infinite reverse isolation. A simple common-source amplifier is shown in Fig. 4(a). Now let us consider its small-signal equivalent circuit with taken into account, as shown in Fig. 4(b), and turn our attention to the calculation of . is twice the reverse-voltage gain. Since the reverse-voltage gain has the same poles as the forward-voltage gain, the re-maining thing to do is to find the zeros and dc (or mid-band) reverse-voltage gain. By inspecting Fig. 4(b), the zero is at zero frequency with a near dc gain of and hence is given by
(16a) where
(16b) The results of (16a) and (16b) agree with those derived from direct circuit analysis.
IV. ANALYSIS OF CMOS BROAD-BANDAMPLIFIER
WITH THEKUKIELKACONFIGURATION
To verify the proposed theory, a Kukeilka configuration broad-band amplifier with dual feedback loops fabricated with a 0.25- m CMOS process was designed and analyzed.
Fig. 5. Schematic of the designed dual-feedback broad-band amplifier with the Kukielka configuration with a 0.25-m CMOS technology.
A. Circuit Architecture and the Expressions of Its -Parameters
The schematic of the CMOS broad-band amplifier with the Kukeilka configuration is shown in Fig. 5. The input stage con-sists of a single nMOS M1, which drives the output stage com-posed of an nMOS M2 with local shunt and series feedback. There is also an overall shunt-series feedback loop
composed of resistors and . Capacitance is added
in parallel to to introduce peaking, which compensates for the overdamped characteristics of this configuration and hence enhances the bandwidth [14]. Clearly, this amplifier can be ap-proximated by a two-pole system with open loop poles of and given by [11] and [13], as shown in (17a) and (17b) at bottom of the page, where and are the total gate
capacitances of M1 and M2, and are the
equiva-lent substrate resistances of M1 and M2, and are the
intrinsic transconductances of M1 and M2, and are
the transconductances of M1 and M2 due to the body effect, and
are the effective transconductances of M1
and M2, and and are the cutoff frequencies of M1 and M2. The closed-loop poles of the voltage-gain transfer function and all four -parameters of the amplifier are given by [1], [13]
(18) where is the loop gain, which will be derived later. In the fol-lowing, first, the expressions of voltage and current gains and input and output impedances at dc frequency will be derived. Then, the expressions of the frequency responses of the ampli-fier’s -parameters will be described.
1) Voltage and Current Gains and Input and Output Imped-ances: Fig. 6(a) is the A circuit for the broad-band amplifier without the global shunt-series feedback to calculate the voltage gain. The voltage gain of without the global feedback is
(19a)
where
is the impedance at point K1 looking into the gate of M2. The voltage gain with the global feedback with inspection is then
(19b) where is the input resistance of the broad-band amplifier with the global feedback, which will be derived later. Fig. 6(b) is the A circuit for the broad-band amplifier without the global
(17a)
(17b)
Fig. 6. The A circuit of Fig. 4 for calculating (a) voltage gain and (b) current gain.
shunt-series feedback to calculate the current gain. The
feed-back factor is equal to . In addition, the
current gain can be easily determined to be
(20) By inspecting Fig. 6(b), the input resistance of the A circuit is . According to the traditional shunt-series feed-back theory, the input resistance with feedfeed-back is given by (21), shown at the bottom of the previous page. Then, the loop gain
can be represented as
(22) Fig. 7 shows the circuit diagram for the calculation of output resistance. A test voltage is applied to the drain node of M2. Assuming that the current flowing through the feedback resistance is negligible, the voltage at point P1 is
. Hence, the voltage at point P2 and the current in-duced at the source of M1 is
and ,
respec-tively. As a result, the resistance looking into the drain of M1 is given by
(23a) Therefore, the output resistance is given by
(23b) 2) Frequency Responses of , , , and : Once the two poles and dc (or mid-band) gain of the voltage-gain transfer function are known, the frequency responses of can be determined easily. That is
voltage gain
(24a) where is the voltage gain with the global feedback at dc (or mid-band) frequency. It is known that all -parameters have
the same poles, and the zeros of ( and ) and
Fig. 7. Small-signal equivalent circuit for calculating output resistance at dc frequency.
and , respectively, in the expression of poles [13]. Therefore, and can be expressed as follows:
(24b)
(24c)
is the reverse voltage gain, which can be found easily once is known as follows:
(24d)
where is the zero caused by and .
B. Experimental Results and Discussions
The circuit parameters of the designed CMOS broad-band amplifier are indicated in Fig. 5. This circuit was fabricated with a 0.25- m CMOS process, and the size of M1 and M2 was both 0.24 m 320 m. The total power dissipation was only 25 mW. The values of the resistors were as follows: 350 ,
150 , 80 , 650 , and
14.5 . The capacitance was 7 pF. The die photograph of the finished circuit is shown in Fig. 8. Note that the circuit only occupied a small area of 600 m 700 m because no in-ductor was used, which is an advantage of the resistive feedback amplifier.
Fig. 8. Die photograph of the dual-feedback broad-band amplifier fabricated with a 0.25-m CMOS technology. The chip size is 600 m 2 700 m.
An HP8510 network analyzer in conjunction with the Cascade probe station was used to measure the characteristics of this broad-band amplifier. In addition, Advanced Design System (ADS) of Agilent technologies was used to generate the simulation results. The simulated, measured, and predicted
results of , , and are shown in Fig. 9(a), 9(b),
and 10, respectively. Clearly, the calculated -parameters are all in good agreement with the simulated results, which verifies the validity of our proposed theory.
As can be seen, in Fig. 9(a) and (b), the measured in-band re-turn losses and were smaller than 10 dB. The simu-lated results are in good agreement with the measured values. In Fig. 10, the measured exhibited a flat response with a 3-dB bandwidth of 1.7 GHz. The predicted at low frequencies with the method we propose was 12.8 dB, which was in good agreement with the simulated (12.3 dB). The measured result was about 2 dB lower than what had been predicted and simulated. In addition, the predicted bandwidth was 2.1 GHz, comparable to the simulated result of 2.0 GHz but higher than the measured result of 1.7 GHz. Because the foundry guaran-tees the CMOS SPICE models with error rates within a 10% range, the discrepancies between the measured results and the simulated and calculated results should mainly result from the SPICE modeling errors. In particular, the parasitic silicon sub-strate effect was not fully included in the SPICE model of the CMOS process that we used.
Fig. 9. Simulated, measured, and predicted results of (a)jS j and (b)jS j of the CMOS broad-band amplifier.
Fig. 10. Simulated, measured, and predicted results of S of the CMOS broad-band amplifier.
V. CONCLUSION
The methodology for the calculation of -parameters from the denominator or poles of the voltage-gain transfer function is presented. First, can be obtained by replacing with in the expression of the denominator or poles of the voltage-gain
transfer function while can be obtained by replacing with . Second, the input impedance can be obtained by isolating from the other terms in the expression of the de-nominator while the output impedance can be obtained by iso-lating from the other terms. Third, can be determined by finding the zeros and dc (or mid-band) gain of the “reverse circuit.” Our theory has been applied to three circuits and the re-sults of -parameters and input/output impedance derived from our method are the same as those obtained from direct calcu-lations. In addition, a broad-band amplifier with dual feedback loops fabricated with a 0.25- m CMOS process was used to verify the proposed theory. The experimental results are consis-tent with those predicted from the analytic expressions of -pa-rameters determined from the poles of the voltage-gain transfer function. These results show that our proposed method is very applicable to RF IC design.
ACKNOWLEDGMENT
The authors would like to thank the chip implementation center (CIC) for chip fabrication and the nanometer device laboratory (NDL) for high-frequency measurements.
REFERENCES
[1] A. S. Sedra and K. C. Smith, Microelectronic Circuits, 4th ed. New York: Oxford Univ. Press, 1998, p. 601.
[2] A. B. Carlson, Circuits. Pacific Grove, CA: Brooks/Cole, 2000, pp. 162–169.
[3] B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2001, p. 166–195, 246-285.
[4] G. Gonzalez, Microwave Transistors and Amplifiers Analysis and De-sign, 2nd ed. Englewood Cliffs, NJ: Prentice-Hall, 1984, p. 34. [5] , Microwave Transistors and Amplifiers Analysis and Design, 2nd
ed. Englewood Cliffs, NJ: Prentice-Hall, 1984, p. 62.
[6] R. Goyal, “S-parameter output from the SPICE program,” IEEE Circuits Devices Mag., vol. 4, no. 2, pp. 28–29, Mar. 1988.
[7] R. G. Meyer and R. A. Blauschild, “A 4-terminal wide-band monolithic amplifier,” IEEE J. Solid-State Circuits, vol. SC-16, no. 6, pp. 634–638, Dec. 1981.
[8] I. Kipnis et al., “Silicon bipolar fixed and variable gain amplifier MMICs for microwave and lightwave applications up to 6 GHz,” in Microw. Symp. Dig., IEEE MTT-S Int., vol. 1, June 1989, pp. 109–112. [9] K. W. Kobayashi and A. K. Oki, “A DC-10 GHz high gain-low noise
GaAs HBT direct-coupled amplifier,” IEEE Microw. Guided Wave Lett., vol. 5, no. , pp. 308–310, Sep. 1995.
[10] K. W. Kobayashi et al., “Low dc power high gain-bandwidth product In-AlAs/InGaAs-InP HBT direct-coupled amplifiers,” in Proc. IEEE GaAs IC Symp., Nov. 1996, pp. 141–144.
[11] C. D. Hull and G. B. Meyer, “Principle of monolithic wideband feedback amplifier design,” Int. J. High Speed Electron., vol. 3, pp. 53–93, Feb. 1992.
[12] M. C. Chiang et al., “Analysis, design, and optimization of InGaP-GaAs HBT matched-impedance wide-band amplifiers with multiple feedback loops,” IEEE J. Solid-State Circuits, vol. 37, no. 6, pp. 694–701, Jun. 2002.
[13] S. S. Lu et al., “A novel interpretation of transistor S-parameters by poles and zeros for RF IC circuit design,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 2, pp. 406–409, Feb. 2001.
[14] F. T. Chien and Y. J. Chan, “Bandwidth enhancement of transimpedance amplifier by capacitive-peaking design,” IEEE J. Solid-State Circuits, vol. 34, no. 8, pp. 1167–1170, Aug. 1999.
Shey-Shi Lu (S’89–M’9l–SM’99) was born in
Taipei, Taiwan, R.O.C., on October 12, 1962. He received the B.S. degree from National Taiwan University, Taipei, in 1985, the M.S. degree from Cornell University, Ithaca, NY, in 1988, and the Ph.D. degree from the University of Minnesota at Minneapolis-St Paul in 1991, all in electrical engi-neering. His M.S. thesis was related to the planar doped barrier hot-electron transistor, while his doctoral dissertation concerned the uniaxial stress effect on the AlGaAs–GaAs quantum-well/barrier structures.
In August 1991, he joined the Department of Electrical Engineering, National Taiwan University, where he is currently a Professor. His current research inter-ests are in the areas of RF integrated circuit/monolithic microwave integrated circuits and micromachined RF components.
Yo-Sheng Lin (M’02) was born in Puli, Taiwan,
R.O.C., on October 10, 1969. He received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1997. His Ph.D. dissertation was on the fabrication and study of GaInP–InGaAs/GaAs doped-channel field-effect transistors and their applications to monolithic microwave integrated circuits (MMICs).
He joined Taiwan Semiconductor Manufacturing Company (TSMC) in 1997 as a Principle Engineer for 0.35/0.32 DRAM and 0.25 embedded DRAM technology developments in the Integration Department of Fab-IV. Since 2000, he has been responsible for 0.18/0.15/0.13—m CMOS low-power device technology development in the Department of Device Technology and Modeling, R&D. He was promoted to Technical Manager in 2001. In August 2001, he joined the Department of Electrical Engineering, National Chi-Nan University, Puli, Taiwan, where he is currently an Associate Professor. His cur-rent research interests are in the areas of characterization and modeling of radio frequency (RF) active and passive devices, and RF integrated circuits/MMICs.
Hung-Wei Chiu was born in Taipei, Taiwan, R.O.C.,
in 1976. He received the B.S. degree from National Chiao-Tung University, HsinChu, Taiwan, R.O.C., in 1998, and the M.S. and Ph.D. degrees from National Taiwan University, Taipei, in 2000 and 2003, respec-tively, all in electrical engineering.
In 2004, he joined the Taiwan Semiconductor Manufacturing Company, HsinChu, as a Designer with the Mixed-Mode and RF Library Division. Since then he has worked in the area of the automa-tion of mixed-mode and RF circuit design.
Yu-Chang Chen was born in Taipei, Taiwan,
R.O.C., on February 19, 1978. He received the B.S. and M.S. degrees in electrical engineering from National Taiwan University, Taipei, in 2000 and 2002, respectively.
In 2002, he joined Airoha Technology, Taipei, as a Designer with the Mixed-Mode Division. His current research interests include mixed-signal IC design and architectures for wireless communication.
Chin-Chun Meng (M’92) received the B.S. degree
from National Taiwan University, Taipei, Taiwan, R.O.C. in 1985, and the Ph.D. degree from the University of California, Los Angeles, in 1992, both in electrical engineering. He demonstrated the first CW operation of multiquantum well IMPATT oscillator at 100 GHz in his Ph.D. work.
After completing his Ph.D., he joined the Hewlett Packard Component Group, Santa Clara, CA, in 1993 as a Member of Technical Staff. His area of research and development included HBT, MESFET, and PHEMT for microwave and RF power-amplifier application. He is now an Associate Professor with the Department of Communications Engineering at National Chiao-Tung University, HsinChu, Taiwan. His current research interests are in the areas of RF integrated circuits, high-frequency circuits, and high speed devices.
