高效率的整合AES加密器與解密器之電路設計
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(2) 高效率的整合 AES 加密器與解密器之電路設計 Circuit Design of Highly Efficient AES Integrated Encryptor and Decryptor. 研 究 生：施忠宏. Student：Chung-Hung Shih. 指導教授：紀翔峰 博士. Advisor：Dr. Hsiang-Feng Chi. 國 立 交 通 大 學 電機資訊學院 電信學程 碩 士 論 文. A Thesis Submitted to Degree Program of Electrical Engineering and Computer Science College of Electrical Engineering and Computer Science National Chiao Tung University in Partial Fulfillment of the Requirements for the Degree of Master of Science in Communication Engineering July 2005 Hsinchu, Taiwan, Republic of China. 中華民國九十四年七月.
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