Effect of interfacial fluorination on the electrical properties of the inter-poly high-k dielectrics

Effect of interfacial fluorination on the electrical properties

of the inter-poly high-k dielectrics

Chih-Ren Hsieh

_{, Yung-Yu Chen}

_{, Kwung-Wen Lu}

_{, Gray Lin}

_{, Jen-Chung Lou}

a

Department of Electronics Engineering and Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan b

Department of Electronic Engineering, Lunghwa University of Science and Technology, Guishan, Taoyuan 333, Taiwan

a r t i c l e

i n f o

Article history: Received 3 August 2010

Received in revised form 21 October 2010 Accepted 16 December 2010

Available online 3 February 2011 Keywords: Flash memory Fluorine High-k dielectric Inter-poly

a b s t r a c t

In this paper, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al2O3) and

hafnium oxide (HfO2) inter-poly dielectric (IPD) are studied. Interface fluorine passivation has been

dem-onstrated in terminating dangling bonds and oxygen vacancies, reducing interfacial re-oxidation and smoothing interface roughness, and diminishing trap densities. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al2O3and HfO2IPDs. Moreover, fluorine incorporation will also

improve the dielectric quality of the interfacial layer. Although HfO2possesses higher dielectric constant

to increase the gate coupling ratio, the results also demonstrate that fluorination of the Al2O3dielectric is

more effective to promote the IPD characteristics than fluorination of the HfO2dielectric. For future

stack-gate flash memory application, the fluorinated Al2O3IPD undoubtedly possesses higher potential to

replace current ONO IPD than the fluorinated HfO2IPD due to superior insulating properties.

Ó 2010 Elsevier B.V. All rights reserved.

1. Introduction

The scaling of both tunneling oxides and inter-poly dielectrics (IPD) is critical for the next generation of nonvolatile floating-gate flash memories with faster programming and lower voltage oper-ation[1]. For the floating-gate flash memory devices, an IPD re-quires a high charge-to-breakdown (QBD) and low leakage current to obtain good data retention characteristics. In order to accomplish this without a trade-off between low power and high speed operations, a high gate coupling ratio must be achieved by increasing the floating-gate capacitance.

There are three different approaches can be used to increase gate coupling ratio. First, decrease the IPD thickness. However, decreasing the thickness of the IPD to increase the gate coupling ratio may cause serious leakage and reliability problems due to undesirable carrier tunneling and injection between the control-gate and floating-control-gate, which are fatal in the retention time of flash memories. Secondly, increase the area of the IPD capacitor. High capacitive-coupling ratio cell[2,3], 3-D IPD [4], and hemisphere grain[5,6]had been proposed to effective increase the capacitance area and lower the control gate bias. Although the gate coupling ratio of above mentioned cell structures could be dramatically improved, they must be fabricated with many additional process steps to fabricate such complex structures and be difficult to

control well. The packing density is also reduced while increasing the area of the IPD capacitor.

The final approach is to increase the dielectric constant (k) of IPD materials[7–10]. We have demonstrated that the control gate voltage can be reduced by greater than 45% with high dielectric constant (high-k) IPDs, through MEDICI simulation[11]. In order to avoid increasing the cell area and complicating the fabrication processes, therefore, it is straightforward and effective to incorpo-rate alternative high-k materials on floating-gate flash memories to replace existing oxide/nitride/oxide (ONO) IPD, for increasing float-ing-gate capacitance and suppressing charge loss simultaneously.

Among potential candidates, aluminum oxide (Al2O3) and haf-nium oxide (HfO2) are the most attractive for IPD applications in nonvolatile flash memories, because of its higher conduction band offset with respect to the underlying poly-Si electrode, and its higher permittivity with respect to Si substrate [12]. Previously, we had presented the effects of surface ammonia (NH3) nitridation and post-deposition annealing (PDA) temperature on reactive-sputtered (RS) aluminum oxide (Al2O3) IPD characteristics [8,9]. Directly deposition of high-k dielectrics inevitably results in a poorer interface as well as high bulk defect density[8]. Although interface nitridation is helpful to improve the IPD reliability, how-ever, even after process optimization, the QBDof nitrided RS-Al2O3 IPD is still low.

Recently, the dielectric characteristics of the high-k materials due to the incorporation of fluorine (F) have been improved

[13–16]. Fluorine incorporation into the gate dielectric can widely distributes within the high-k stacks, then recover interfacial 0167-9317/$ - see front matter Ó 2010 Elsevier B.V. All rights reserved.

doi:10.1016/j.mee.2010.12.027

⇑ Corresponding author. Tel.: +886 2 82093211x3030; fax: +886 2 82095709. E-mail address:[email protected](Y.-Y. Chen).

Contents lists available atScienceDirect

Microelectronic Engineering

dangling bonds and bulk oxygen vacancies during subsequently processes, which is useful to reduce gate leakage current as well as improving dielectric reliabilities[13]. In this paper, by control-ling the fluorine implantation dosage, the fluorination effects on the insulating characteristics of the high-k IPDs will be investi-gated for the first time.

2. Experimental details

The inter-poly capacitor with fluorinated high-k IPDs was fabri-cated on 6-inch p-type (1 0 0)-oriented Si wafers. A 200 nm poly-Si bottom gate was deposited on the 200 nm buffer oxide by low pressure chemical vapor deposition (LPCVD) system using silane (SiH4) gas at 620 °C and subsequently implanted with phosphorous at 5  1015_cm 2_{, 20 keV. Prior to the deposition of the high-k IPD,} the bottom gate was subjected to 10 keV fluorine (F) implantation split from 1012_cm 2_{to 10}14_cm 2_{, then activated with rapid} ther-mal annealing (RTA) at 950 °C in nitrogen (N2) ambient for 30 s to reduce the surface damage from the ion bombardment. After con-ventional RCA cleaning and sequentially etched in diluted hydro-fluoric acid for the removal of particles and native oxides, 10 nm Al2O3or 15 nm HfO2was then deposited by AIXTRON metal organ-ic chemorgan-ical vapor deposition (MOCVD) system in oxygen gas at 500 °C. In order to improve the film quality, Al2O3and HfO2IPD was annealed at 900 °C and 600 °C in N2ambient for 30 s, respec-tively. Subsequently, the poly-Si top gate was fabricated the same with the bottom gate. Finally, gate stacks were patterned and met-allization were defined.

Equivalent oxide thickness (EOT) was obtained from the high-frequency (100 kHz) capacitance–voltage (C–V) measurement using a Hewlett–Packard (HP) 4284 inductance–capacitance–resis-tance meter at the inversion region, without considering inversion-charge quantization and poly-depletion effect. For comparison at similar EOT, HfO2IPD should be deposited thicker than Al2O3IPD due to the higher dielectric constant of the HfO2material. The ex-tracted EOT of the Al2O3and HfO2IPD as a function of the fluorine implantation dosage can be therefore, controlled between 4.1 and 4.5 nm. Moreover, since the HfO2dielectric exhibits smaller band-gap as well as smaller conduction band offset with respect to the Si, thicker HfO2thickness is helpful to suppress tunneling leakage current. Dielectric constant of the high-k materials was extracted using EOT and physical thickness, which was measured from the transmission electron microscopy (TEM) images. Furthermore, the content and distribution of the fluorine atom was measured by secondary-ion mass spectroscopy (SIMS). The binding energy of the Al, Hf and Si atom were extracted from the X-ray photoelec-tron spectrometer (XPS). The electrical properties and reliability characteristics of the fluorinated high-k inter-poly capacitors were measured using a HP4156C semiconductor parameter analyzer. 3. Results and discussion

Fig. 1a and b compares the XPS spectrum of the fluorinated Al2O3IPD with and without fluorine implantation dosage. The de-tected binding energy was calibrated by C1ssignal (284.5 eV). For the Al2O3IPD with fluorine incorporation, larger than 0.5 eV bind-ing energy increment is obtained for both the Si and the Al signals. Since the incorporated fluorine atoms are effective to terminate the bulk oxygen vacancies and the interfacial dangling bonds due to the highest electronegativity, which exhibits high potential to cre-ate stronger Al–F and Si–F bonds within the fluorincre-ated Al2O3IPD, respectively [17,18]. Consequently, fluorination of the Al2O3 IPD can be used to increase binding energy of the Al and Si signals. Higher Si and Hf binding energy is also detected for the HfO2IPD after fluorine incorporation, as shown inFig. 1c and d, which can

also form stronger Hf–F and Si–F bonds within the fluorinated HfO2IPD.Fig. 2shows the SIMS depth profile of the high-k IPD with fluorine implantation. Although post-implantation high tempera-ture thermal annealing would inevitably result in fluorine out-dif-fusion seriously, from the SIMS results, fortunately, the residual fluorine widely distributes within the high-k IPDs, which can help

104 102 100 98 78 76 74 72

Intensity (arb

. unit)

Intensity (arb

. unit)

Binding Energy (eV)

w/o F

with F

(a) Si

of the Al

O

IPD

(b) Al

of the Al

O

IPD

104 102 100 98 20 18 16 14

Intensity (arb

. unit)

Intensity (arb

. unit)

Binding Energy (eV)

w/o F

with F

(c) Si

of the HfO

IPD

(d) Hf

of the HfO

IPD

Fig. 1. XPS spectrum of the (a) Si2p(b) Al2psignals for the fluorinated Al2O3IPD, and (c) Si2p (d) Hf4fsignals for the fluorinated HfO2IPD with and without fluorine implantation dosage. 20 30 40 50 60 70 80 90 40 50 60 70 80 90 100 110

Intensity (arb

. unit)

Depth (nm)

Intensity (arb

. unit)

Fig. 2. SIMS depth profiles for the fluorinated (a) Al2O3(b) HfO2IPD with fluorine implantation dosage.

to terminate the bulk oxygen vacancies and interfacial dangling bonds during subsequently high-temperature annealing. Conse-quently, stronger Al–F/Hf–F bonds and Si–F bonds will be created, and results in increased binding energy, as shown inFig. 1.

Although incorporated fluorine can be used to terminate the bulk oxygen vacancies and interfacial dangling bonds regardless the incorporation processes, the EOT variation of the fluorinated dielectrics is found strongly dependent on the fluorine incorpora-tion processes[16,18,19]. For the processes which will accumulate high fluorine concentration near the interface between the dielec-tric and the underneath substrate prior to the gate stack deposi-tion, such as CF4 plasma treatment [18] and surface fluorine implantation in this paper, the fluorine is believed to form hydro-phobic Si–F bonds at the substrate surface, which can help to strongly suppress the interfacial re-oxidation during the gate stack deposition and subsequently high-temperature PDA. Accordingly, interfacial fluorine accumulation will result in thinner EOT. On the other hand, for the fluorine incorporation processes after the gate stack formation, such as fluorinated silicate glass (FSG)-in-duced fluorine passivation [16] and gate fluorine implantation

[19], the incorporated fluorine will diffuse through the gate stack, which exhibits high potential to substitute the oxygen atoms, then replaces the Hf–O bonds by the Hf–F bonds. Part of the residual oxygen may diffuse toward the interface between the dielectric and the underneath substrate, then react with the silicon dangling bonds or silicon atoms at the interface to growth undesirably inter-facial layer. Accordingly, fluorine diffusion and oxygen reaction will result in thicker EOT. The effect of fluorine incorporation pro-cesses on the EOT is summarized inTable 1.

Fig. 3a shows the EOT of the fluorinated high-k IPDs as a func-tion of fluorine implantafunc-tion dosage. Although fluorinafunc-tion directly using fluorine implantation would inevitably generate surface damage, which may deteriorate the dielectric reliabilities without sufficient annealing; fluorine implantation prior to the high-k IPDs deposition, on the other hand, is believed to form hydrophobic Si–F bonds at the silicon surface, as shown inFig. 1, which is also proved not only to terminate the interfacial dangling bonds, but also to suppress the interfacial re-oxidation during subsequent high-temperature dielectrics deposition and annealing [20,21]. Moreover, the fluorine incorporation is also useful to replace low dielectric constant oxygen vacancies (vacuum) by the fluorine atoms to form strong Hf–F/Al–F bonds, which is also demonstrated inFig. 1. Consequently, both the suppression of the interfacial re-oxidation and elimination of the low-k oxygen vacancies would contribute to the EOT scaling as the fluorine incorporation concen-tration increased, and therefore, results in increased dielectric con-stant, as shown inFig. 3b. Compared to the high-k IPDs without fluorination, Al2O3 and HfO2 IPD with 1  1014cm 2 fluorine implantation can increase the dielectric constant larger than 10% and 8%, respectively.

Fig. 4 compares the leakage current density-effective electric field characteristics of the fluorinated high-k inter-poly capacitors. Due to the proper filling the interfacial dangling bonds and bulk oxygen vacancies by the fluorine atoms, fluorinated high-k IPDs can reduce leakage current density in both polarities even at thin-ner EOT, especially for the IPDs with optimized (5  1013_cm 2₎ implantation dosage. For positive polarity, lower leakage current

density means that electron tunneling from the bottom-gate (sim-ulated as the floating-gate) to the top-gate (sim(sim-ulated as the con-trol-gate) will be suppressed, which implies that fluorination of the high-k IPDs can be used to reduce storage-charge loss during programming and reading operation. On the other hand, lower leakage current density for the negative polarity indicates that fluorination of the high-k IPDs can be also used to suppress carrier injection from the control-gate to avoid erase-saturation. Since leakage path elimination between the floating-gate and control-gate is a critical issue in the design criteria of the floating-control-gate flash memories to sustain charge storage, the result clearly demon-strated the high-k IPDs with fluorine passivated interface is helpful to significantly suppress the storage-charge loss and gate injection current.

Fig. 5a indicates the breakdown voltage of the high-k IPDs with and without interface fluorine passivation. For implantation dos-age less than 5  1013_cm 2_{, interfacial fluorination can obviously} increase the dielectric breakdown voltage in both polarities due to filling the interfacial dangling bonds and bulk oxygen vacancies by the fluorine atoms. Similar improvement is also obtained for the breakdown field, as shown inFig. 5b. Fluorinated Al2O3and HfO2 IPD with optimized implantation dosage can provide larger than 12% and 17% breakdown voltage increment in both polarities, respectively, even at thinner EOT.

Table 1

The effect of fluorine incorporation processes on the EOT of the gate dielectric. FSG passivation [16] CF4plasma [18] Gate fluorine implantation[19] Surface fluorine implantation [this work] EOT Increasing Decreasing Increasing Decreasing

4.0

4.1

4.2

4.3

4.4

4.5

4.6

4.7

(a) EOT

HfO

IPD

Al

O

IPD

Measured at V=2V, f

=100kHz

5

10

w/o F

Equi

v

a

lent Oxide

Thickness (nm)

Fluorine Implantation Dosage

((

cm

₎₎

1

10

1

10

5

10

1

10

7

8

9

10

11

12

13

14

15

16

17

(b) Dielectric Constant

(

k

)

HfO

IPD

Al

O

IPD

Measured at V=2V, f

=100kHz

5

10

w/o F

Dielectric Constant

Fluorine Implantation Dosage

(

cm

₎

1

10

1

10

5

10

1

10

Fig. 3. Extracted (a) EOT and (b) dielectric constant (k) of the fluorinated high-k IPDs as a function of fluorine implantation dosage.

Fig. 6a demonstrates the corresponding 63% failure-rate charge-to-breakdown (QBD) of the fluorinated high-k inter-poly capacitors under 2.5 V constant voltage stress (CVS). The fluorinated high-k IPDs clearly improves the QBD in both polarities, which can be mainly ascribed to diminish the dangling bonds and oxygen vacan-cies with fluorine atoms[5,7]. Moreover, the interface fluorine pas-sivation prior to the IPD deposition also demonstrated in smoothing the interface between the high-k dielectric and the bot-tom gate due to the interfacial re-oxidation suppression, which can be supported by the thinner EOT, as shown inFig. 3a. As a result, optimized fluorination can improve the QBDof the HfO2IPD from 0.02 C/cm2 to larger than 0.167 C/cm2. Although the result indi-cates that HfO2IPD with fluorine incorporation can increase the QBD, the extracted QBDof the fluorinated HfO2IPD seems too small to be implemented. On the other hand, the 63% failure QBDof the fluorinated Al2O3IPD is larger than 2.1 C/cm2 in both polarities, which is much higher than the QBDof the fluorinated HfO2IPD. Since the slope of the Weibull distribution is also an important fac-tor in reliability calculation to extrapolate lifespan to different per-centiles, the Weibull slope (b) of the QBD distribution is further extracted to examine the dielectric reliability, as shown in

Fig. 6b. Apparently, both fluorinated high-k IPDs exhibits much higher Weibull slope than the IPDs without interfacial fluorination in both polarities. Since higher and symmetric device characteris-tics can contribute to further IPD scaling, the results clearly dem-onstrate that the fluorinated Al2O3IPD can be effectively used to

replace current ONO IPD to promote the device performance of the stacked-gate flash memory.

Besides, the fluorinated high-k IPDs obviously reveal polarity-dependent properties. The dielectrics stressed in positive polarity (electron injection from the poly-Si bottom gate) clearly exhibit superior dielectric characteristics than those stressed in negative polarity (electron injection from the poly-Si top gate), as shown inFigs. 4–6. The polarity-dependent dielectric properties of the fluorinated high-k IPDs can be primarily explained by the interface roughness between the high-k IPD and the poly-Si gate. Fluorine implantation prior to the high-k dielectrics deposition is believed to form hydrophobic Si–F bonds during subsequently high-temper-ature dielectric deposition and annealing, which is beneficial to suppress the interfacial re-oxidation and interface roughness[9– 11]. A smoother interface is helpful in reducing the localized field, which can also suppress trap density generation [4]. In conse-quence, smooth interface between the high-k IPD and the poly-Si bottom gate and less trap density generation will inevitably con-tribute to superior dielectric characteristics when the fluorinated high-k IPDs stressed in positive polarity.

Although HfO2 possesses higher dielectric constant to further increase the gate coupling ratio, the results apparently indicate that Al2O3 is more suitable than HfO2to be implemented as the IPD of floating-gate flash memory, irrespective of the interfacial

-14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 10-8 10-7 10-6 10-5 10-4 10-3 w/o F 1x1012cm-2 5x1012cm-2 1x1013cm-2 5x1013cm-2 1x1014cm-2

Curr

ent Density

(

A/cm

)

Effective Electric Field

(

MV/cm

)

(a) Al

O

IPD

Curr

ent Density

(

A/cm

)

Effective Electric Field

(

MV/cm

)

(b) HfO

IPD

Fig. 4. Leakage current density characteristics of the fluorinated (a) Al2O3IPD and (b) HfO2IPD as a function of fluorine implantation dosage.

2.5

3.0

3.5

6.5

7.0

7.5

8.0

8.5

9.0

Filled : Positive Polarity

Open : Negative Polarity

(a) Breakdown Voltage

HfO

IPD

Al

O

IPD

5

10

w/o F

Br

eakdo

wn V

oltage

(V)

Fluorine Implantation Dosage

(

cm

₎

1

10

1

10

5

10

1

10

6

7

8

9

10

16

17

18

19

20

(b) Breakdown Field

HfO

IPD

Al

O

IPD

5

10

w/o F

Br

eakdo

wn Field (MV/cm)

Fluorine Implantation Dosage

(

cm

₎

1

10

1

10

5

10

1

10

Filled : Positive Polarity

Open : Negative Polarity

Fig. 5. (a) Breakdown voltage and (b) breakdown field of the fluorinated high-k IPDs as a function of fluorine implantation dosage.

fluorination. The dielectric reliabilities of both high-k IPDs can be gradually improved while fluorine implantation dosage increasing from 1  1012_cm 2_{to 5  10}13_cm 2_{. Nevertheless, the high-k} in-ter-poly capacitors exhibit deteriorate dielectric characteristics while the fluorine implantation dosage larger than 1  1014_cm 2_. Two feasible mechanisms may be responsible for the degradation. First, 950 °C dopant activation annealing may not be sufficient to repair the surface damage of the bottom gate caused by the heavy fluorine implantation dosage, i.e. 1  1014_cm 2_{. Second, fluorine} clusters may hypothetically form near the high fluorine concen-trated interface, and result in reliability degradation. Consequently, the high-k IPDs with fluorine implantation dosage larger than 1  1014_cm 2_{will not only exhibit increased leakage current, but} also reduced breakdown field and QBD.

4. Conclusions

Interface fluorine ion implantation process has been applied to the inter-poly capacitor with either aluminum oxide (Al2O3) or haf-nium oxide (HfO2) dielectric to evaluate the electrical properties

and dielectric reliabilities. The incorporation of fluorine within the high-k dielectrics is helpful to replace low-k oxygen vacancies (vacuum) and results in thinner equivalent oxide thickness. In addition, hydrophobic Si–F bond formation during subsequently high-temperature processes is also proved to terminate the inter-facial dangling bonds, which can suppose to suppress the interfa-cial re-oxidation and reduce the interface trap density. Since fluorine is effective to diminish the dangling bonds and oxygen vacancies, the incorporation of fluorine within the high-k dielec-trics can lower the gate leakage current and extend the breakdown field. Moreover, fluorine incorporation also reduces equivalent oxide thickness and improves charge-to-breakdown. Although fluorinated HfO2possesses higher dielectric constant to further in-crease the gate coupling ratio, the results apparently indicate that fluorinated Al2O3IPD is more suitable than HfO2IPD to be imple-mented to the floating-gate flash memory.

Acknowledgment

This word was supported by the National Science Council of the Republic of China under Grant NSC 97-2221-E-009-165.

References

[1] International Technology Roadmap for Semiconductors, 2007. Available from: <http://public.itrs.net>.

[2] Y.S. Hisamune, K. Kanamori, T. Kubota, Y. Suzuki, M. Tsukiji, E. Hasegawa, A. Ishitani, T. Okazawa, in: Tech. Dig., Int. Electron Dev. Meet., Washington, USA, December 5–8, 1993, p. 19.

[3] M. Kato, T. Adachi, T. Tanaka, A. Sato, T. Kobayashi, Y. Sudo, T. Morimoto, H. Kume, T. Nishida, K. Kimura, in: Tech. Dig., Int. Electron Dev. Meet., San Francisco, USA, December 11–14, 1994, p. 921.

[4] T. Kobayashi, N. Mastsuzaki, A. Sato, A. Katayama, H. Kurata, A. Miura, T. Mine, Y. Goto, T. Morimoto, H. Kume, T. Kure, K. Kimura, in: Tech. Dig., Int. Electron Dev. Meet., Washington, USA, December 7–10, 1997, p. 275.

[5] H. Shirai, T. Kubota, I. Honma, H. Watanabe, H. Ono, T. Okazawa, in: Tech. Dig., Int. Electron Dev. Meet., Washington, USA, December 10–13, 1995, p. 653. [6] T. Kitamura, M. Kawata, I. Honma, I. Yamamoto, S. Nishimoto, K. Oyama, in:

Symp. VLSI Tech. Dig., Honolulu, Hawaii, June 9–11, 1998, p. 104.

[7] W.-H. Lee, J.T. Clemens, R.C. Keller, L. Manchanda, in: Symp. VLSI Tech. Dig., Kyoto, Japan, June 10–12, 1997, p. 117.

[8] Y.Y. Chen, C.H. Chien, J.C. Lou, Jpn. J. Appl. Phys. 44 (2005) 1704. [9] Y.Y. Chen, C.H. Chien, J.C. Lou, IEEE Electron Device Lett. 28 (2007) 700. [10] G. Molas, M. Bocquet, E. Vianello, L. Perniola, H. Grampeix, J.P. Colonna,

L. Masarotto, F. Martin, P. Brianceau, M. Gely, C. Bongiorno, S. Lombardo, G. Pananakakis, G. Ghibaudo, B.D. Salvo, Microelectron. Eng. 86 (2009) 1796.

[11] Y.Y. Chen, C.H. Chien, K.T. Kin, J.C. Lou, in: IEEE Conf. on Emerging Tech., Singapore, Jane 10–13, 2006, p. 302.

[12] G.D. Wilk, R.M. Wallace, J.M. Anthony, J. Appl. Phys. 89 (2001) 5243. [13] M. Inoue, S. Tsujikawa, M. Mizutani, K. Nomura, T. Hayashi, K. Shiga, J. Yugami,

J. Tsuchimoto, Y. Ohno, M. Yoneda, in: Tech. Dig., Int. Electron Dev. Meet., USA, December 5–7, 2005, p. 413.

[14] M. Chang, M. Jo, H. Park, H. Hwang, B.H. Lee, R. Choi, IEEE Electron Device Lett. 28 (2007) 21.

[15] C.R. Hsieh, Y.Y. Chen, J.C. Lou, Appl. Phys. Lett. 96 (2010) 022905. [16] C.R. Hsieh, Y.Y. Chen, J.C. Lou, Microelectron. Eng. 87 (2010) 2241. [17] Y.Y. Chen, C.R. Hsieh, IEEE Electron Device Lett. 31 (2010) 1178.

[18] W.-C. Wu, C.-S. Lai, S.-C. Lee, M.-W. Ma, T.-S. Chao, J.-C. Wang, C.-W. Hsu, P.-C. Chou, J.-H. Chen, K.-H. Kao, W.-C. Lo, T.-Y. Lu, L.-L. Tay, N. Rowell, in: Tech. Dig., Int. Electron Dev. Meet., San Francisco, USA, December 15–17, 2008, p. 405. [19] H.-H. Tseng, P.J. Tobin, S. Kalpat, J.K. Schaeffer, M.E. Ramon, L.R.C. Fonseca, Z.X.

Jiang, R.I. Hegde, D.H. Triyoso, S. Semavedam, IEEE Trans. Electron. Devices 54 (2007) 3267.

[20] R.A. Haring, M. Liehr, J. Vac. Sci. Technol. A 10 (1992) 802.

[21] C.S. Lai, W.C. Wu, T.S. Chao, J.H. Chen, J.C. Wang, L.L. Tay, N. Rowell, Appl. Phys. Lett. 89 (2006) 072904. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 50 100 150 200 250 300 350 400

Filled : Positive Polarity Open : Negative Polarity

HfO₂ IPD Al₂O₃ IPD (a) Q_BD for 2.5V CVS 5x1012 w/o F Char ge-to-Br eakdo wn

(

)

Fluorine Implantation Dosage

(

₎

1x1012 1x1013 5x1013 1x1014 Char ge-to-Br eakdo wn

(

)

6 _{Filled : Positive Polarity}

Open : Negative Polarity

HfO2 IPD

Al2O3 IPD

(b) Weibull Slope for 2.5V CVS

5x1012 w/o F Q BD W eib ull Slope

Fluorine Implantation Dosage

(

₎

1x1012 1x1013 5x1013 1x1014

Fig. 6. (a) Charge-to-breakdown and (b) Weibull slope comparison of the fluori-nated high-k IPDs as a function of fluorine implantation dosage measured at 2.5 V CVS.