A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming

A 1.5

-V 1

O-ppm/°C 2nd-Order Curvature-Compensated

CMOS

Bandgap Reference with Trimming

Sen-Wen

Hsiao,

Yen-Chih

Huang

and David

Liang

Hung-Wei

Kevin Chen and Hsin-Shu Chen Departmentof ElectricalEngineering Departmentof ElectricalEngineering and Graduate Institute

National TaiwanUniversity of ElectronicsEngineering

Taipei,Taiwan National TaiwanUniversity

Taipei, Taiwan

hschengcc.

ee.ntu.edu.tw

Abstract-A2nd_ordercurvature-compensated CMOSbandgap reference circuit with a noveltrimming techniqueis described.

The 2nd_order curvature compensation is implemented by VDD using a temperature-dependent resistor ratio generated by a

poly resistor and a diffusion resistor. Atrimming technique

Lll

with digital switches is utilized to increase or decrease

resistance bi-directionally and therefore to minimize the

variance of resistance. The proposed voltage reference R4 R3 VREF

operates down to a 1.5 V supply and consumes a maximum

supply current of 55 gA. The experimental prototype circuit 'l

in a standard 0.35-gm CMOS process achieves a temperature R2

coefficient of 10ppm/!Candoccupiesan areaof 0.71mm2. 1 /

Keyword: CMOS bandgapreference,curvaturecompensation,

I

trimming,lowvoltage.

RI

IPTAT

I. INTRODUCTION

Q1{N)

Q2

Aprecisionvoltage reference isalways essentialin many applications suchasdata andpower converters. To achieve

a precision voltage over a wide range oftemperature, the bandgap circuit is most frequently adopted. In CMOS

technology, a parasitic vertical bipolar junction transistor Fig. 1. Architecture ofthe CMOS bandgap reference. (BJT) formed in p- or n-wells isusually usedto implement

the bandgap circuit [1]. The emitter-base voltage of the

parasitic verticalBJThasanegativetemperature coefficient. In recent years, demands for low-voltage bandgap By compensating the temperature characteristics of the reference circuits have increased enormously due to emitter-base voltage, bandgap references can work over a widespread applications of portable electronic appliances. broad range of temperature. High-order compensation is Bandgap voltage reference works use either resistive generally utilizedto obtainalowtemperaturecoefficient[1]- subdivision or low threshold voltage devices to overcome the [3]. A

2nd_order

temperature-compensated bandgap low supply voltage issue [4], [5]. To operate under a low reference based on a temperature-dependent resistor ratio voltage environment, the restraint of opamp is significant scheme [3] is presented in this paper. The two different and should be considered. A pre-amplifier stage is utilized positive-temperature-coefficient resistors, poly resistor and in theopamp design to lower the limitation of supply voltage diffusionresistor, in CMOS process areused to

implement

in this design. It could be operated with a supply voltage the temperature-dependent resistor ratio. A new

trimming

down to 1.5 V.

method is further utilized

_fro

_{prcs deito wihu}to prevent_any resistor ratio values_{trimmi In Section}

_II,

_{a brief}

_analysis

_{of the}

_bandgap

fromuprocess.deviation

without any

expensive

g architectureis introduced. The proposedtrimming technique is explained in Section III. The measured results are

presentedinSectionIV.

This work issupported by the National Science Council, Taiwan,R.O.C.

VDD 2nd -order temperature compensation of the bandgap

4 . 4,i, reference can beachieved.

| |Vbias je

Vdsp(sat)j

B. Low

Voltage Opamp

Design

- j

~~~~~The

minimum

suppiy

voltage

is limited

by

the two

-Al

'I 'IT 1 factors

[4].

The Ist factor is the reference

voltage

around

,M9 M10 1.25 V. As shown in

Fig. 1,

the

supply voltage

is limited

by

Vout

lVgspl

+ l.,

__+ ~~~~~~~~VDD>VREF +

IVdsp(sat)

.(3)

The2ndfactor is

low-voltage design

of

IPTAT

generation loop

Vin- , Vin+ limited by the common-collector structure of the parasitic

j-Vdsn(sat)j

lF|pvertical

BJT and the

input

common-mode

voltage

of the e M1' , e M2'

1opamp.

_{amplifier input}

The opamp is therefore designed with an nMOS pre-

_stage

_(Ml',

M2',

M3 and

M4)

followed

by

a

pMOS

differential-pair

stage

(MI

and

\2)

for

low-voltage

17 1 M51 - 1M6 1 M8 operation of the bandgap circuit. It is illustrated in Fig. 2.

The lower limitation of supply voltage can beexpressedas

Fig. 2. Opamp with a pre-amplifier input stage. VDD > Vdsn(sat)+ Vgsp + Vdsp(sat)

1.

(4)

VDDis allowedtogounder1.5 Vwithproperdesign.

II. BANDGAP REFERENCE _VDD

A. Curvature-CompensatedCMOSBandgap Reference

The architecture of the bandgap reference circuit is Q 1

12+13

illustrated in Fig. 1. By compensating the emitter-base voltage ofQ2, a stable voltage reference over a wide range oftemperaturecould begenerated. Acurrent proportionalto

absolute temperature, IPTAT, is produced and used to a

compensate the negative temperature coefficient of the

emitter-base voltage through the negative feedbackeffect of VR (+(

12)

R R

12

theopamp. IPTATcanbepresentedas , b

I kT-T 12 13

1PTAT = RqIn(N)

where k is the Boltzmann's constant, q is the charge ofan electron, andNis the emitter-area ratio ofQI andQ2. The

two different resistors are both with positive temperature Fig.3. ConceptualoperationoftrimmingforincreasingR. coefficients. RI, R2,andR4arepoly resistors whileR3isa

P+ diffusion resistor.

When

IPTAT passes through two

resistors of different materials, R2 and R3, the reference VDD

voltage,VREF, canbe derivedby

FR2 R(T 1 kT

Ii~~~~~~~~~~~~~1

12+13

VREF =

VEB2

+ 3+ ln(N) +

EB2[R1

R1(T0)

(2)

R3(T) (K_{*( -K ).ln(N).} k T_-(T-T)

VR=(1112)-R

a

RI(T0) pdiff poyq >

where VEB2 the emitter-base voltage of Q2,

TO

is the 1 b 1

referencetemperature,

K0ol,

is thetemperature coefficient of

poly resistor, and Kpdiff is the temperature coefficient ofP± I diffusion resistor. Due to the temperature coefficient

difference between the two resistors of different materials, a =

Fig. 4. Conceptual operation of trimming fordecreasing R.

factor in deciding the effect ofcompensation and therefore theperformance ofthebandgap reference. Inorderto ensure

the two ratios are correct, a new trimming technique is (

ID)I1

proposed.

Instead of conventional resistor

trimming,

e.g.

S + laser cut, to adjustthe voltage across the trimmed resistor, currents over the resistors are controlled

by

switches to

rl obtain the same effect. Only the resistor, R3, that involves in S2 both coefficients of the 1st-order and the

2nd_order

terms is

12+13 trimmedinour

design.

< r2 i

s3

A. Principles ofthe TrimmingMethod

r3 As shown inFig. 3, R is the resistorto be trimmed and

S4 there isacurrent II (i.e.IPTATinourdesign), flowing through it originally. When trimming occurs by controlling digital

r4

switches,

an extra current 12 is added into this resistor

S5 12 segment. Therefore, the voltage across R changes from

RI11

to R

(11+12), namely,

aresistance value ofR12/11 is added.

0 r5 In addition, a

current

mirrormust be usedtomake 12 leave

S6< the pathafter flowing through R to ensure the extra current

12 13 could onlyaffect the "trimmed" resistor R.

S15 When decrease on resistance is required, instead of

j -

adding

current 12 on the resistor

R,

current should be

rl5 subtracted.

Current

subtraction can be implemented by

S16 S reversingthe current direction of

12

between nodes a and b

asshowninFig. 4. Thecurrentpassing throughRwouldbe 11 decreased from

I1

to

11-12.

Hence the resistance value of

the"trimmed" resistorRis subtractedbyRI2/I1.

Fig.5. Implementation ofthe trimmed resistor R3

B.

Implementations of

TrimmedResistor and Current

Thetwo factors that affect the accuracyof thetrimming VDD technique are the trimmed resistance and the extra

current

through

the

segment.

There are two methods that are

implemented

tocontrol the

efficiency

of these two factors in

our

design.

Vout Wp/Lp 2(Wp/Lp) 3(Wp/Lp) Wp/Lp In order to increase the precision of the trimming technique on resistance, R3 is practically divided into 15

12 CHI CH2 CH3 small segments with 16 switches,

SI

to

S16,

as illustrated in Fig. 5. Only one switch would beturnedon amongthese 16

R3 13 switches whenever

trimming

is

applied. Comparing

with

- .v one resistor segment only, the precision can be enhanced by

CHI CH2 CH3 15 times. The switches S+ and

S-

are used to control

12 CH2 CH3 whether the resistance is

required

to be increased or

decreased.

Toexpand theviability and precision of theextracurrent 12, 12 is practically composed of three channels ofcurrents controlled

by

current

mirrors with the ratio1:2:3 asshownin

Fig.

6.

Using

the

output,

Vout,

of the opamp to bias the

Wn/Ln 2(Wn/Ln)

3(Wn/Ln)

Wn/Ln mirrored transistors and setting switches CHI, CH2, and CH3 to control each channel, a combination of

currents

from one-unit

current

to six-unit

current

canbe realized.

Fig. 6. Implementationofthe trimmed current12. Ifthe unit extra current is i and each small segment has resistance r, the available trimming range could vary from III. TRIMMING TECHNIQUE

±90

_{The total trimmed resistor is a}

iPr

to -90

iPr

by using the two methods described above. fraction of

R3;

while the total Based on equation (2), the accuracy of the ratios of

R2/R1±

trimmed current is a fraction of

IPTAT

because the output of

R3(T0)/R1(T0)

and

R3(T0)/R1(T0)

is the most important 567

the opamp is used to mirror the trimmed transistors. After 1.12 VDD

1.5

v

trimming,

the reference

voltage,VREF,would

become 1.115 1.11

VREF V

~

LR1 +

R(Ta)

a.

(n(N))

k

1+

R3

(TO

) (+k T ) . (.0951

.(I+a-, -(K -K )ln(N). ~-(T* -T)

RI(TO) pdiff poly q 1.0

where ux and f

represent

the trimmed fractions of R3 and 20 30 40 50 60 70 80 90 100

IPTAT,

respectively.

_*

notrimming -i-trimming (°C)T IV. MEASUREMENT RESULTS Fig. 8. Measured temperature dependence with VDD=1.5 V

The proposed bandgap reference circuit in Fig. 1 with trimming techniques mentioned above is implemented in 0.35-pm CMOStechnology. The chip micrograph is shown

inFig.7withan areaof0.71

mm2

. The measured resultsare V. CONCLUSION

illustratedinTable

I.

Alow-voltage

2nd

-order curvature-compensated bandgap

8 shows the

temperature

dependence

of the reference circuit with a newtrimming technique is proposed with a

ig.

w s v of 1 performance of 10 ppm/ 0C at supply voltage 1.5 V. The

voltge wthsppl volage f 1. V. Whenoperted

technique

makes the

chip

adjustable and each state can be without

trimming,

the measuredtemperature coefficient is63

ppm/

0C and the reference

voltage

is 1.112 V. After restored

by

the

respective digital input. With

the

trimming

trimming,

the measured temperature coefficient goes down mechanism on

resistances,

a mismatch on resistance in

toIOppm/

'C.

The supplycuffentis5 5

~tA.

process canbe

effectively

corrected and therefore benefit the

to 10 ppm! 0C.The supply current is 55 ~iA.

performance

ofa curvature-compensated bandgap reference circuit

enormously.

ACKNOWLEDGMENT

The authors would like to thank Taiwan

Chip

Implementation Center and Dr. Poki Chen for support and assistance.

REFERENCES

[1] B. -S. Song and P. R. Gray, "A precision curvature-compensated

CMOS bandgap reference,"IEEEJournal of Solid-State Circuit,vol. C-18Ipp.63-643 Dec.193

[2] J. M. Audy, "3rd ordercurvature correctedbandgap cell," inProc. 38th MidwestSymp. Circuits and systems, vol. 1, 1996, pp. 397-400. Fig.7. Chip micrograph ofthe bandgap voltage reference [3] K. N. Leung, P. K. T. Mok, and C. Y. Leung, "A 2-V23-giA

5.3-ppm/°C curvature-compenstated CMOS bandgap voltage reference," IEEEJ.Solid-StateCircuits, vol. 38,no.3, pp. 561-564,Mar.2003. TableI. Summaryofthe measured results [4] K. N.

Leung,

and P. K. T.

Mok,

"A sub-1-V 15-ppm/°C CMOS

bandgap voltagereference without requiringlow threshold voltage

Technology CMOS 0.35-,um device," IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 526-530,

Apr.2002.

Supply voltage 1.5V [5] H. Banba, H. Shiga, A.

Umezawa,

T. Miyaba, T. Tanzawa, S. Atsumi, Referencevoltage 1.112V and K. Sakui, "A CMOS bandgap reference circuit with sub-1-V operation," IEEEJ. Solid-StateCircuits, vol. 34, pp. 670-674, May Temperaturecoefficient 10ppm/°C 1999.

Chiparea 0.71 mm2

Supplycurrent 55 ,uA