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A 62.8 mW 4x4 MIMO-OFDM Modem with One-Symbol-Locked Timing Recovery, Frequency-Dependent I/Q Mismatch Estimation and Adaptive Equalization

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IEEE Asian Solid-State Circuits Conference November 16-18, 2009 / Taipei, Taiwan

978-1-4244-4434-2/09/$25.00 ©2009 IEEE 381

15-4

TABLE I SYSTEMPARAMETERS RF Frequency 2.4 GHz Signal bandwidth 20 MHz # of data carriers 52 FFT size 64

Modulation BPSK, QPSK, 16-QAM, 64-QAM

Subcarrier spacing 312.5 KHz Symbol duration 4 ȝs ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... (a) (b)

Fig. 1. (a) Block diagram of the 4×4 MIMO-OFDM system. (b) Packet format.

A 62.8 mW 4×4 MIMO-OFDM Modem with One-Symbol-Locked Timing Recovery,

Frequency-Dependent I/Q Mismatch Estimation and Adaptive Equalization

Ming-Fu Sun, You-Hsien Lin, Wei-Chi Lai, Ta-Yang Juan, Cheng-Yuan Lee, Yen-Her Chen, Chang-Ying Chuang, and Terng-Yin Hsu

Dept. of Computer Science, National Chiao Tung University, Hsinchu, Taiwan Email: {mfsun, tyhsu}@csie.nctu.edu.tw

Abstract—A 4×4 multi-input multi-output (MIMO) orthogonal

frequency-division multiplexing (OFDM) modem with one-symbol-locked timing recovery, anti-I/Q mismatch frequency recovery, frequency-dependent I/Q mismatch estimation and adaptive equalization is implemented in 0.13-ȝm CMOS library. This chip occupies 4.6×4.6 mm2 and consumes 62.8 mW at 1.2 V.

I. INTRODUCTION

The combination of multi-input multi-output (MIMO) transmission, orthogonal frequency-division multiplexing (OFDM) technology, and space-time block code (STBC) scheme comprises a potential solution for next-generation wireless communications [1]. However, MIMO-OFDM systems are sensitive to sampling clock offset and carrier frequency offset (CFO). In addition, direct-conversion receivers suffer from I/Q mismatch (IQM). IQM arises when the phase and gain differences between I and Q branches are not exactly 90° and 0 dB, respectively. Due to the impairment in the analog components, the mismatched low-pass filters result in frequency-dependent IQM (FD-IQM) [2]. In an MIMO-OFDM system with FD-IQM, the FD-IQM parameters for every subcarrier are different. Moreover, the ability of adaptive equalization is required due to time-varying environments. For successful transmissions, obtaining accurate channel frequency response (CFR) is extremely important. Owing to the above considerations, an MIMO-OFDM modem is proposed for fast timing recovery, anti-IQM frequency recovery, FD-IQM estimation and adaptive frequency-domain equalization.

II. SYSTEM OVERVIEW

Fig. 1 shows the block diagram of 4×4 STBC MIMO-OFDM modem and the packet format. In Table 1, key parameters of this system are summarized. This system operates at 2.4 GHz band with 20 MHz bandwidth. In the transmitter, all the transmit chains uses the same oscillator as well as in the receiver. The first part of the packet consists of legacy training sequence identical to IEEE 802.11a/g. The second part of the packet is the high throughput (HT) training sequence identical to IEEE 802.11n. The receiver uses the preambles to complete packet detection , synchronization, and channel estimation. The CFO estimation is summed over all receive chains and applied to all received signals. A preamble-assisted estimation is applied to circumvent the FD-IQM with CFO. To equalize the CFR of the time-varying environments, this receiver applies an adaptive equalizer in conjunction with

the STBC decoder. Spatial streams are then demodulated to bit-level streams, which are de-interleaved and merged into a data stream. Finally, the data stream is decoded by the forward error correction (FEC) decoder.

III. ARCHITECTURE AND CIRCUITDESIGN

The receiver architecture is shown in Fig. 2, consisting of four major parts: timing recovery, frequency recovery, FD-IQM estimation and adaptive equalization.

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382 Fig. 2. Block diagram of the 4×4 MIMO-OFDM receiver.

...

...

...

...

Fig. 3. Architecture of the timing synchronizer.

-jǻșt

e

ǻș i

s

Fig. 4. Architecture of the anti-I/Q mismatch auto-frequency controller.

l -2j(ǻȦ(n+N )t) -2j(ǻȦnt) e -e -j(ǻȦnt) e  k k B A

Fig. 5. Architecture of the frequency-dependent I/Q mismatch estimator.

A. One-Symbol-Locked Timing Recovery

Fig. 3 shows the proposed timing recovery circuit. The synchronization includes packet detection and boundary detection. For packet detection, auto-correlation method is applied to determine the signal. Due to multiple receive antennas, correlation functions are summed over all the antennas to maximize detection performance. To perform the boundary detection, the modem then correlates the received signal with ideal short preamble. With the parallel cross correlation, the correlation power is obtained to indicate the symbol boundary index. The phase searcher then works in conjunction with a 22-phase multiphase generator to lock the optimal phase in one symbol period.

B. Anti-I/Q Mismatch Auto-Frequency Controller

Since the simultaneous occurrence of CFO and IQM significantly degrades the system performance, an anti-IQM auto frequency controller is developed by the pseudo CFO (P-CFO) technique [3]. The P-CFO algorithm rotates three training symbols by adding extra frequency offset into the received training sequence to improve CFO estimation. The purpose of extra CFO is to resolve the transformation error resulting from noise disturbances. Let s and i 'T be the

rotated short preambles and the pseudo offset, respectively. The CFO 'f can be obtained as follows (please refer to [3] for detailed derivation),

1 3 1 1 3

2 1 1 2

Im{ } Re{ } Im{ } Re{ } 1

cos

2 s s Im{ } Re{ } Im{ } Re{ }

s s s s f N T s s s s R Q  ž  ¬­­ %  žž ­­ % ž  Ÿ ® (1) whereN and s T denote the samples of a short preamble and s

the sampling period, respectively.

Fig. 4 shows the P-CFO architecture. The P-CFO is comprised of P-CFO shifter, CFO calculation and inverse cosine. When preambles are arrived, P-CFO shifter module multiplies the received preambles by additional pseudo offset. CFO calculation module then uses these rotated preambles to do correlation. After CFO calculation, the result is sent to inverse cosine look-up table. Inverse cosine module finds the angle, and removes the pseudo offset to extract the final CFO.

C. Frequency-Dependent I/Q Mismatch Estimation

Let ( )r n and ( )w n be the received signal and additive

white Gaussian noise, respectively. The baseband signal with CFO 'f and FD-IQM is given by [2], [4]

2 2 ( ) ( ( ) ( )) ( ) ( ( ) ( )) ( ) ( ) s s j f nT j f nT y n n n r n e n n r n e w n Q Q BZ C Y CZ B Y ¸% ¸  ¸% ¸    (2)

where B and C denote the constant IQM parameters, ( )Zn

and ( )Yn represent the FD-IQM parameters. The symbol “  ” represents the convolution operator. Fig. 5 depicts the architecture of FD-IQM estimator. The basic strategy for extracting IQM parameters is to employ long preambles. Let

( )

x n and x n( Nl) represent two consecutive long preambles, as defined in (2), where N is the samples of a l

long preamble. Firstly, two long preambles are multiplied by the estimated CFO. To reduce the image interference due to the IQM effect, the first long preamble subtracts the second long preamble. At the same time, the conjugate preamble follows the same procedure described above. Because the long preambles are periodic, the received signals, ( )r n and

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383 k R ˆk X Pr ea mb le s k H 1 2 2 1 | | | | u v u v v u u v v u    ¯   ¯ ¡ ° ¡ °  ¡ ° ¡  ° ¡ ¡ ° ¢ ± ¢ ±

Fig. 6. Architecture of the adaptive equalizer.

( l)

r n N is replaced by ( )r n . Therefore, the following

equations hold:  %  %  %  %      (2 ) (2 ( ) ) 1 2 (2 ) 2 (2 ( ) ) ( ) ( ) ( ) ( ( ) ( )) ( ) s l s s l s j fnT j f n N T l j fnT j f n N T x n e x n N e y n e e n n r n Q Q Q Q CZ B Y (3)

 %  %  %  %      (2 ) (2 ( ) ) 2 2 (2 ) 2 (2 ( ) ) ( ) ( ) ( ) ( ( ) ( )) ( ) s l s s l s j fnT j f n N T l j fnT j f n N T x n e x n N e y n e e n n r n Q Q Q Q BZ C Y (4) The IQM parameters can be obtained as follows.

\

^

\

^

  1 2 FFT ( ) FFT ( ) N k k N y n B A y n (5)

With the estimated IQM parameters, the frequency-domain compensation is given by

\

 %

^

\

 %

^

     ¬­ ž ­ž  ­­ žŸ ® (2 ) (2 ) FFT ( ) j fnTs k FFT ( ) j fnTs N N k k k k k k k compensation gain B x n e x n e A B B A H X A Q Q (6)

From (6), the compensation gain can be balanced by the channel equalizer.

D. Adaptive Frequency-Domain Equalizer

In this 4×4 STBC MIMO-OFDM modem, the following code matrix is chosen

1 2 3 4 2 1 4 3 3 4 1 2 4 3 2 1 c c c c c c c c c c c c c c c c     ¯ ¡ ° ¡   ° ¡ ° ¡ °  ¡   ° ¡ ° ¡ ° ¡ ° ¢ ± C (7)

where c represents the transmitted complex data on the i

subcarrier. Let r denote the kth received subcarrier at the ith i k,

symbol duration. The received data over four consecutive symbol periods at receiver one is expressed as

1, 1, 2, 3, 4, 1, 1, 2, 2, 1, 4, 3, 2, 2, 3, 3, 3, 4, 1, 2, 3, 4, 4, 4, 3, 2, 1, 4, k k k k k k k k k k k k k k k k k k k k k k k k k k k k r h h h h x w r h h h h x w x r h h h h w x r h h h h w   ¯   ¯ ¡ °  ¯   ¯ ¡ ° ¡ °¡ ° ¡ ° ¡ ° ¡   °¡ ° ¡ ° ¡ °¡ °¡ ° ¡ ° ¡ ° ¡   °¡ ° ¡ ¡ ° ¡ °¡ ° ¡ ¡ ° ¡ °¡ ° ¡ ¡ °   ¢ ± ¡ ¢ ± ¡¢ °± ¢ ± 11, 12, 21, 22, k k k k k k k k k k ° ° ° °   ¯ ¡ ° º  ¡ ° ¡ ° ¢ ± H H R H X W X W H H (8)

where h is the channel frequency response for the kth i k,

subcarrier from the ith transmit antenna to the receiver and

, i k

w is the noise term. The received symbols can be decoded

by the STBC decoder with the estimated CFR, i.e.,

1

ˆ

k  k k

X H R . The CFR matrix H k can be inverted

blockwise using the following inversion formula [5]

1 1 1 1 1 1 11, 11, 12, 21, 11, 11, 12, 1 1 1 1 21, 11, k k k k k k k k k k k k k k              ¯ ¡ °  ¡ °  ¡ ° ¢ ± H H H D H H H H D H D H H D (9) where 1 22, 21, 11, 12, k  k k k k

D H H H H . It can be verified that all submatrices in H are Alamouti-like matrices [6]. Due to k

time-varying effects, the estimated CFR is not consistent within the entire packet. Therefore, the received data can be rewritten as

Rk  Hk %H Xk k Wk [10] In the adaptive procedure, the residual term %H Xk k is calculated to update the channel state information.

Fig. 6 shows the adaptive equalizer. In this adaptive equalizer, data carriers are applied to measure channel variations, namely, virtual pilots. The one-shot estimator is adopted to measures an initial CFR obtained from long preambles. The de-mapper outputs the point of QAM constellation that has the minimum distance to its input. Due to time-varying fading, the decoded symbol contains a residual term that causes a decision error. The difference between ideal code sets and received symbols is used to extract channel variations. After calculating channel variations, CFR is updated. Notably, the inverse of an Alamouti matrix is still an Alamouti-like matrix. Only half of the Alamouti-like matrix must be computed – the other half can be obtained from the first half via sign-flipping operations. This characteristic is extremely useful as it can be exploited to derive an efficient architecture.

IV. VERIFICATION AND IMPLEMENTATION RESULTS Fig. 7(a) displays the experiment setup for verification. The in-house RF front-ends are used in the transmitter as well as in the receiver. Therefore, there is also IQM at the transmitter part. Some compensation methods for transmitter IQM are available in the open literature. A pre-compensation scheme is applied to reduce the transmitter IQM [7]. The basic concept is that a training sequence is utilized to estimate the transmitter IQM. After IQM parameters estimation, the transmitter can compensate for the transmitter IQM using the baseband processing. This design is mapped onto the FPGA chips (Xilinx Virtex-II) with on-board 14-bit digital-to-analog

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384 (a)

(b)

Fig. 7. (a) Verification platform. (b) QAM constellation performance.

Fig. 8. Die photograph and chip summary. TABLE II SUMMARY OF RELATED WORKS

[8] [9] [10] This work

System 2×2 MIMOOFDM 2×2 MIMO OFDM 3×3 MIMOOFDM 4×4 MIMOOFDM

Process 0.18 0.18 0.18 0.13

Package 165 BGA 208 LQFP 304 BGA 160 CQFP

Modulation 16/64-QAMB/Q-PSK, 16/64-QAM B/Q-PSK, 16/64-QAMB/Q-PSK, 16/64-QAMB/Q-PSK, Design BasebandMAC + Baseband BasebandMAC + Baseband

Gate count N/A 4.8 M 14.2 M 2.58 M

Supply voltage 1.8 V Core 1.8 V Core, 3.3 V I/O 1.8 V Core, 3.3 V I/O 1.2 V Core, 3.3 V I/O Power (RX) (current) 275 mA 774 mW @ 120 Mb/s 972 mW 62.8 mW @ 62.4 Mb/s Die area 18 mm2 15.2 mm2 62.1 mm2 21.2 mm2 converters (DACs). The signal is then transmitted by the

in-house RF front-end. Since it is essential to make MIMO transmission coherent at all antennas, there is an additional DAC as a hardware trigger, namely “Trigger”. At receiver part, the down-converted signal is fed into 14-bit analog-to-digital converters (ADCs) for further processing. Fig. 7(b) shows the constellation performance. The error vector magnitude (EVM) after the compensation is 8.6% (–21 dB).

This design is implemented in a standard 0.13-ȝm CMOS library. In this chip, the Viterbi decoder is not implemented (limited by chip area). The efficient throughput is 62.4 Mb/s with a 64-QAM modulation at 20 MHz in 4×4 STBC mode since one adaptive procedure requires 24.6 ȝs to measure 4 OFDM symbols (256 carriers). The memory requirement for the adaptive equalization is 50 K bits. The power consumption is about 62.8 mW with 266 Hz Doppler frequency tolerance at 1.2 V voltage. Die photograph and chip summary are shown in Fig. 8. Table II summarizes the current MIMO-OFDM system implementation results. This work provides a prototype for 4×4 STBC MIMO-OFDM system design.

V. CONCLUSIONS

This paper presents a 4×4 MIMO-OFDM modem with one-symbol-locked timing recovery, anti-IQM frequency controller, FD-IQM estimation and adaptive frequency-domain equalization. This 4×4 MIMO-OFDM modem is fabricated in a 0.13-ȝm CMOS process with 4.6×4.6 mm2 area

and 62.8 mW power consumption at 1.2 V. ACKNOWLEDGMENT

This work was conducted under “A plan to actively participate in international standard organizations for wireless communications” of the Institute for Information Industry, MOEA, and supported by the NSC under Grant NSC97-2220-E-009-016. This work was also supported by National Chip Implementation Center (CIC) for chip fabrication and testing.

REFERENCES

[1] T. K. Paul and T. Ogunfunmi, “Wireless LAN comes of age: understanding the IEEE 802.11n amendment,” IEEE Circuits and

Systems Magazines, first quarter, 2008.

[2] L. Anttila, M. Valkama, and M. Renfors, “Frequency selective I/Q mismatch calibration of wideband directconversion transmitters,” IEEE

Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 4, pp. 359–363, April

2008.

[3] M. F. Sun, J. Y. Yu, and T. Y. Hsu, “Estimation of carrier frequency offset with I/Q mismatch using pseudo-offset injection in OFDM systems,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 3, pp. 943–952, April 2008.

[4] F. Horlin, S. De Rore, E. Lopez-Estraviz, F. Naessens, and L. Van der Perre, “Impact of frequency offsets and IQ im-balance on MC-CDMA reception based on channel track-ing,” IEEE J. Select. Areas Commun., vol. 24, no. 6, pp. 1179–1188, June 2006.

[5] G. H. Golub and C. F. Van Loan, Matrix Computations, The Johns Hopkins University Press, 1996.

[6] S. M. Alamouti, “A simple transmit diversity technique for wireless communications,” IEEE J. Select. Areas Commun., vol. 16, no. 8, pp. 1451–1458, October 1998.

[7] J. Tubbax, B. Come, L. Van der Perre, S. Donnay, M. Moonen, and H. De Man, “Compensation of transmitter IQ imbalance for OFDM systems,” in Proc. IEEE International Conference on Acoustics, Speech,

and Signal Processing, pp. 325–328, May 2004.

[8] A. Behzad, et al., “A fully integrated MIMO multiband direct conversion CMOS transceiver for WLAN applications (802.11a),”

IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2795–2808, Dec. 2007.

[9] Y. Jung, J. Kim, S. Lee, H. Yoon, and J. Kim, “Design and implementation of MIMO-OFDM baseband processor for high-speed wireless LANs,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 7, pp. 631–635, July 2007.

[10] P. Petrus, et al., “An integrated draft 802.11n compliant MIMO baseband and MAC processor,” IEEE ISSCC, Feb. 2007.

數據

Fig. 1 shows the block diagram of 4×4 STBC MIMO- MIMO-OFDM modem and the packet format
Fig. 4. Architecture of the anti-I/Q mismatch auto-frequency controller.
Fig. 6. Architecture of the adaptive equalizer.
Fig. 8. Die photograph and chip summary.   TABLE II S UMMARY OF  R ELATED  W ORKS

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