A Synchronization Method for Crystal-Less
OFDM-Based Wireless Body Area Network Applications
Hsiao-Han Ma, Chien-Ying Yu, Jui-Yuan Yu, and Chen-Yi LeeDepartment of Electronics Engineering, National Chiao-Tung University, Taiwan R.O.C. Email: {playpony, cyyu, jyyu, cylee}@si2lab.org
Abstract—A synchronization method includes packet detection
and frequency error estimation (PAFEE) is proposed for crystal-less OFDM-based wirecrystal-less body area network (WBAN) applications to enlarge the frequency error tolerance between the transmitter and receiver. The packet detection method is designed to overcome the large frequency error. The estimated frequency offset (FO) value is provided to a crystal-less tunable clock source. The evaluation platform is the eCrystal WiBoC OFDM-based system. The system overall frequency error tolerance is extended 140x of existing wireless systems. The system is designed and simulated in a 90nm technology with 148.5W computation power and 0.06mm2 area overhead. Comparing to quartz crystal systems, the overall power reduction is 89.3%, and area reduction is 98.4%.
Keywords- crystal-less; OFDM; Synchronization; WBAN
I. INTRODUCTION
Wireless body area network (WBAN) system has been made for short distance communications. One potential application is to monitor the human body signal in everyday life. It is composed by a multiple of wireless sensor nodes (WSN) and one central processing node (CPN). The WSNs are placed on human body. They are used to gather signals and transmit to a remote CPN wirelessly. The WSNs require transceivers that are small, inexpensive, and power efficient. To achieve better integration and less power, more cost-effective baseband chip applications, the crystal-less system is explored.
There are some existing customized solutions for WBAN crystal-less communication systems [2-5]. The design in [2-3] uses a fully integrated oscillator with 1.1% frequency error after calibration. The frequency error tolerance is achieved by employing the wide-band impulse based modulation and sacrificing data rate. However, the impulse based modulation can not be applied to general standard systems. The design in [4] has one ring oscillator with 2.5% clock error as its system clock. The heterodyne architecture and envelope detector are used in demodulation mechanism and enables in a crystal-less system. The modulation is dedicated and also hard to contribute to a general system. The design in [5] has 1% frequency error in its clock source. It uses a frequency offset recovery approach to calibrate the clock error to 6.5 ppm. The system needs an extra training sequence for frequency convergence, and hence its data rate is restricted. The existing crystal-less solutions are all operated with low data rate. In our approach, a high data rate crystal-less WBAN system can be achieved.
A system defined as wireless body on the chip (WiBoC) [6] based on the OFDM scheme is previously proposed. To achieve the crystal-less WiBoC system, some issues need to be further addressed. The self-calibrated eCrystal oscillator [1] is adopted in the system and is able to provide 5MHz clock frequency with maximum frequency drift 0.28%. Our motivation is to design a baseband calibration algorithm to detect the clock error and compensate the frequency mismatch between the transmitter and the receiver through the eCrystal. In this paper, we proposed a synchronization method, which is called as packet detection and frequency error estimation (PAFEE) method to overcome the problems due to large frequency mismatch in the eCrystal communication system.
The PAFEE calibration mechanism happens in the downlink process, the synchronizer detects the packet and the frequency estimator estimates the frequency error by the downlink preambles. The estimation result is provided to the eCrystal and adjusts it to the correct frequency. Finally the frequency error is less than 20 ppm. After the downlink process, the baseband clock is tuned accurately. The uplink process and the system performance remain the same. The PAFEE method is implemented in digital baseband signal processing and the hardware architecture achieves low-power, low-cost, tiny area, and high integration with little hardware overhead.
This paper is organized as follows. In section II, the system behavior of the eCrystal WiBoC system is depicted, and section III shows the algorithm flow and the details of the proposed PAFEE method. The simulation results of system performance are provided in section IV. Finally, a conclusion is given in section V.
II. SYSTEM DESCRIPTION
A. System Behavior
In the WiBoC system, the CPN is integrated in the portable devices. The clock generator in CPN is from that existing devices, provides accurate clock source. In contrast, the baseband clock provider in WSN is the eCrystal.
The downlink is defined as that CPN transmits the packets to WSN. The uplink is defined the packets are transmitted from WSN to CPN. The downlink process will help WSN to detect the packet and calibrate the frequency error by the PAFEE method.
This work was supported by MOEA of Taiwan, R.O.C., under Grant 96-EC-17-A-03-S1-0005, and UMC University Program respectively.
W S N C P N Downlink Uplink Reset Reset eCrystal + PAFEE eCrystal + PAFEE Crystal
Fig.1. System operation of the proposed eCrystal WiBoC system
L GI Long Preamble PAFEE Boundary Detection
Fine CFO Estimation Channel Estimation Short Preamble 64 32 64 Long Preamble 64 Short Preamble 64 12 short preamble Short Preamble 64
Fig.2. Downlink preamble in the eCrystal WiBoC system
The preamble format is self-defined as shown in the Fig. 2. The short preamble is composed by 12 frequency tones in frequency domain. We take the advantage of the specialties of the short preamble to operate the PAFEE method. The baseband bandwidth of the eCrystal system is 5MHz. The RF frequency is from 1395MHz to 1400MHz which is known as Wireless Medical Telemetry Services (WMTS).
B. System Block Diagram
Fig. 3 shows the system block diagram of the WSN in the eCrystal WiBoC platform.
In the downlink process, the WSN detects the downlink preamble from the CPN by the packet detector. After the packet detection, the phase rotator calculates the signal phase between two carriers and calibrates the received signal after all. The frequency error estimator performs the frequency error estimation during the time that receiving the short preambles. The overall frequency error is the summation of the amount estimated by the phase rotator and the frequency error estimator. This estimation error amount is fedback to the eCrystal. The clock generator in the eCrystal will generate the accurate clock in a short period (i.e., within one cycle), and the data after the short preamble (i.e., long preamble) will not be lost. Then the boundary detection and fine CFO estimation is operated.
After the clock is tuned accurately, WSN starts to gather the body data and insert it behind the preambles in the uplink packet and transmits to the CPN.
III. THE PROPOSED PAFEEMETHOD
The algorithm flow of the proposed PAFEE is shown in Fig. 4. In the beginning, the packet detector starts to detect the packet all the time. Once the packet has been detected, the first fraction frequency offset (FFO), is estimated by the phase rotator according to the inner product of the repeated symbol. The phase rotator compensates the received data and reduces the FFO for the next procedure. After that, the correlation bank search for the position of pilot tone in the frequency domain by
the cross-correlation results. Therefore the integral frequency offset (IFO) is estimated. The summation of the FFO and IFO are sent to the eCrystal and calibrate the frequency mismatch from the CPN side.
This procedure is iterative by N times. The 4 short preambles are used each iteration. N depends on the required performance, and N=3 in our system. After that, the eCrystal is supposed to be tuned accurately and the coming data will be recovered by the adjusted clock. In other words, by the N iteration time, the eCrystal is accurate at 5MHz. Then the boundary detector performs the boundary detection. The further fine FFO estimation value has been estimated.
The downlink short preamble has good properties for us to detect the packet and estimate the frequency error. The following subsection introduces how the packet detector, phase rotator and correlation bank work from the downlink short preamble. D A C QPSK Mapper A D C IFFT Phase Rotator Packet Detector Fine CFO Estimator FEC Bitstream eCrystal
Wireless Sensor Node
R F Frequency Error Estimator Boundary Detector GI Insertion WSN_TX WSN_RX
PAFEE Method Syn.
Fig.3. The eCrystal WiBoC WSN system block diagram
Packet Detection Phase Rotation Correlation Bank Boundary Detection Fine CFO Estimation FFO IFO + FFO eCrystal Iteration N PAFEE Method IFO
Fig.4. Algorithm flow of the PAFEE method
A. Packet detection
Under the large frequency error conditions, the data will be distorted severely. Though the violent data loss, the likelihood between the repeated data still exists. Consider the minimum Euclidean and maximum likelihood issues, the timing metric V(n) is defined in (1) [8], where M is the auto-correlation length of the preamble.
2 1 2 0 1 2 0 * ( ) ( ) ( ) M i n i n M i M i n M i r r C n V n P n r
(1)The false alarm rate and detection rate of the V(n) can be derived. From the mathematics derivation, it shows that if the M increases, the ROC performance will be improved a lot. In our design, the M=32 is chosen for auto-correlation length.
B. Phase Rotation
The phase rotator detects the phase difference between two subcarriers. The processing is similar to the conventional carrier frequency offset (CFO) estimation method [7]. The equation is expressed as (2). 1 1 * 2 * 2 0 0 ( ) ( ) | | D D D j j n D n n n n n n n z r r r e r e r
1 2 0 (2) where D is the length of the preamble. In the first coarse estimation, we have that D=16. is the inner product of consecutive two preambles. The estimated FFO amount is computed in (3)z
1=(1/˅Ӹ)tan-1(z) (3) After this operation, the short preamble and remaining preambles are compensated by 1.
C. Correlation bank
To introduce the correlation bank, the attempt is to grab the frequency domain information by the correlation results. Fig. 5 shows the frequency error estimator block with phase rotator and correlation bank. After the packet detection, the FFO, 1 is estimated by the symbol inner product. The FFO of the data has been calibrated after all. The pilot tracer detects signal properties in frequency domain (i.e., The number and position of tones in frequency domain). Each branch in the correlation bank calculates the signal correlation results by the constant sequence, Si. The Si is the form expressed in (4).
Si = ifft ( [zeros(1, i*4) -1-j zeros(1,63- i*4)] ) (4) i is from 1 to 15
There are 15 branches in the correlation bank. The frequency shifted amount 2 can be decided by the pilot tracer. The overall frequency offset (FO) can be detected by
= 1 + 2 (5) Pilot Tracer
1 0 N n Estimated IFO Phase rotator Estimated FFO S1[n] S15[n] Select One ~Frequency Error Estimator
Estimated FO
Fig.5. The block diagram of frequency error estimator
The estimation value is sent to the eCrystal, the WSN clock can be tuned accurately.
IV. SIMULATION RESULTS
Fig. 6 shows the Detection rate under different FO and SNR conditions. In the WiBoC system, the performance target is packet error rate (PER) 1% @ SNR 5.4dB. To guarantee the PER performance not loss, the detection rate have to be 1 under SNR = 2dB. In other words, the detection rate is guaranteed to be 1 under SNR = 2 dB by the PAFEE method, and the PER performance is not loss.
For the estimation performance of frequency error estimator, the estimation correct rate is defined as Pec, which is 1 when the estimation error is smaller than 20 ppm. The worst case of the Pec under large frequency error is 0.967 from the simulation. After the N iteration, the new Pec is shown as (6).
Pec’=1-(1- Pec)N (6) The Pec’ will achieve 1 when N is bigger than 3. So we chose the iteration number, N=3 in our design.
The overall system performance is illustrated in Fig. 7. The performance target is packet error rate (PER) 1%. Apply the conventional method, the system tolerate frequency error below 100 ppm. The system performance can not coverage under large frequency error conditions like 2800 ppm, i.e., PER = 100 %. With the PAFEE method, the system can tolerate 2800 ppm larger frequency error and the performance remains the same, i.e., SNR=5.4dB at FER=1%.
Fig.6. Detection Rate under different FO and SNR conditions
2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 10-4 10-3 10-2 10-1 100 SNR [dB] Pa c k e t Er ro r R a te ( PER ) Iteration N = 3 Conventional, FO = ±100 ppm Proposed , FO = ±2800 ppm Conventional, FO = ±2800 ppm Frequency Error Estimator Packet Detector Phase Rotator
Fig.7. System performance between the conventional and proposed
The proposed PAFEE method in the eCrystal WiBoC enables a f2800 ppm frequency error, contributing the OFDM-based WBAN communication SoC design. The same method is able to apply to another OFDM-based standard system.
Fig.8. WSN design layout view
V. CONCLUSION
The synchronization PAFEE method is proposed in this paper. With this proposal, the frequency error tolerance in the communication system is extended. The crystal-less OFDM-based platform is achieved. This proposal achieves low-power, low-cost, tiny area and high integration in miniaturized WBAN communication SoC design.
The overall design characteristic is described as followed. The design hardware is evaluated in 90nm standard CMOS process. The layout of the PAFEE part is illustrated in Fig. 8. The PAFEE part occupies 420 m × 420 m, including the packet detector, the phase rotator, and the frequency error estimator. The remaining area is composed by the input FIFOs. The overhead power and area of the PAFEE method are 60104 m2
and 148.5 W respectively compared to the conventional approach.
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TABLE I summarizes the system performance in crystal and the eCrystal WiBoC. In the crystal platform, the main components for clock generation are the external crystal and crystal oscillator pad. The external crystal oscillator occupies large area and makes it difficult to implement miniaturized SoC design. Compared to the overhead components in the eCrystal system, the area of PAFEE and the eCrystal occupies only 0.46mm2, which have 98.4% area reduction from quartz crystal system. The oscillator pad consumes a lot of power in the crystal system. The power overhead in the eCrystal system is only 385.5W, which has 89.3% power reduction from the crystal system.
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COMPARISON BETWEEN CRYSTAL AND THE ECRYSTAL
WiBoC on crystal platform
WiBoC on the eCrystal platform Hardware overhead crystal oscillator [9] oscillator pad proposed PAFEE eCrystal [1] 8.00 0.0147 0.06 0.40 Area overhead (mm2) total: 8.01 total: 0.46 1.8 3625 148.5 237 Power
overhead (W) total: 3626.8 total: 385.5
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