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A low-power ASIC design for cell search in the W-CDMA system

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Fig. 1. Sample-point reordering.
Fig. 4. Hybrid EGC-HMF detector for PSC. D i: Delay for i clocks. It is implemented by using a shift register with i fields.
Fig. 6. Simulation results using the new magnitude approximation. (In a frequency nonselective Rayleigh channel with frequency oset = 0 kHz, Doppler frequency = 200 Hz).
Fig. 7. Power consumption of different blocks.

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