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RF noise in 0.18-mu m and 0.13-mu m MOSFETs

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464 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 12, NO. 12, DECEMBER 2002

RF Noise in 0.18-

m and 0.13-m MOSFETs

C. H. Huang, C. H. Lai, J. C. Hsieh, J. Liu, and Albert Chin, Senior Member, IEEE

Abstract—We have studied the gate finger number and gate length dependence on minimum noise figure ( min) in deep sub-micrometer MOSFETs. A lowest minof 0.93 dB is measured in 0.18- m MOSFET at 5.8 GHz as increasing finger number to 50 fingers, but increases abnormally when above 50. The scaling gate length to 0.13 m shows larger minthan the 0.18- m case at the same finger number. From the analysis of a well-calibrated device model, the abnormal finger number dependence is due to the combined effect of reducing gate resistance and increasing sub-strate loss as increasing finger number. The scaling to 0.13- m MOSFET gives higher mindue to the higher gate resistance and a modified T-gate structure proposed to optimize the min

for further scaling down of the MOSFET.

Index Terms—MOSFET, noise, RF, scaling trend, 0.13 m.

I. INTRODUCTION

A

S CONTINUOUSLY scaling down the VLSI technology, the RF gain of deep sub-micrometer MOSFET is im-proved so that it can be used for wireless communication. However, it is still not clear what the dependence of the scaling trend is on RF noise that limits the noise floor of an RF system. It is known that the noise figure ( ) of current Si RF ICs is still larger than the GaAs counterpart, but the excess noise in Si ICs may come from the passive devices [1] that can be largely suppressed by using ion implantation processes developed by us [1]–[4]. Therefore, further reduction of noise in Si RF ICs close to GaAs depends on optimizing the active MOSFETs. In this paper, we have used multifingered layout and device scaling to optimize the RF noise in deep sub- m MOSFETs. A lowest minimum ( ) of 0.93 dB is reached in 0.18- m MOSFET as increasing finger number to 50, but shows abnormal increase as finger number 50. The scaling to 0.13- m MOSFETs gives larger than 0.18- m devices at the same gate finger number. The abnormal finger dependence analyzed by a self-consistent dc, , and -parameter model is due to the tradeoff between decreasing gate resistance ( ) and increasing substrate loss [1]–[4] as increasing finger number. The gate length dependence is due to the increasing as scaling down from 0.18 to 0.13 m. However, the larger finger number will consume more device area and power that are opposite to the VLSI scaling trend. Besides, the current-gain cut-off frequency ( ) may also be degraded due to the increasing parasitic gate–body capacitance ( ) used for contact. Thus, further scaling down of the Manuscript received March 1, 2002; revised July 10, 2002. This work was supported by the UMC and by the NSC under 90-2215-E-009-052. The review of this letter was arranged by Associate Editor Dr. Arvind Sharma.

C. H. Huang, C. H. Lai, and A. Chin are with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan.

J. C. Hsieh and J. Liu are with United Microelectronics Cooperation, Hsinchu, Taiwan.

Digital Object Identifier 10.1109/LMWC.2002.805930

Fig. 1. NF and associated gain at 5.8 GHz of 0.18- and 0.13-m MOSFETs. The NF for gate finger number >70 are obtained from simulation using the well-calibrated device model.

MOSFETs will generate larger noise unless a modified T-gate MOSFET structure is used.

II. EXPERIMENTALPROCEDURE

To optimize the of MOSFETs, we have used multi-fingered layout and scaled gate length from 0.18 to 0.13 m, where the finger number is from 10 to 70 with 5- m finger width. This 5- m finger width is chosen by trading off reducing and increasing parasitic used for silicide gate–metal contact. Because the equals ( ), the use of too short a finger width with too many finger numbers will in-crease the and reduce the . The fabricated MOSFETs are first characterized by dc – measurements. Then, stan-dard -parameters are measured up to 20 GHz using a HP8510B network analyzer and on-wafer probes, de-embedded from the probe pad. The and associate gain are measured using ATN-NP5B Noise Parameter Extraction System up to 7.2 GHz that covers the most important frequency range for wireless communication.

III. RESULTS ANDDISCUSSIONS

Fig. 1 shows the finger and gate length dependence on mea-sured and the associate gain at 5.8 GHz for 0.13- and 0.18- m MOSFETs. It is noticed that when scaling down the MOSFET from 0.18 m to 0.13 m, the associate gain increases but also gives higher that is highly undesired. A lowest of 0.93 dB is obtained in 0.18- m MOSFETs with 50 fingers, which is close to or better than the data published in the literature [5]–[10] and compatible with GaAs HEMTs [11]. The in 0.13- m MOSFETs decreases monotonically while increasing gate fingers to 70, and a similar trend of decreasing while increasing fingers is also found in 0.18- m MOS-FETs, but shows an abnormal increase as finger number 50.

To understand such abnormal dependence on gate finger and length, we have used a self-consistent dc, , and -param-1531-1309/02$17.00 © 2002 IEEE

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HUANG et al.: RF NOISE IN 0.18- m AND 0.13- m MOSFETS 465

Fig. 2. Equivalent circuit model for 0.18- and 0.13-m MOSFETs. eter equivalent circuit model shown in Fig. 2 to simulate the de-vices and extract the important parameters. The device model contains an intrinsic BSIM3v3 model, additional to gate, and additional shunt impedances to simulate the substrate loss. The suitability of this equivalent circuit model is examined from the good agreement between measured and modeled data shown below.

Fig. 3(a)–(c) shows the measured and simulated – characteristics, -parameters up to 20 GHz, and up to 7.2 GHz of 0.13- m MOSFETs with the largest finger number of 70. Good agreements between simulated and measured dc – , -parameters, and are obtained for 0.13 m MOSFETs with 70 fingers. Similar good agreements between measured and modeled dc – , -parameters, and are also obtained in other finger numbers of 0.13- m MOSFETs and all finger numbers of 0.18- m MOSFETs (not shown). The good agreement between measured and modeled data for various gate finger numbers and gate length indicate the excellent accuracy of the equivalent circuit model that can be further used for device parameter extraction [3], [10].

Because the RF signal is input fromthe gate and amplified after passing though the output drain terminal, the dominant noise source is fromthe gate input terminal. This is because the noise in an amplification system is due to following equation [12]:

Thus, the noise of the system with amplification is governed by the input stage, where is the gain of each stage amplifier. Fig. 4 shows the dependence of extracted and gate substrate loss impedance ( ) on gate fingers. A decreasing gate resistance as increasing finger number is observed is due to the parallel effect and explains the decreasing as the increasing finger number. From our device simulation, the reason for abnormally increasing when gate finger

50 in 0.18- m MOSFETs is due to the decreasing because of the large area-related substrate loss. The higher in 0.13- m MOSFETs also explains the higher while decreasing the gate length from 0.18 to 0.13 m because of

Fig. 3. The simulated and measured (a) dc I –V characteristics, (b)

S-parameters, and (c) NF of 0.13-m MOSFETs with the largest 70 fingers.

Fig. 4. Dependence of the gate finger number onthe gate resistanceR and substrate loss impedanceZ of 0.18- and 0.13-m MOSFETs.

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466 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 12, NO. 12, DECEMBER 2002

the smaller gate area. From the extrapolated data of 0.13- m MOSFETs and the well-calibrated device model, similar increasing noise figure after increasing gate finger 70 is also obtained, as shown in Fig. 1. This sets the upper limit of the increasing gate finger even without considering the device area and power consumption. Therefore, further scaling down the gate length will give a higher even though the associate gain is increased, unless a modified T-gate MOSFET structure is used.

IV. CONCLUSION

We have found a strong dependence of on a layout finger number and gate length that is due to the combined effect of and substrate loss effect. A T-gate structure is necessary to reduce the RF noise for further scaling down the MOSFETs.

REFERENCES

[1] K. T. Chan, A. Chin, C. M. Kwei, D. T. Shien, and W. J. Lin, “Transmis-sion line noise from standard and proton-implanted Si,” in IEEE MTT-S

Int. Microwave Symp. Dig., 2000, pp. 763–766.

[2] Y. H. Wu, A. Chin, K. H. Shih, C. C. Wu, S. C. Pai, C. C. Chi, and C. P. Liao, “RF loss and cross talk on extremely high resistivity (10K–1M-cm) Si fabricated by ion implantation,” in IEEE MTT-S Int. Microwave Symp.

Dig., 2000, pp. 241–244.

[3] K. T. Chan, A. Chin, Y. B. Chen, Y.-D. Lin, D. T. S. Duh, and W. J. Lin, “Integrated antennas on Si, proton-implanted Si and Si-on-quartz,” in

IEDM Tech. Dig., 2001, pp. 903–906.

[4] Y. H. Wu, A. Chin, K. H. Shih, C. C. Wu, C. P. Liao, S. C. Pai, and C. C. Chi, “The fabrication of very high resistivity Si with low loss and cross talk,” IEEE Electron Device Lett., vol. 21, pp. 394–396, 2000. [5] J. N. Burghartz, M. Hargrove, C. S. Webster, R. A. Groves, M. Keene,

K. A. Jenkins, R. Logan, and E. Nowak, “RF potential of a 0.18-m CMOS logic device technology,” IEEE Trans. Electron Devices, vol. 47, pp. 864–870, Apr. 2000.

[6] H. Iwai, “CMOS technology for RF application,” in Proc. IEEE Int.

Conf. Microelectron., 2000, pp. 27–34.

[7] C. C. Enz and Y. Cheng, “MOS transistor modeling for RF IC design,”

IEEE Trans. Solid-State Circuits, vol. 35, pp. 186–201, Feb. 2000.

[8] N. Zamdmer, A. Ray, J.-O. Plouchart, L. Wagner, N. Fong, K. A. Jenkins, W. Jin, P. Smeys, I. Yang, G. Shahidi, and F. Assaderaghi, “A 0.13-m SOI CMOS technology for low-power digital and RF applications,” in

Proc. VLSI Symp. Tech., 2001, pp. 85–86.

[9] J. J. Ou, X. Jin, C. Hu, and P. R. Gray, “Submicron CMOS thermal noise modeling from an RF perspective,” in Proc. VLSI. Symp. Tech., 1999, pp. 151–152.

[10] Y. H. Wu, A. Chin, C. S. Liang, and C. C. Wu, “The performance limiting factors as RF MOSFET’s scaling down,” in Int. RF-IC Symp., 2000, pp. 151–155.

[11] R. Follmann, J. Berben, D. Köther, P. Waldow, J. Borkes, and I. Wolff, “A universal method for calculating and extracting the LF and RF noise behavior of nonlinear devices,” in IEEE GaAs Dig. 2000, pp. 47–51. [12] R. Pettai, Noise in Receiving Systems. New York: Wiley, 1984, p. 132.

數據

Fig. 1. NF and associated gain at 5.8 GHz of 0.18- and 0.13- m MOSFETs. The NF for gate finger number >70 are obtained from simulation using the well-calibrated device model.
Fig. 4. Dependence of the gate finger number onthe gate resistance R and substrate loss impedance Z of 0.18- and 0.13- m MOSFETs.

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