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Simulation and Analysis of Power Integrity on Print Circuit Boards 古文琦、吳俊德

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Simulation and Analysis of Power Integrity on Print Circuit Boards 古文琦、吳俊德

E-mail: 9511368@mail.dyu.edu.tw

ABSTRACT

As the clock rate of digital system increase rapidly, it becomes more and more difficult to maintain power integrity for power distribution system. In order to suppress the voltage fluctuation between power and ground planes, input impedance for all of the switching pins has to be maintained at low value. Moreover, the power and ground planes of printed circuit board (PCB) form a two dimensional resonator. Therefore, decoupling capacitors are used to suppress resonant occurred at low frequency and to reduce the input impedance at the pins of critical circuit. This can be proof by both simulation done by Sigrity PowerSI and experiment by network analyzer Ailent E5071A. Both simulation and experiment results show the consistency and prove that the decoupling capacitors do improve the power integrity on power distribution system.

Keywords : power distribution system ; Sigrity PowerSI ; decoupling capacitor ; power integrity Table of Contents

第一章 緒論 1.1 簡介與研究目標............... 1 1.2 論文大綱.................

. 2 第二章 電源完整性的基礎理論 2.1 電源雜訊的影響............... 4 2.2 接地反彈雜訊.....

........... 5 2.2.1 Chip level............. 5 2.2.2 Board level............ 7 2.3 電源平面的目標阻抗............. 8 第三章 電源分佈系統的分析與設計 3.1 源分佈系統的共振特性.

........... 16 3.2 共振模態與表面電壓............. 17 3.2.1模擬參數與模型......

...... 17 3.2.2平面共振與阻抗圖形.......... 17 3.2.3不同位置的雜訊源............ 18 3.2.4實驗結構基本模型的共振模態...... 19 3.3 影響電源完整性的設計與分析......... 20 3.3.1不同的 電源層與接地層距離....... 20 3.3.2不同尺寸的電源層與接地層....... 21 3.3.3加入高介電係數介質..

........ 21 3.3.4加入去耦合電容............ 22 第四章 去耦合電容的各項特性 4.1 去耦合電容的 作用.............. 32 4.2 電容的頻率特性............... 33 4.3 寄生電感的影響..

............. 35 4.4 電容參數的模擬與比較............ 36 4.5 電容的介質與封裝的影響.

.......... 36 4.6電容並聯的特性............... 37 4.7 Layout所造成的電感......

....... 39 第五章 實際模型之模擬與討論 5.1模擬實際印刷電路板............. 47 5.2去耦合電容 對阻抗與雜訊的影響........ 48 5.3回路電感的影響............... 49 5.4有效的加入高頻去 耦合電容抑制共振頻率..... 49 5.5運用去耦合電容抑制同步開關切換雜訊... 51 第六章 結論........

.............. 63 參考文獻........................ 65 REFERENCES

[1]“High-Speed Board Design Techniques,”Vantis, publication 16356, August 1997.

[2]Ralf Schmitt, Xuejue Huang, Ling Yang, Chuck Yuan,“System Level Power Integrity Analysis and Correlation for Multi-Gigabit Designs,

”DesignCon 2004.

[3]Yun Chase“Introduction to Coosing MLC Capacitors For Bypass/Decoupling Applications,”AVX Corporation.

[4]謝金明,“高速數位電路設計暨雜訊防制技術”,全華科技圖書股份有限公司,初版三刷,民國92年7月,pp.4.3-4.10。

[5]張信?,“新寬頻電磁能隙(EBG)結構以抑制地彈雜訊之研究”,國立中山大學電機工程研究所,中華民國九十三年四月,pp12-14。

[6]Todd H. Hubing, James L. Drewniak, Thomas P. Van Doren, and David M. Hockanson,“Power Bus Decoupling on Multilayer Printed Circuit Boards,”IEEE Transactions on Electromagnentic Compatibility, VOL. 37, NO. 2, May 1995.

[7]“SI, PI and EMC Issues of High Speed Design and Cadence's Solution,”July 2003 HSTC Asia Cadence Technology Symposium.

[8]Larry D. Smith, Member, IEEE, Raymond E. Anderson, Member, IEEE, Douglas W. Forehand, Tomas J. Pelc, and Tanmoy Roy, Member IEEE, “Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology,” IEEE Transactions on Advanced Packaging, Vol. 22, No. 3, August 1999.

[9]張存緒,“高速數位電路之電源完整性”電子月刊第九卷第二期。

[10]Makoto Suzuki Ansoft Corporation“EMI/EMC of Entire Automotive Vehicles and Critical PCBs,”download from

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http://www.ansoft.com/converge/.

[11]Dr. Jiayuan Fang and Dr. Jin Zhao“The Power of Planes - Low Impedance Power Delivery Over Broad Frequencies,”Printed Circuit Design & Manufacturing Magazine, Sept. 2003.

[12]Information on SPEED XP, which is produced by SIGRITY, can be found form www.sigrity.com.

[13]Lixi Wan; Raj, P.M.; Balaraman, D.; Muthana, P.; Bhattacharya, S.K.; Varadarajan, M.; Abothu, I.R.; Swaminathan, M.; Tummala, R

“Embedded Decoupling Capacitor Performance in High Speed Circuits,”Electronic Components and Technology, 2005. ECTC '05.

Proceedings.

[14]Stephen H. Hall , Garrett W. Hall , James A. McCall , “High-Speed Digital System Design : A Handbook of Interconnect Theory and Design Practices,”2000.

[15] http://avx.com/ [16]李瑞淇,“PCB構裝之訊號完整度模擬分析”私立大葉大學電信工程學系,中華民國九十四年六月,pp35-36。

[17]Bull Ting, Lydia Cheng, Nilson Yu, Mike Brenneman“Power Integrity and Ground Bounce Simulation of High-Speed PCBs,” can be found form http://www.ansoft.com/empower/.

[18] http://www.china-capacitors.com/

參考文獻

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