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次世代數位影音多用途光碟系統之光機電整合研究---子計畫IV:數位視訊與音訊處理(II)

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The Integration in Optics, Mechanics, and Electronics of Digital Versatile

Disc Systems (2/3) ---(I) Digital Video and Audio Signal Processing

NSC88-2218-E-009-036

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ŸAG™š wåÅ ¢£ ·Y `“æç·è BCf9Hà é@”b`“¢£Ä êëì[îHxK WX “”*ƒ æí¹ RnmpŒRnmp Ì î>­±î­A ïÁð  ÀÁÂÆñò ð óI ô¿õö ¸¬ DCFî"–*÷ øxfg),-ùZú+G$ H¥ jm I ô¿õö ûü wýõýþÆö B·H AHIz&—[8G I ô¿õö —² nom¼¼ )ƒ„…† ¯‰$óÌI ô¿õö ¸¬ žÕ Gîz¸¬2 Ö¹ wåÅ °—˜ ×·$"Ô`^4F%á 2 ,-[ jm I ô¿õö —%GHå GB·2 ,- G9$ú êë C )QRêë,-ùZú*E· Ëó™ÄÌóI ô¿õö îA DCF î   û b A ê ë  D wï ? ·uþÓ矍N Max frequency 55 MHz

9-ns single-cycle instruction execution time

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Four 32-bit Adder One 32-bit data bus

Parallel ALU and multiplier instructions in a single cycle

User define image row and column User define image divided

100-pin CQFP package ; available pins 90

0.35-µm 1P4M CMOS H Filter controller G Filter controller 2-D image controller Two chip debug mode Chip hold mode

20µm width power ring for the whole chip

3 pairs power stripes , 20µm width IO to core distance with 150µm

3 groups for floorplan: H FILTER , G FILTER , Main Control

Global route properties: Final measure/gCell = 0.2133

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OverCon/gCell =0.00337 Gate count is 32679 Core area : 1.559 x 1.559 mm2



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[1] M. A. Sid-Ahmed,“Image Process ing.” New York:McGraw-Hill, 1995

[2] Rafael C .Gonzalez,Richard E.Wo ods,”Digital Image Processing ”,Addis on-Wesley Publishers,1993.

[3] C.K. Chui,”An Introduction to Wavelets”,San Diego:Academic Press, 1992.

[4] G.Strang and T.Nguyen,”Wavelet and Filter Banks”,.Cambridge, MA:

Wellesley Cambridge,1996. [5] Joan L.Mitchell ,William B.

Pennebaker,Chad E. Fogg and Didier J. LeGall,”MPEG Video Compression Standard”,1997

[6] M. Antonini,M.Barlaud,P. Mathieu and I. Daubechies,”Image codeing using wavelet transform”,IEEE Transactions

no. 2,pp.205-220,1989

[7] Bing-Fei Wu and Chorng-Yann Su,”A Fast Convolution Algorithm for Biorthogonal Wavelet Image Compressi- on ” , The Journal of the Chinese Institute of Engineers , Vol.22 , No.2 , p179-192,1999.

[8] Donald E.,Thomas and Philip

Moorby, ”The Verilog Hardware Descr- iption Language”, Kluwer Acadmic Publishers,1994.

[9] Joseph Pick,”VHDL Synthesis Techniques and Recommendations”, Synopsys,Inc. IEEE 1995.

[10] Pran Kurup,Cirrus Logic,Inc.,Taher Abbasi,Synopsys,Inc,”Logic Synthesis Using Synopsys Second Edition ” , Kluwer Academic Publishers,1997.

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