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An efficient approach to cross-fab route planning for wafer manufacturing

Muh-Cherng Wu

*

, Chang-Fu Shih, Chen-Fu Chen

Department of Industrial Engineering and Management, National Chiao Tung University, Hsin-Chu 300, Taiwan

a r t i c l e

i n f o

Keywords: Dual-fab Cross-fab route Route planning Capacity-sharing Genetic algorithm Linear programming

a b s t r a c t

This paper proposes an efficient approach to solve a cross-fab route planning problem for semiconductor wafer manufacturing. A semiconductor company usually adopts a dual-fab strategy. Two fab sites are built neighbor to each other to facilitate capacity-sharing. A product thus may be produced by a cross-fab route; that is, some operations of a product are manufactured in one cross-fab and the other operations in the other fab. This leads to a cross-fab routing planning problem, which involves two decisions—deter-mining the cut-off point of the cross-fab route and the route ratio for each product—in order to maximize the throughput subject a cycle time constraint. A prior study has proposed a method to solve the cross-fab route planning problem; yet it is computationally extensive in solving large scale cases. To alleviate this deficiency, we proposed three enhanced methods. Experiment results show that the best enhanced method could significantly reduce the computational efforts from about 13 h to 0.5 h, while obtaining a satisfactory solution.

Ó 2009 Elsevier Ltd. All rights reserved.

1. Introduction

Recently, some semiconductor companies tend to adopt a dual-fab strategy. The strategy advocates that building two dual-fabs at a time, which are next door to each other. One reason why this strat-egy arises is due to that semiconductor equipment, compared with fab space, is much more expensive and shorter in lead time of acquisition. In practice, more than 80% expenditure of an advanced wafer fab is spent on equipment. The acquisition lead time for equipment ranges from 3 to 9 months, while that for fab space takes about 1–2 years. To quickly respond to volatile market de-mand, some companies tend to build a large scale space for two fabs in advance and gradually purchase equipment based on future demand over time.

Not only good in fast capacity expansion, the dual-fab strategy also provides a capacity-sharing mechanism due to close proximity of the two fabs. Consider a single-fab production policy which re-quests each wafer job be manufactured in only one fab. In a dual-fab configuration, such a policy usually leads to underutilization of equipment because idle equipment capacity in one fab cannot be used by the other. To utilize the idle capacity, we may have to adopt a cross-fab production policy. That is, the manufacturing of a wafer job could be partly done in one fab and partly in the other. However, under the cross-fab production policy, we would be confronted with a route planning problem—how to appropriately assign the operations of a wafer job to each of the two fabs. Prior studies on such a route planning problem are relatively few. With

each job route being cut into several segments,Toba, Izumi, Hat-ada, and Chikushima (2005)studied the route planning problem in a real-time manner. That is, whenever a segment is completed, a decision—which fab to manufacture the next segment—must be immediately made.Wu and Chang (2007)examined a route plan-ning problem in a weekly horizon. Assuming the two fabs plan capacity exchange weekly, they attempted to find an optimal capacity-trading portfolio in order to maximize the total through-put of the two fabs.

Aside from the track of short-term route planning,Wu, Erkoc, and Karabuk (2005)addressed the problem from a relatively long-term perspective. Given a product mix to produce, say in a quarter, they attempted to determine how to cut the route of each product into two segments; and determine the production ratio of each segment that should be assigned to each fab. Their objective func-tion is to maximize the total throughput of the two fabs subject that a target cycle time must be met.

Numeric experiments indicated that the method proposed by Wu, Chen, and Shih (2008)could effectively increase equipment utilization and total throughput for a dual-fab scenario. However, their method may become computationally extensive in dealing with large scale cases.

In order to efficiently solve the route planning problem, this pa-per presents an enhanced approach based onWu et al. (2008). Nu-meric experiments indicated that solutions obtained by the enhanced approach are almost as good as that obtained byWu et al. (2008)yet requires much less computational efforts.

The remainder of this paper is organized as follows. Section2 reviews relevant literature. Section3explains the route planning problem. Section4 outlines the LP–GA solution framework pro-0957-4174/$ - see front matter Ó 2009 Elsevier Ltd. All rights reserved.

doi:10.1016/j.eswa.2009.02.008

*Corresponding author. Tel.: +886 3 5731913; fax: +886 3 5720610. E-mail address:mcwu@mail.nctu.edu.tw(M.-C. Wu).

Contents lists available atScienceDirect

Expert Systems with Applications

j o u r n a l h o m e p a g e : w w w . e l s e v i e r . c o m / l o c a t e / e s w a

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posed byWu et al. (2008). Section5presents the linear program (LP) and our enhancements to reduce computational time. Section 6presents the genetic algorithm (GA) and our enhancements to re-duce computational time. Numerical experiments are in Section7 and concluding remarks are in the last section.

2. Relevant literature

In a company with multiple manufacturing sites, planners would face a capacity allocation decision—how to allocate a given demand to each manufacturing site. Literature on the capacity allo-cation problem could be grouped in two categories: product-level and operation-level.

In the product-level category, most literature assumed a single-site production policy—each product should be completely manu-factured with a single-site. A literature survey has been published byWu et al. (2005), and some recent studies can be referred to Chiang, Guo, Chen, Cheng, and Chen (2007), Lee, Chung, Lee, and Kang (2006) and ManMohan (2005). Most of these prior studies used the linear programming (LP) technique to solve the capacity allocation problems.

In the operation-level category, most literature assumed a cross-site production policy manufacturing operations for a prod-uct could be distributed among different sites. The need of study-ing the cross-site-route plannstudy-ing problems thus arises. Such route planning problems were mostly addressed in the context of group technology (GT). Example literature includesDimopoulos (2006), Kim, Beak, and Jun (2005), Mahdavi, Rezaeian, Shanker, and Amiri (2006), Nsakanda, Diaby, and Price (2006), Spiliopoulos and Sofia-nopoulou (2007), Vin, Lit, and Delchambre (2005).

In GT, each site is a manufacturing cell and multiple cells from a factory. A GT cell is designed for manufacturing a particular group of products, and by nature is functionally limited. A cell thus may need to outsourcing decision of each cell.

By contrast, in the route planning problem we address, each of the two fabs is assumed to be functionally comprehensive. Each product can be completely manufactured in either one of the two fabs. The purpose of cross-fab route planning is to maximize the aggregate throughput through optimum capacity-sharing.

3. Problem statement

The dual-fab route planning problem is explained in more detail, where the two fabs are called Fab_1 and Fab_2. We first present the assumptions, and proceed to the decision variables, objective func-tion and constraints.

Assumption 1: Each fab is functionally comprehensive. Both fabs are so comprehensively equipped that each fab can individually complete the production of each product—not requiring support of the other fab.

Assumption 2: The transportation path between any two worksta-tions/buffers is unique, rather than multiple. In practice, there exist multiple paths in transporting a wafer job from a workstation/buf-fer to another. However, to reduce the problem complexity, we as-sume that a fixed path is predefined for such a transport.

Assumption 3: Each product has only four possible routes. The pro-cess route of each product is cut into two segments, where a route’s break point is called a cut-off point. A product has four pos-sible manufacturing routes: 1 ! 2, 2 ! 2, 1 ! 2; and 2 ! 1, where notation i ! j denotes the first segment is manufactured at Fab_i while the second is manufactured at Fab_j.

Define ri¼ ½ai;bi;ci;di as the percentage of the four possible

routes of product i. Each element of riin sequence represents the

route percentage of 1 ! 1, 2 ! 2, 1 ! 2 and 2 ! 1. Define

p

i as

the cut-off point for the route of product i, which is the

identifica-tion code (an integer) of the operaidentifica-tion for separating a route into two segments. The range of

p

iis 1 6

p

i6oi 1 where oiis the

to-tal number of operation of product i. We set

p

i¼ 0 while we

deter-mine not to manufacture product i by using any cross-fab routes. Consider a dual-fab company that has n products to manufac-ture, represent a solution of the route planning problem by ðP;RÞ, whereP¼ ½

p

1; . . . ;

p

n and R ¼ ½r1; . . . ;rn. The objective is

to find an optimal solution ðP;R

Þ in order to maximize the total throughput of the two fabs, subject to the constraint of meeting a target cycle time.

4. Solution framework

To solve the dual-fab route planning problem, we adopted the solution framework proposed byWu et al. (2008), and developed several enhancements to their solution method in order to reduce computational efforts. As shown inFig. 1, the solution framework involves two modules.

In Module 1, each path is assumed to be equipped with infinite transportation capacity; and the transportation time between any two workstations/buffers is thus zero. The problems so simplified are solved by an iterative use of a linear program (LP) model. This module is intended to find an optimum solution ðP

L;R 

LÞ, in terms

of minimizing the total number of inter-fab transportations. In the prior study (Wu et al., 2008), this module is very computationally extensive because the number of LP iterations is quite huge for large scale cases. We proposed three heuristic methods to enhance the prior study by significantly reducing the number of LP iterations.

Let ðP L;R



LÞ represent the solution obtained in Module 1. In

Module 2—by takingP

L as given parameters, we deal only with

decision variable R by considering each path as a tool with limited transportation capacity. The transportation time for a path depends upon the traffic flow intensity. The higher the traffic intensity, the longer is the cycle time. The performance of a particular ðP

L;RÞ

could be evaluated by applying a queueing network model ( Con-nors, Feigin, & Yao, 1996). In the prior study (Wu et al., 2008), they developed a GA to find a near-optimal solution from the space fðPL;RÞg, which is also computationally extensive while dealing

with large scale cases. We enhanced the prior study by reducing the size of the GA chromosomes. In the enhanced GA, many ele-ments in R are considered to be constant and only a few need to searched.

The essences of these two modules are compared below. Mod-ule 1 essentially deals with a static capacity allocation problem which does not consider job flow time. In contrast, Module 2 deals with a time-phased capacity allocation problem, in which job flow time is addressed and computed by a queueing network model.

Module 1

Module 2

Linear program (LP)

Genetic algorithm (GA)

Queueing network Cutoff Point ( *) L Π Route Ratio ( *) L R

Three Heuristic Method (Reduce iterations)

Route Ratio ( *)

G

R

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5. Module 1 – LP model and enhancements

Obtaining the solution for Module 1 is through an iterative use of an LP model. We first describe the LP model, and then present the architecture of the iterative process. Finally, we describe the three methods designed to reduce the number of LP iterations. 5.1. LP model

Indices

i index of product

g index of workstation in Fab_1 h index of workstation in Fab_2

Parameters

n total number of products

p

i cut-off point for defining the cross-fab routes of product i

P P¼ ½

p

i; 1 6 i 6 n, the cut-off points of all products

V estimated total throughput of the two fabs, input by user zi percentage of product i in the given product mix,P

n

i¼1zi¼ 1, 0 6 zi61

Cg available machine hours of workstation g in Fab_1

Ch available machine hours of workstation h in Fab_2

m1 total number of workstations in Fab_1

m2 total number of workstations in Fab_2

Waig total processing time per lot required on workstation g in

Fab_1, while product i is manufactured by route 1 ! 1 Wcig total processing time per lot required on workstation g in

Fab_1, while product i is manufactured by route 1 ! 2 Wd

ig total processing time per lot required on workstation g in

Fab_1, while product i is manufactured by route 2 ! 1 Wb

ih total processing time per lot required on workstation h in

Fab_2, while product i is manufactured by route 2 ! 2 Wc

ih total processing time per lot required on workstation h in

Fab_2, while product i is manufactured by route 1 ! 2 Wdih total processing time per lot required on workstation h in

Fab_2, while product i is manufactured by route 2 ! 1

Decision variables

R R ¼ ½r1; . . . ;rn, where ri¼ ½ai;bi;ci;di

ai percentage of using route 1 ! 1 in producing product i

bi percentage of using route 2 ! 2 in producing product i

ci percentage of using route 1 ! 2 in producing product i

di percentage of using route 2 ! 1 in producing product i

The LP model is to compute an optimum R for a given pair of ðV;PÞ, in terms of minimizing the number of cross-fab transporta-tion. Define the objective function by ZðV;PÞ. The LP model is for-mulated below: Min ZðV;

P

Þ ¼X n i¼1 V  zi ðciþ diÞ s:t: aiþ biþ ciþ di¼ 1; 1 6 i 6 n; ð1Þ Xn i¼1 V  zi ðai Waigþ di Wdigþ ci WcigÞ 6 Cg; 1 6 g 6 m1; ð2Þ Xn i¼1 V  zi ðbi Wbihþ di Wdihþ ci WcihÞ 6 Ch; 1 6 h 6 m2: ð3Þ

The objective function is to minimize the number of cross-fab pro-duction lots. The rationale for defining this objective is that cross-fab production requires longer transportation time than within-fab production. Subject to a target cycle time, an attempt to mini-mize cross-fab production lots tends to increase total throughput. Constraint (1) describes the dependent relationship among the

route ratios. Constraints(2) and (3)ensure that the capacity used in each workstation, in Fab_1 and Fab_2, should be lower than its available supply. Notice that V is the estimated throughput; the LP may yield no solution while V is too large.

In the above LP model, each of the n products is eligible for cross-fab production. To reduce computational complexity, we propose to divide the products into two sets: Qcand Qs. Products

in Qcare eligible for cross-fab production, and those in Qsare only

allowed forsingle-fab production. To deal with such a general sce-nario ðQc;QsÞ, the above LP should be modified by including the

following constraints:

ck¼ 0 and dk¼ 0 for each product k in Qs: ð4Þ

A procedure LP ModuleðV;P;Qc;QsÞ is defined below to facilitate

explaining the iterative procedures for calling the modified LP. Procedure LP_Module ðV;P;Qc;QsÞ

Step 1: Compute LPðV;P;Qc;QsÞ

Step 2: If (LP has no solution) then Pass_Check = ‘‘Fail”, Return If (LP has solution) then Pass_Check = ‘‘Pass”,

Return ZðV;PÞ, RðV;PÞ, Pass_Check

In Step 1 of the above procedure, LPðV;P;Qc;QsÞ denotes the

modified LP. In Step 2, Pass_Check is a flag in which ‘‘Fail” denotes the value of V is too large. Moreover, ZðV;PÞ denotes the obtained route ratio and ZðV;PÞ denotes the obtained value in objective function.

5.2. Iterative process of LP

To solve the route planning problem, we need to iteratively run LP ModuleðV;P;Qc;QsÞ. The architecture of the iterative process is

shown inFig. 2. The architecture involves four procedures, which are organized in a hierarchical manner. The bottom level of the hierarchy is the LP ModuleðV;P;Qc;QsÞ. Details of the other three

procedures are presented inAppendices 1–3.

Of the three top level procedures, Route_Planning is intended to ask users input ðQc;QsÞ and ðL; UÞ which is the range of V. Given a

scenario ðL; U; Qc;QsÞ, Route_Planning_for_Given_Throughput is Route_Planning Input(L,U),(Qc.Qs) Route_Planning_ for_Given_Throughput(L,U,Qc.Qs) Perfomance_Evaluation (V,Q ,cQs) ) , ( UL VLP_Module (V,ΠQ ,cQs)

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intended to find an optimal V 2 ðL; UÞ, where the algorithm for identifying V is based on a binary-search method (Fig. 3) Perfor-mance_Evaluation is intended to find ðP;RÞ for a given scenario

ðV; Qc;QsÞ, based on a binary-search algorithm over multiple

inter-vals and each interval is a product route.

Assume set Qc has nc products; that is, there are nc product

routes to search for their optimal cut-off points. The computational complexity of the iterative process is Oð2nck1Þ, where k

1is a

con-stant which denotes the maximum number of search required to carry out on each product route. It might be very much computa-tionally extensive while nc¼ n (i.e., all products are eligible for

cross-fab production). One way to efficiently solve the route plan-ning problem is to find an appropriate Qc, which has small value of

ncand can yield a good quality solution.

5.3. Reduction of iteration number

To find such an appropriate Qc, we developed a procedure

Prod-uct_Sorting to categorize all products into three groups. Taking each group as a particular selection of Qc, we would have three

dif-ferent versions of Qc. The procedure is presented below.

Procedure Product_Sorting

Step 1: Identify the bottleneck workstation (say, B) of the two fabs.

Step 2: Compute the workload of each product on B.

Step 3: Sort all the n products according to their workload on B. Step 4: Categorize products into three groups, based on the sorted results.

With three different versions of Qc, we could have three

solu-tion methods in Module 1. The method, using the product group with the highest bottleneck workload, is called LP1. The one with

middle-level bottleneck workload is called LP2, and the remaining

one is called LP3. The method proposed by Wu et al. (2008)is

called LP0.

The rationale for taking bottleneck workload as the criterion for grouping products is two-fold. First, the utilization of bottleneck workstation dominates the two fabs’ throughput. Thus, in cross-fab route planning decisions, the capacity allocation of bottleneck workstation would be most critical. Second, we attempt to justify which product group is most critical in the cross-fab route plan-ning—the heavily load group, the middle-level load group, or the lightly loaded group.

6. Module 2 – GA

Define the solution of Module 1 as ðP

L;RLÞ, which is obtained

under the assumption of infinite transportation capacity. In Module 2, with ðPL;R



LÞ being available, we developed a GA in order to find

a better solution ðP

G;RGÞ under the assumption of finite

transporta-tion capacity.

The GA is an enhanced version of the one proposed byWu et al. (2008). LikeWu et al. (2008), we first setP

G¼P 

Land attempt to

find R

G. But in the search of RG, we make an enhancement by

set-ting ck¼ dk¼ 0 for each product k in Qs(i.e., the single-fab

produc-tion policy presumed in Module 1 is preserved).

The enhancement could simplify the representation of a solu-tion. Consider a chromosome (a possible solution) represented by a vector R ¼ ½r1; . . . ;rn, where ri¼ ðai;bi;ci;diÞ. We call ri a

gene-segment, and each element in ri a gene. Since aiþ biþ ciþ di¼ 1,

we have three free genes for each product in Qcand one free gene

for each product in Qs. Here, a free gene is one whose value is

changeable in the search process, while a gene whose value is not changeable is called a static gene. With this enhancement, a chromosome has only 3ncþ ðn  ncÞ free genes, rather than 3n

ones as inWu et al. (2008). The GA proposed byWu et al. (2008) is called GA0and our enhanced version is called GA1.

The performance (also called fitness) of each chromosome is computed by a queueing network model (Wu et al., 2008), which is adapted from the one developed byConnors et al. (1996). For a given chromosome (i.e., a route plan), the queueing network can be used to compute the aggregate throughput of the two fabs sub-ject to meeting a target cycle time.

The GA is an iterative algorithm which can be briefly described as follows:

Procedure GA Step 1: Initialization

 t ¼ 0, Status = ‘Not-terminate’

 Randomly generate Npchromosomes to form a population P0

Step 2: Genetic Evolution

While (Status = ‘Not-Terminate’) do

 Use a cross-over operator to create Ncnew chromosomes

 Use a mutation operator to create Nmnew chromosomes

 Form a pool by taking the union of Ptand the set of newly

created chromosomes

 t ¼ t þ 1, and select the best Npchromosomes from the pool

to form Pt

 Check if termination condition is met; if yes, set Status = ‘‘Terminate”

Endwhile

Step 3: Set the best chromosome in Ptas RG. Output R  G.

The cross-over operation is to create two new chromosomes (say, R3and R4) from two existing ones (say, R1and R2Þ. Let each

gene-segment i in R1and R2be respectively represented by ri1and

ri2. We proposed a one-point cross-over operation (Binh & Lan,

2007) on gene-segments ri1 and ri2 to create two new ones ri3

and ri4, which in turn could yield two new chromosomes:

R3¼ ½ri3, R4¼ ½ri4; 1 6 i 6 n.

The one-point cross-over operation on a gene-segment is briefly introduced. For two gene-segments (i.e., ri1and ri2Þ, we randomly

choose a free gene, swap their gene values, and modify another gene values in order to ensure meeting the constraint aiþ biþ ciþ di¼ 1. Consider an example, where the 2nd gene (a

free one) is chosen as the cross-over point for mixing ri1¼ ðai1;bi1;ci1;di1Þ and ri2¼ ðai2;bi2;ci2;di2Þ. By the swap and

modification operations, we would obtain ri3¼ ðai1;bi2;ci1;

1  ai1 bi2 ci1Þ and ri4¼ ðai2;bi1;ci2;1  ai2 bi1 ci2Þ.

In the mutation operation, a new chromosome (say, R2) is

cre-ated by an existing one (say, R1). The mutation algorithm creates

R2 by modifying a particular gene-segment in R1. The modified

gene-segment is randomly chosen. While being selected, two of its free genes are randomly chosen and their gene values are

Iteration 1 Iteration 2 Iteration 3

Iteration n

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swapped. For example, if gene-segment iis chosen for

modifica-tion; and the 2nd and 4th genes are chosen to swap for ri1¼ ðai1;bi1;ci1;di1Þ, then ri2¼ ðai1;di1;ci1;bi1Þ, which in turn yield

a new chromosome R2¼ ½r11;ri2; . . . ;rn1 from R1¼ ½r11;ri1; . . .

;rn1. Notice that only products in Qcare eligible for applying the

mutation operation.

Two termination conditions are defined for the GA. First, the best solution in Pthas not been changed for over a certain period

(say, Tbiterations). Second, population Pthas evolved over a

cer-tain number of iterations; that is, t has reached its predefined upper bound ðTuÞ.

7. Experiments

Numeric experiments are carried out to compare the perfor-mance of our three proposed methods against the one proposed byWu et al. (2008). The one proposed byWu et al. (2008)is called LP0—GA0. The three we proposed are respectively called LP1—GA1,

LP2—GA1and LP3—GA1. A personal computer equipped with

Pen-tium (R) Dual CPU 3.4 GHz and 1 GB RAM is used in the experiments.

In the experiments, the data for machines, product routes and operation times are adapted from a data set provided by a semi-conductor company. Each of the two fabs involves 60 workstations. Fab_1 involves 292 machines and Fab_2 involves 352 machines. The MTBF (mean time between failure) and MTTR (mean time to repair) of each machine is available, exponentially distributed.

Three scenarios are considered in the experiments. Scenario 1 involves three products (Table 1); Scenario 2 involves six products (Table 2); Scenario 3 involves nine products (Table 3). In the genet-ic algorithms, we set Tb¼ 10; 000, Tu¼ 500, P0¼ 1000, Pcr¼ 0:9

and Pm¼ 0:1. The target cycle time is CT0¼ 40; 000 min or

27.7 days.

Table 4compares the four methods in terms of the two fabs’ aggregate throughput. Of the three proposed methods, LP1—GA2

appears to be the best one, in particular in Scenario 3—only 2.48% less than LP0—GA0in throughput. However, the computation

time required by LP2 GA1is greatly reduced. FromTable 5, in

dealing with Scenario 3, LP0—GA0requires 46,578 s (about 13 h),

while LP2—GA1 requires only 2112 s (about 35 min). In practice,

taking half a day in computation is generally not acceptable to

practitioners. Therefore, LP2—GA1appears to be a useful decision

aid in solving cross-fab route planning problems.

Table 6shows the two components of computation times re-quired in Scenario 3.Table 6indicates that the reduction in compu-tation time is substantially due to the enhancement in LP. In the LP module, LP0—GA0takes 42,900 s (about 12 h) while LP2—GA1

re-quires only 110 s (about 2 min).

The reasons why LP2—GA1outperforms the other two proposed

methods, in terms of solution quality, are analyzed below. In LP1—GA1, products in Qc are high-level in terms of bottleneck

workload. This implies that these products are higher in product mix ratios. This leads to a higher eligible range for each route ratio in Qc. In turn, the GA solution space of route ratios would become

much larger. Under the same GA terminating conditions, the solu-tion obtained by LP1—GA1may not be as good as that obtained by

LP2—GA1.

By contrast, in LP3—GA1, products in Qcare low-level in terms

of bottleneck workload; that is, products are generally lower in product mix ratios. This leads to a lower eligible range for each route ratio in Qc. In turn, the space for improving the solution

qual-ity is also reduced. Therefore, LP2—GA1 would outperform

LP3—GA1.

8. Conclusion

This paper presents an efficient approach to solve cross-fab route planning problems for semiconductor wafer manufacturing. In the problem, each product has four possible production routes, Table 1

Scenario 1 which involves three products in the route planning.

Product P1 P2 P3

Number of operations 338 338 338

Product mix 0.5 0.3 0.2

Table 2

Scenario 2 which involves six products in the route planning.

Product P1 P2 P3 P4 P5 P6

Number of operations 338 338 338 300 300 300

Product mix 0.25 0.25 0.15 0.15 0.1 0.1

Table 3

Scenario 3 which involves nine products in the route planning.

Product P1 P2 P3 P4 P5 P6 P7 P8 P9

Number of operations 338 338 338 300 300 300 250 250 250

Product mix 0.17 0.17 0.16 0.1 0.1 0.1 0.07 0.07 0.06

Table 4

Throughput comparison for various solution methods.

Scenario Scenario 1 Scenario 2 Scenario 3 TH (Lot) Gap (%) TH (Lot) Gap (%) TH (Lot) Gap (%)

LP0—GA0 652 0 725 0 846 0

LP1—GA1 650 0.31 724 0.14 795 6.03

LP2—GA1 651 0.15 723 0.28 825 2.48

LP3—GA1 650 0.31 697 3.86 790 6.62

Table 5

Computation time comparison for various solution methods.

Scenario Scenario 1 Scenario 2 Scenario 3 Time (s) Gap (%) Time (s) Gap (%) Time (s) Gap (%)

LP0—GA0 892 0 3111 0 46,587 0

LP1—GA1 437 48.99 1497 48.12 2197 4.72

LP2—GA1 532 59.64 1478 47.51 2112 4.53

LP3—GA1 539 60.43 1590 51.11 2940 6.31

Table 6

Computation time analysis for LP0—GA0and LP2—GA1.

Algorithm LP time (s) Gap (%) GA + queueing (s) Gap (%) Total time (s) Gap (%) Scenario 3 LP0—GA0 42,900 0 3687 0 46,587 0 LP2—GA1 110 0.26 2002 54.3 2112 4.53

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which are defined by a cut-off point. We need to determine the cut-off point and the route ratio for each product in order to max-imize the throughput subject a cycle time constraint.

A prior study has proposed a method (called LP0—GA0) to solve

the problem, yet it is computationally extensive in dealing with large scale cases. In this paper, we enhanced the prior method and proposed three efficient methods (called LP1—GA1, LP2—GA1

and LP3—GA1Þ. Numerical experiments indicate that the three

en-hanced methods can significantly reduce the required computation time. Of the three enhanced methods, LP2—GA1 outperforms the

other two in terms of solution quality, in dealing with large scale cases.

Some extensions of this research are being considered. The first extension is the route planning for a multiple-fab production sys-tem—for example, three or more fabs share the capacity in produc-tion. The second extension is the route planning for a scenario with higher flexibility in production routes—for example, each product could have two or more cut-off points and in turn have more than four routes. Appendix 1 Procedure Route_Planning Step 1: Input (L, U) Input (Qc, Qs) Step 2: Call Route_Planning_for_Given_Throughput ðL; U; Qc;QsÞ Step 3: Output Z,P L, RL Appendix 2 Procedure Route_Planning_for_Given_Throughput ðL; U; Qc; QsÞ

Initialization / set initial range of throughput/ i ¼ 1, / i is iteration number/ Li¼ L, Ui¼ U Ii¼ ½Li;Ui While i ¼ 1 or V2V1 V1 P

e

  n o

/

e

is a small value, e.g., 0.2%/ Step 1: Determine the two test points for the throughput interval Ii

V1¼ bðUiþ LiÞ=4c

V2¼ b3ðUiþ LiÞ=4c

Step 2: Evaluate and record the performance of the two test points

Call Performance_Evaluation ðV1;Qc;QsÞ

P1¼ Pass CheckðV1Þ / Check if V1is too large/

P1¼ Optimal Cutoff ðV1Þ

R1¼ Optimal Route RatioðV1;P1Þ

Z1¼ Optimal Objecti

v

e ValueðV1;P1Þ

Call Performance_Evaluation ðV2;Qc;QsÞ

P2¼ Pass CheckðV2Þ / Check if V2is too large/

P2¼ Optimal Cutoff ðV2Þ

R2¼ Optimal Route RatioðV2;P2Þ

Z2¼ Optimal Objecti

v

e ValueðV2;P2Þ

Step 3: Update the throughput interval for search If (P2= ‘‘Pass”) then Liþ1¼ bðUiþ LiÞ=2c, Uiþ1¼ Ui, k ¼ 2

If (P1= ‘‘Pass”) and (P2= ‘‘Fail”) then Liþ1¼ Li,

Uiþ1¼ bðUiþ LiÞ=2c, k ¼ 1

If (P1= ‘‘Fail”) and (P2= ‘‘Fail”) then Liþ1¼ Li,

Uiþ1¼ bðUiþ LiÞ=4c, k ¼ 0

i ¼ i þ 1 Endwhile

If k ¼ 0, Stop / User warning: the input value of L is too large/ Else Z ¼ Zk,PL¼Pk, RL¼ Rk Return Z,P L, RL Appendix 3 Procedure Performance_Evaluation ðV; Qc;QsÞ

Assumption: Qchas n products, and the number of operations for product k is Ok

Initialization

j ¼ 1, / iteration number/

For each product k, set its initial interval for search. Ljk¼ 0, Ujk¼ Ok, 1 6 k 6 n

Ijk¼ ½Ljk;Ujk, 1 6 k 6 n

Identify the longest route / for terminating the following While loop/

h ¼ Arg Max16k6nOk

While fj ¼ 1 or ðm2h m1hÞ 6 1g

Step 1: Determine the two cut-off points for each segment Ijk

m1k¼ bðUjkþ LjkÞ=4c; 1 6 k 6 n

m2k¼ b3ðUjkþ LjkÞ=4c; 1 6 k 6 n

Step 2: Generate all possible combinations of cut-off points Sj¼ fPjP¼ ð

p

1; . . . ;

p

nÞ; where

p

k¼ m1kor

p

k¼ m2kg

Step 3: Identify the best combination of cut-off points from Sj

Set H1¼ /, H2¼ /

For eachP2 Sj

Call LP_Module ðV;P;Qc;QsÞ

If (Pass_Check = ‘‘Pass”), put ZðV;PÞ in H1and RðV;PÞ

in H2

Endfor

Step 4: Check if there exist a solution in Sj

If ðH1–/Þ, then P¼ ArgMinP2H1ZðV;PÞ and

R

¼ RðV;PÞ

If ðH1¼ /Þ, then Pass_Check = ‘‘Fail”, Return

Step 5: Update the interval for each product k If ð

p

 k¼ m1kÞ then Ljþ1;k¼ Lj;k, Ujþ1;k¼ bðUjkþ LjkÞ=2c, 1 6 k 6 n If ð

p

 k¼ m2kÞ then Ljþ1;k¼ bðUjkþ LjkÞ=2c, Ujþ1;k¼ Uj;k, 1 6 k 6 n j ¼ j þ 1 Endwhile Optimal_Cutoff ðVÞ ¼P Optimal_Route_Ratio ðVÞ ¼ R Optimal_Objective_value ðVÞ ¼ ZðV;PÞ Pass_Check (V) = Pass_Check Return References

Binh, Q. D., & Lan, P. N. (2007). Application of a genetic algorithm to the fuel reload optimization for a research reactor. Applied Mathematics and Computation, 187, 977–988.

Chiang, D., Guo, R. S., Chen, A., Cheng, M. T., & Chen, C. B. (2007). Optimal supply chain configurations in semiconductor manufacturing. International Journal of Production Research, 45(3), 631–651.

Connors, D. P., Feigin, G. E., & Yao, D. D. (1996). A queueing network model for semiconductor manufacturing. IEEE Transactions on Semiconductor Manufacturing, 9(3), 412–427.

Dimopoulos, C. (2006). Multi-objective optimization of manufacturing cell design. International Journal of Production Research, 44(22), 4855–4875.

Kim, C. O., Beak, J. G., & Jun, J. (2005). A machine cell formation algorithm for simultaneously minimizing machine workload imbalances and inter-cell part

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Lee, Y. H., Chung, S., Lee, B., & Kang, K. H. (2006). Supply chain model for the semiconductor industry in consideration of manufacturing characteristics. Production Planning and Control, 17(5), 518–533.

Mahdavi, I., Rezaeian, J., Shanker, K., & Amiri, Z. R. (2006). A set partitioning based heuristic procedure for incremental cell formation with routing flexibility. International Journal of Production Research, 44(24), 5343–5361.

ManMohan, S. S. (2005). Managing demand risk in tactical supply chain planning for a global consumer electronics company. Production and Operations Management, 14(1), 69–79.

Nsakanda, A. L., Diaby, M., & Price, W. L. (2006). Hybrid genetic approach for solving large-scale capacitated cell formation problems with multiple routings. European Journal of Operational Research, 171, 1051–1070.

Spiliopoulos, K., & Sofianopoulou, S. (2007). Manufacturing cell design with alternative routings in generalized group technology: Reducing the

complexity of the solution space. International Journal of Production Research, 45(6), 1355–1367.

Toba, H., Izumi, H., Hatada, H., & Chikushima, T. (2005). Dynamic load balancing among multiple fabrication lines through estimation of minimum inter-operation time. IEEE Transactions on Semiconductor Manufacturing, 18(1), 202–213.

Vin, E., Lit, P. D., & Delchambre, A. (2005). A multiple-objective grouping genetic algorithm for the cell formation problem with alternative routings. Journal of Intelligent Manufacturing, 16, 189–209.

Wu, M. C., & Chang, W. J. (2007). A short-term capacity trading method for semiconductor fabs with partnership. Expert Systems with Application, 33(2), 476–483.

Wu, M. C., Chen, C. F., & Shih, C. F. (2008). Route planning for two wafer fabs with capacity-sharing mechanisms. International Journal of Production Research. doi:10.1080/00207540802172029.

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數據

Fig. 1. Solution framework.
Fig. 2. Logic flow of the LP iterative procedures.
Fig. 3. Binary-search method.

參考文獻

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