Bipolar IC:

1. Introduction

• Semiconductor devices

• Semiconductor technology

It should be completely understood that anything with the possibility of violating the law of copyright should not be cited in this lecture note. All the illustrative figures and/or numerical examples must be referred to the assigned textbook.

For academic use in the lectures of Prof. KC Hsu at FJU only.

All other rights are preserved. Any unauthorized copying, editing, exhibition, renting, exchanging, posting, publication, performance, diffusion and/or broadcast of this slide notes or any part thereof is strictly prohibited. And any such action establishes liability for a civil action and may rise to criminal prosecution.

What is Semiconductor?

Conductivity between conductor and insulator Conductivity can be controlled by dopant

Si and Ge

Compound semiconductors

– SiGe, SiC

– GaAs, InP, GaAs_xP_1-x, Ga_xIn_1-xAs_yP_1-y^, etc.

Why is Si?

Sand?

Thermal stability

SiO2 is easy to form

SiO2 can be used as diffusion mask

Dopant and Resistivity

Higher concentration, more carriers Higher conductivity, lower resistivity Electrons move faster than holes

N-Si has lower resistivity than p-Si

Basic Devices:

Resistor Capacitor Inductor Diode

Bipolar Transistor MOS Transistor

Major issues:

First transistor, 1947 by Bardeen & Brattain First single crystal Ge, 1950

First single crystal Si, 1952 First IC device, TI, 1958

First IC product, Fairchild Camera, 1961 a 4-transistor IC sold for $150

Basic Circuits

Bipolar PMOS NMOS CMOS BiCMOS

Devices with Different Substrates

Bipolar MOSFET BiCMOS Si

GaAs: up to 20 GHz device LED

Compound

Bipolar: high speed devices Ge

Dominate IC industry

Bipolar IC:

Earliest IC chip

1961, four bipolar transistors, $150.00 Market share reducing rapidly

Still used for analog and power devices TV, VCR, Cellar phone, etc.

PMOS

First MOS field effect transistor, 1960

Used for digital logic devices in the 1960s Replaced by NMOS after the mid-1970s

NMOS

Faster than PMOS

Used for digital logic devices in 1970s and 1980s

Electronic watches and hand-hold calculators Replaced by CMOS after the 1980s

CMOS

Most commonly used circuit in IC chip since 1980s

Low power consumption High temperature stability High noise immunity

Symmetric design

BiCMOS:

Combination of CMOS and bipolar circuits Mainly in 1990s

CMOS as logic circuit Bipolar for input/output Faster than CMOS

Higher power consumption

Likely will have problem when power supply voltage dropping below one volt

IC Chips:

Memory

Microprocessor

Application specific IC (ASIC)

Memory Chips:

Devices store data in the form of electric charge Volatile memory

– Dynamic random access memory (DRAM) – Static random access memory (SRAM)

Non-volatile memory

– Erasable programmable read only memory (EPROM) – FLASH (EEPROM-electrically EPROM)

DRAM

Major component of computer and other electronic instruments for data storage

Main driving force of IC processing development One transistor, one capacitor (one bit)

Refreshing ckt is needed

SRAM:

Fast memory application such as computer cache memory to store commonly used instructions

Unit memory cell consists of six transistors (6T) or 4T with resistors

Much faster than DRAM

More complicated processing, more expensive

EPROM:

Non-volatile memory

Keeping data ever without power supply

Computer bios memory which keeps boot up instructions

Floating gate

UV light memory erase

Moore’s Law:

Number of transistors doubled every 12 months while price unchanged

Limit of the IC device

Atom size:

Need some atoms to form a device

Likely the final limit is around 100 Å About 30 silicon atoms

Theoretical limit: at least 20 atoms

Basic Bipolar Process Steps

Buried layer doping

Epitaxial silicon growth

Isolation and transistor doping Interconnection

Passivation

The 1970s

Bipolar dominant NMOS

Main driving force: electronic watches and calculators

The 1980s

MOSFET surpassed bipolar CMOS

Multi-level interconnections

Main driving force: personal computer

1980’s CMOS Technology

LOCOS

PSG and reflow Evaporator

Positive PR

Projection printer Plasma /wet etch

New Materials: Cu

New Materials: Low-k New Materials: High-k

Next Generation Lithography

The 2000s

Chap 2 Atoms and electrons in Crystals

• semiconductor materials

• basic crystal structure

• Bohr model for H-atom

It should be completely understood that anything with the possibility of violating the law of copyright should not be cited in this lecture note. All the illustrative figures and/or numerical examples must be referred to the assigned textbook.

For academic use in the lectures of Prof. KC Hsu at FJU only.

All other rights are preserved. Any unauthorized copying, editing, exhibition, renting, exchanging, posting, publication, performance, diffusion and/or broadcast of this slide notes or any part thereof is strictly prohibited. And any such action establishes liability for a civil action and may rise to criminal prosecution.

Applications: Si: rectifiers, transistors, ICs

compounds: high speed devices and photonic devices Binary: GaN, GaP, GaAs in LED; GaAs, InP in microwave devices

Ternary: AlGaAs in lasers Quarternary: InGaAsP in lasers ZnS: fluorescent materials

InS, CdSe, PbTe, HgCdTe: light detectors

Si,Ge: infrared and nuclear radiation detectors

Energy gap (E_g in eV) determines the wavelength of absorbed/emitted light by the semiconductor

Lattice: periodic arrangement of atoms in a crystal

A unit cell: repeated throughout the crystal Primitive cell: the smallest repeated cell R= ma + nb +pc

Miller indices: h, k, l

From sand to wafer:

Sand

Sand to MGS

React MGS with HCl to form TCS Purify TCS

React TCS to H₂ to form EGS Pull single crystal ingot

Defects in Epitaxy LayerLine dislocation

Stacking Fault Impurity Particle

Hillock

The photoelectric effect: (a) electrons are ejected from the surface of a metal when exposed to light of frequency n in a vacuum; (b) plot of the maximum kinetic energy of ejected electrons vs. frequency of the incoming light.

Photoelectric effect: E_m= hν – qΦ

Bohr model for H-atom

1. Electrons exist in certain stable, circular orbits about the nucleus.

2. Electron may shift to an orbit of higher/lower energy, thereby

gaining/losing energy equal to the difference in the energy levels.

3. The angular momentum P^θ of the electron in an orbit is an integral multiple of h/2π, or ħ=h/2π.

c=3x10⁸m/sec R=109678/cm (Rydberg constant)

E2 hν E1

+ -

r -q

n > m-1

§ Schrödinger wave eq ₁

2

2 2

−

∂ = Ψ

= ∂ Ψ + Ψ

∇

− j

j t

m V h

h

m: mass V: potential Ψ: wave function of (x, y, z, t)

classic: K.E. + P.E.=total quantum:

j t x V

m

E m V

p

∂ Ψ

= ∂ Ψ

∂ + Ψ

− ∂

= +

h h

2 2 2

2

2 2

) E ( e F

1 ) 1

E (

F _{(E E )/kT n}

F =

= + ₋

2 Ei Ev Ec

Nc ln Nv 2

kT 2

Ev

E_F= Ec + + ≈ + =

k=1.38x10^-23 J/°K, E^F: Fermi level; T: temperature in °K

1.F(E) denotes the probability of an available energy state at E being occupied by an electron at absolute temp T

2.if E=E_F, the occupation probability is ½

3.at 0°K, the energy states below E_F are all filled, above E_F are all empty 4.the Fermi function is symmetrical about E_F

5.in intrinsic materials, Ef must lie above the middle of Eg, i.e.,

6.For n-Si, Fermi level is close to the conduction band; for p-Si, Fermi level is close to the valence band

7.F(E) only denotes the occupation probability at E if there are available states, i.e., no state available at E, it’s impossible to find an electron ther

Fermi Dirac distribution:

Intrinsic semiconductor: E^- _f=E_i and n=p=n_i

i2 o

o p n

n =

Mass action law:

Æ Temp dependent

Chap 3 Carrier transport phenomena

○ Carrier drift, diffusion

○ Generation and recombination processes

○ Continuity equation

○ Thermionic emission process

○ Tunneling process

○ High-field effects

It should be completely understood that anything with the possibility of violating the law of copyright should not be cited in this lecture note. All the illustrative figures and/or numerical examples must be referred to the assigned textbook.

For academic use in the lectures of Prof. KC Hsu at FJU only.

All other rights are preserved. Any unauthorized copying, editing, exhibition, renting, exchanging, posting, publication, performance, diffusion and/or broadcast of this slide notes or any part thereof is strictly prohibited. And any such action establishes liability for a civil action and may rise to criminal prosecution.

Electron mobility is greater than hole mobility due to smaller effective mass.

Lattice scattering: carrier scattered by a vibration of lattice resulting from temperature

Impurity scattering: scattering arisen form crystal defect

c c

o d

c o

d

c o

, v

, v

/ 1

ε ε

ε μ

ε ε

ε μ

ε ε

μ μ

>>

≈

<<

≈

= +

µ

ع^c ع

wt L wt

R L

ρ

σ

=

Ohmic contact: contact surface is a perfect source/sink of both type carriers and has no tendency to

inject/collect either electrons or holes, i.e., an electron leaves the left end and another electron enters the right end. A hole reaches the right end to combine with an electron, and a hole appears at the left end to maintain the charge neutrality.

p n

conduction

p p

p

n n

n

p p n

n

p p

J J

J

dx qD dp

p q

J

dx qD dn

n q

J

q D kT

D

q D kT

+

=

−

=

+

=

=

=

=

ε μ

ε μ

μ μ

μ

Einstein relation

Current density equation

Drift and diffusion directions for electrons and holes in a carrier gradient and an electric field. Particle flow directions are indicated by dashed arrows, and the resulting currents are indicated by solid arrows.

p n

cond

p p

p n

n n

J J

J

dx qD dp

p q

dx J qD dn

n q

J

+

=

−

= +

= μ ε μ ε

0

0 <

< dx

dp dx

dn

J(diff.) of minority carriers contributes the current, J(drift) of minority carriers is neglected.

Experimental arrangement for photoconductive decay measurements, and a typical oscilloscope trace.

The photoconductive decay measurement can measure the effects of recombination and trapping.

σ(t) = q [ n(t)µ_n + p(t)µ_p ]

The time dependence of carrier concentration can be

monitored by recording the sample resistance as a function of time.

For extrinsic materials, the carrier concentrations are given as

where E^F is the Fermi level and Eⁱ is the intrinsic Fermi level.

However, the above eqs. are only meaning when no excess carriers exist. Here we define quasi Fermi level E^Fn and E^Fp for electrons and holes, respectively, to denote the steady state carrier concentrations in similar forms

Quasi Fermi-level

kT E

i E kT o

E i E

o n e ^{F i} p n e ^{i F}

n = ^{( − )/} = ^{( − )/}

kT E

E kT i

E

ie E^{Fn i} p n e ^{i Fp}

n

n = ^{( − )/} = ^{( − )/}

The above expressions can be seen as defining the quasi Fermi level relations of steady state carrier concentrations under

nonequilibrium conditions with excess carriers generated. When excess carriers are present, the deviations of E_Fn and E_Fp from E_F indicate how far the electron and hole concentration are from the equilibrium values n^o and p^o.

The above U is the indirect recombination rate under low injection in n type Si. Under injection pn>n_i²,

recombination restore to equilibrium pn=n_i². Under carrier extraction pn<n_i² (reverse bias), carriers must be generated by the center.

In steady state, the electrons entering and leaving the conduction band; and the holes entering and leaving the valence band must be equal.

The continuity equations for minority carriers under low injection

p

no p n

p n p n

p n n

n

po p

n p

n p

n n

p p

p G p

x D p

x p p x

t p

n G n

x D n

x n n x

t n

ε τ ε μ

μ

ε τ ε μ

μ

− −

∂ + + ∂

∂

− ∂

∂

− ∂

∂ =

∂

− −

∂ + + ∂

∂ + ∂

∂

= ∂

∂

∂

2 2 2 2

n_p: minority carriers in p-type Si p_n: minority carriers in n-type Si

under steady state: ∂⁄∂t=0

Drift and diffusion of a hole pulse in an n-type bar: (a) sample geometry; (b) position and shape of the pulse for several times during its drift down the bar.

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛ − +

+ −

=

=

∂

= ∂

∂ −

− ∂

∂

∂

p p

p 2 t

t D 4

) t x

(

p no

n

n

n p

n p n

2 n 2

p

t e D 4

p N )

t , x ( p

) x ( N )

0 , x ( p .

C . B

t p p

x p x

D p

τ ε

μ

δ π

δ δ

δ τ

δ ε δ

δ μ

Chap 4 P-N junction, metal junction.

• thermal equilibrium

• depletion region

• I-V characteristics

• charge storage and transient behavior

• Si/metal junction

It should be completely understood that anything with the possibility of violating the law of copyright should not be cited in this lecture note. All the illustrative figures and/or numerical examples must be referred to the assigned textbook.

For academic use in the lectures of Prof. KC Hsu at FJU only.

All other rights are preserved. Any unauthorized copying, editing, exhibition, renting, exchanging, posting, publication, performance, diffusion and/or broadcast of this slide notes or any part thereof is strictly prohibited. And any such action establishes liability for a civil action and may rise to criminal prosecution.

In thermal equilibrium, for the condition of zero net electron and hole currents, the Fermi level must be constant throughout the whole sample.

Equilibrium: no external excitation and no net current flowing

bi p

n kT / ) E E ( i

n n

n

bi n

p kT / ) E E ( i

p p

p

dx V d

e n n

dx qD dn

n q

J

dx V d e n p

dx qD dp

p q

J

i F

F i

=

⇒ −

−

=

=

+

=

−

=

⇒ −

−

=

=

−

=

−

−

ψ ψ ψ

ε

ε μ

ψ ψ ψ

ε

ε μ

C W

2

W V qN

qN

) V V

( W 2

N W N

N N

2 V q

N 1 N

1 N

1

s 2 bi B

B bi s

2 D

A

D A

s bi

D A

B

ε

ξ ξ ξ

=

=

= −

= +

+

=

po po

p

no no

n

n n

n

p p

p

−

≈

−

−

≈

−

Reverse bias depleting minority carriers is

“extraction of minority” forward bias is

“injection of majority.” The reverse

saturation current depends on the minority diffusion from the neutral region to the

depletion edge. Quasi Fermi levels in reverse bias can go inside the band.

[ ]

t t

t

t t

V / V rec

diff F

V 2 / V r

rec i

V 2 / i V

t o max th

p n

i t

i n

n

V / V 2

i t o th

V / 2 V i n

n

e J

J J

2 e J qWn

2 e

n N U v

) kT (

/ ) E E

( cosh n

2 n

p

) 1 e

( n N U v

e n n

p

η

τ σ

σ σ σ

≈ +

=

=

≈

− = +

+

= −

=

Under forward bias, the holes/electrons exceed their equilibrium values and attempt to return equilibrium by recombination: capture in depletion region.

t s

t

V / no V

p 2

p d

V ) I

J J

V ( A dV

A dJ G

kT e p L

Aq

dV A dQ

C

t

≈ +

=

=

=

=

(

^{− 1} )

= AJ

e

dx ) t , x ( p qA

) t ( Q

0 t

e I

) t ( Q

I )

0 ( Q

; 0 t

0 )

t ( i If

t ) t ( Q )

t ( ) Q

t ( i

q p t

q p x

J

p x

J q 1 t

p

p 0

/ t p p

p p

p

p p

p p

p p

p p

p

∫

−

⇒ =

>

⇒ =

=

>

=

∂ +∂

=

∂ +

= ∂

∂

−∂

⇒

∂ −

− ∂

∂ =

∂

δ τ

τ τ

τ δ δ

τ δ δ

τ

) I

/ I

1 ln(

t

qAL ) t ( ) Q

t ( p

t ,

) t ( Q )

t ( ) Q

t ( i

R F

p sd

p p

p p

p p

+

=

=

∂ + ∂

=

τ δ

τ

2

1( )⎥

⎦

⎢ ⎤

⎣

⎡

= ⁻ +

R F

p F

sd I I

erf I

t τ (too length to be derived)

Semiconductor/metal contact

1. Work function qΦ 2. Affinity qχ

3. Fermi level energy E_F electron with probability=½ to jump to E^C

4. Schottky contact: a contact with rectifying Ohmic contact: a contact without blocking 5. flatband voltage: V_FB=Φ_ms

Φ_m > Φ_s for a p-type semiconductor,

Ohmic contacts b.t. metal–semiconductor Φ_m < Φ_s for an n-type semiconductor,

Schottky contacts b.t. metal–semiconductor

Φ_m < Φ_s for a p-type semiconductor, Φ_m > Φ_s for an n-type semiconductor,

Under forward bias: transport of electron/hole

‘ E_F

E_c

E_v

qV 1

2 3

4

metal semiconductor

Tunneling effect

E_F

E_F

E_c

E_c E_v

E_v

δ

δ’

‘

Contact resistance:

Vt

e Bn

T qA

k V cm R J

V c

/

*

2 1

0

= φ

⋅ Ω

⎟⎠

⎜ ⎞

⎝

⎛

∂

= ∂

−

=

Chap 6 Metal/Oxide/Semiconductor (MOS)

1. MOS diode:

2. MOSFET:

3. Device scaling:

4. CMOS:

It should be completely understood that anything with the possibility of violating the law of copyright should not be cited in this lecture note. All the illustrative figures and/or numerical examples must be referred to the assigned textbook.

For academic use in the lectures of Prof. KC Hsu at FJU only.

All other rights are preserved. Any unauthorized copying, editing, exhibition, renting, exchanging, posting, publication, performance, diffusion and/or broadcast of this slide notes or any part thereof is strictly prohibited. And any such action establishes liability for a civil action and may rise to criminal prosecution.

2 s

s 2

2

kT / q po p

kT / q po p

W 1 x

) x ( dx

d

e p p

e n n

⎥⎦⎤

⎢⎣⎡ −

⇒ =

−

=

=

= ⁻

ψ ξ ψ

ρ ψ

ψ ψ

m A

sc

A B s

m

B )

inv ( s

kT / q

i s

W qN

Q

qN 2 W 2

2 e n

n ^B

−

=

=

=

=

ψ ξ

ψ ψ

strong inversion: ψ

) inv ( s o

m T A

1

2 A s

2 ox o

j s

s o

s 2 s A

o s o

C W V qN

d N

q

V 1 2

C C C W

V V

2

W qN

C V Q

ψ ξ

ξ ξ

ψ ψ ξ

+

=

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛ +

=

=

+

=

=

=

−

j o

j o

C C

C C C

= +

In practice, work function difference is function of impurity concentration and there are charges in Si/SiO₂ and within oxide. We need apply a negative voltage to the gate to obtain flat-band.

s m

ms

V

= φ = φ − φ

Flat-band voltage

Q_it is orientation dependent:

<100> < <110> < <111>;

Q_f is positive dependent on

oxidation/annealing/orientation Æ <100> preferred for MOS;

Q_ot is defect in oxide removed by low T annealing;

Q_m is mobile in oxide under high V/high T

W d

x W d

d 1 x

Q dx Q

x x

Q 0 dx

d

s

m x o

0 s

s

o ox

m s

+

<

<

⎟⎠

⎜ ⎞

⎝

⎛ − −

= −

=

<

<

−

=

= ⇒

∫ _ξ^ρ _ξ

ε ξ

ξ ρ ε

o

ot m

ms f FB

d

0 m

m

d

0 ot

ot

d o 0

FB

ox

o o

o ox

s

C

Q Q

V Q

dx )

x ( d x

Q 1

dx )

x ( d x

Q 1

dx )

x ( d x

1 C

V 1

) x x

( Q

) x ( Q

dx d

+

− +

=

=

=

⎥⎦⎤

⎢⎣⎡

−

=

− +

= −

=

∫

∫

∫

φ

ρ ρ

ρ

ξ

δ δ

ξ ρ ε

• Without applied bias: n⁺-p-n⁺ back-to- back p-n junctions Æ only reverse

leakage current

• V_GS>V_T: surface inversion forms channel, once V_DS>0 Æ current conducts

• further increase of V_DS, I_DS goes up with slow rate and finally saturated.

Assumptions for the I-V characteristics of a MOSFET

1. Gate structure corresponds to an ideal MOS diode, i.e., V_FB=0, Φ_ms=0, no trap/interface charges.

2. Drift current is under consideration, diffusion current is neglected.

3. Inversion carriers are with constant mobility.

4. Uniform substrate doping

5. Reverse current leakage is ignored.

6. Gradual channel approximation, i.e., transverse electrical field >> longitudinal electrical field.

[ ]

⎪⎭

⎪⎬

− ⎫ +

−

⎩⎨

⎧ ⎟

⎠

⎜ ⎞

⎝

⎛ − −

=

= ⇒

=

−

=

+

=

∫

2 3 B 2

3 D B

o

A s

D D

B G

o n

D

D

x n 0

A sc

B s

) 2

( )

V 2

C ( qN 2

3 2

2 V 2 V

L V I ZC

dR I

dV

dx ) x ( qn )

y ( Q

) y ( W qN

Q

) y ( V 2

) y (

i

ψ ξ ψ

μ ψ

ψ ψ

[ ]

( )

( ^{G T}) ^D

o n

D

o D n

G m D

2 T G

o n

Dsat

2 2 G

B G

Dsat n

2 3 B 2

3 D B

o A s

D D

B G

o n

D

V V L V

I ZC

L V ZC V

g I

V L V

2 I ZC

K V 1 2

1 K 2

V V

0 ) L ( Q

) 2 ( )

V 2

C ( qN 2

3 V 2

2 2 V

L V I ZC

−

=

∂ =

= ∂

−

≈

⎟⎟⎠

⎞

⎜⎜⎝

⎛ − + +

−

=

=

⎪⎭

⎪⎬

− ⎫ +

⎩ −

⎨⎧

⎟⎠

⎜ ⎞

⎝

⎛ − −

=

μ

μ μ

ψ

ψ ξ ψ

μ ψ

in saturation

transconductance V_D<V_G-V_T (linear) V_D≥V_G-V_T (saturation)

Subthreshold characteristics of a MOSFET. V_G<V_T: surface

weakly invertedÆ diffusion is dominated in the lateral npn BJT (SBD).

( )

t T

G

t D

t B

s

V / ) V V

( D

T G

s

V / V V

/ ) i (

D n

e I

V V

e 1

L e

n I qAD

−

−

−

⇒ ∝

−

≈

−

=

ψ

ψ ψ

o

BS B

A B s

o f ms

T C

V qN

C

V Q 2 (2 )

2 +

+ +

−

= ξ ψ

ψ φ

Threshold voltage control:

1. ion-implantation: adjust N_A at Si-SiO₂ surface:

N_A V_T

2. Gate oxide thickness: d V_T

3. Substrate bias: (reverse bias) |VBS| V_T 4. Gate material due to Φ_ms

Threshold voltage adjustment using substrate bias.

o

BS B

A B s

o f ms

T C

V qN

C

V Q 2 (2 )

2 +

+ +

−

= ξ ψ

ψ φ

Δ

− Δ

−

=

+ +

=

' L

' L

Z Z L

L C

2 Q V

V ^{eff eff}

o B sc

FB

T ψ

L V_T

1. Shorter channel: punch-through becomes easily occursÆ breakdown voltage is

lowered

2. Shorter channel: longitudinal field

increasesÆ mobility reduced due to surface scattering

3. Channel length modulation will reduce g_D in saturation

I-V characteristics of a short channel MOSFET.

[ ]

( ^{G T} )^{2 oDsat}

o n

Dsat

2 3 B 2

3 D B

o A s

D D

B G

o n

D

I V

L V 2 I ZC

) 2 ( )

V 2

C ( qN 2

3 V 2

2 2 V

L V I ZC

=

−

=

⎪⎭

⎪⎬

− ⎫ +

⎩ −

⎨⎧

⎟⎠

⎜ ⎞

⎝

⎛ − −

=

μ

ψ ξ ψ

μ ψ

in saturation

Long channel

Short channel Leff ↘ I ↗

Scaling rules: constant ع-field scaling

old parameter L, new parameter L’=L/κ,

scaling factor κ>1 Æ d’=d/κ, Z’=Z/κ, A’=A/κ², ع’=V’/L’=V/L=ع Æ V’=V/κ,

dع/dx=qN_D/ξÆ ع=qN_D(x-W)/ξ= qN_D’(x’- W’)/ξ=ع’ÆN_D’=κN_D

C_o’=ξ_ox/d’=κ ξ_ox/d =κC_o Æ C_ox=AC_o ÆC_ox’=A’C_o’=C_ox/κ

Considerations of limits of IC

Intrinsic device limitations:

quantum limit:

gate oxide thickness:

critical electric field

saturation velocity (v_s):

thermal limit of switching energy

Considerations of limits of IC

wiring limitations

electromigration limit interconnections:

wire resistance

power limitations. The max allowable temp rise

The max. power dissipation

technology limits: lithography/ min size

new materials?

RC delay

Prevention of latch-up with a heavily doped substrate.

1. β reduction

2. resistive shunting 3. epi-wafer

4. twin-well process

5. Trench isolation.

6. Si-on-insulator