Top PDF On the architecture and performance of an FFT-based spread-spectrum downlink RAKE receiver

On the architecture and performance of an FFT-based spread-spectrum downlink RAKE receiver

On the architecture and performance of an FFT-based spread-spectrum downlink RAKE receiver

(22) A conventional RAKE receiver first uses a sliding correlator to search for the multipath delay profile and a few tracking loops to acquire the channel parameters, such as the delays and the complex gains of the main paths. Then it uses multiple RAKE fingers to detect data. Unlike a conventional RAKE receiver, both path searching and tracking are done implicitly in our channel sounding subsystem because it searches and tracks all paths within one symbol period in the time domain. In a cellular system, the multipath structure may change abruptly, for example, when a vehicle turns around a street corner. The sliding correlator of a conventional RAKE receiver suffers from the estimation delay involved in searching for the multipath delay profile. Therefore, a conventional RAKE receiver may lose track of some newly arrived or disappeared paths, and this will degrade the system performance. At contrast, our RAKE receiver induces much less estimation delay since our path searching and tracking are done on a symbol-by-symbol basis and it can be quickly adapted to the change of the channel.
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On the architecture and performance of a hybrid image rejection receiver

On the architecture and performance of a hybrid image rejection receiver

III. A S IMPLIFIED I MPLEMENTATION M ETHOD FOR THE P ROPOSED R ECEIVER A RCHITECTURE The image rejection receiver architecture we described above utilizes digital signal processing techniques to enhance the IRR performance. Extra computations, such as correlation coeffi- cient calculations, are needed to implement the architecture. In this section, we propose a simplified implementation method for this receiver architecture to reduce its computation require- ments. Here, we assume the mismatching effects in the analog devices are fixed such that the computation of the correlation coefficients can be done in an off-line processor.
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Performance Evaluation of an MCT-Based Peer-to-Peer Architecture

Performance Evaluation of an MCT-Based Peer-to-Peer Architecture

Unstructured Model 與 Structured Model 皆屬 於分散式的作業方式。採用 Unstructured Model 的點對點網路架構,如 Gnutella 與 Freenet,皆不 需要中央目錄管理及資料放置的機制,也不需要 控管拓樸架構,加入社群的方式是連接社群中任 意鄰近的節點。搜尋資料的方法是利用 Flooding 的方式傳送訊息,透過鄰近連接的節點相互發送 訊息(Store and Forward)的方式來搜尋所需的資 料。雖然這種成員可以隨時動態加入或離開的搜 尋方式有很大的彈性,可以有效舒緩搜尋瓶頸的 問題,但其缺點是會產生大量的搜尋訊息造成網 路擁塞,並且仍有搜尋不到資源的可能性。
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A two-dimensional RAKE receiver architecture, with an FFT based matched filtering

A two-dimensional RAKE receiver architecture, with an FFT based matched filtering

In this paper, we simulated the 2-D RAKE receiver in both a static channel and a mobile radio channel. Our simulation results show that a threshold level should be appropriately chosen to select main signal paths and suppress interference in the channel sounder. Our simulation results show that average bit-error probability performance of the system is close to the theoretic result in a static channel. In the mobile radio channel, we found that the system performance degrades as the Doppler frequency increases. On the other hand, the performance im- proves as AoS parameter increases as the 2-D RAKE receiver can resolve more paths and acquire spatial diversity gain.
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Design of spread spectrum multicode CDMA transport architecture for multimedia services

Design of spread spectrum multicode CDMA transport architecture for multimedia services

Moreover, the OCPN, being only a specification model for presentation of multimedia information, does not contain the communication and synchronization requirements over a net- work. Various multimedia data types have different performance requirements for network transmission and playback at the des- tination. However, the rates of communication and presentation of an isochronous object, such as video or audio, need to be equal in order to provide continuity in playback. In order to achieve this purpose, isochronous objects can be divided into smaller units of information to be used for maintaining syn- chronization. The smallest unit is referred as a synchronization interval unit (SIU) [4]. As an example, the synchronization in- terval for a video object can be 1/30th of a second, which corre- sponds to the playback duration of a single video frame. Hence, a video frame represents an SIU. For audio data, its SIU can be audio sample. As a result, a complete multimedia object is transmitted as a stream of SIU’s.
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Acquisition for W-CDMA RAKE Receiver System

Acquisition for W-CDMA RAKE Receiver System

performance of the spread spectrum system requires the receiver’s phase and frequency and its chip timing to be perfectly synchronized. The synchronization process is called code acquisition. Acquisition is based on the received signal’s magnitude of the impulse response of the mobile channel and sets the delay times of the RAKE fingers. The typical RAKE receiver architecture with maximal ratio combining is shown in Figure 1. The matched filter correlates the received signal with local PN code to obtain the delay profile of the multipath fading channel. The searcher is required to search the correlation profile. In the searcher, the threshold is set to select the peak values properly. It must set to obtain the acceptable missing probability false alarm probability.
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CORDIC-based architecture with channel state information for OFDM baseband receiver

CORDIC-based architecture with channel state information for OFDM baseband receiver

dual-mode CORDIC, and occupies about 74k gate count. FFT/IFFT is designed for high performance (SQNR=63 dB) and low latency (113 clock cycles) with 66k gate count. The inner receiver after FFT occupies about 69k gate count, including a CORDIC module, phase tracking circuit, and a demapping using CSI. The outer receiver operates at the same clock as the inner receiver, and therefore the Viterbi decoder requires 3 modules of ACS to achieve 54 Mbps date rate. The outer receiver with 4-b soft-decision and traceback length=90 occupies about 179k gate count. The total equivalent gate count is about 424k and the core size is 7.3 mm 2 in 0.18-µm CMOS. The RAM-free design makes the baseband processor more convenient and process-independent in SoC design. For consideration of practical effects caused from channel and RF/analog, the integrated baseband processor written in Verilog is not only tested by test patterns, but co-simulated in the simulation environment instead.
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Joint Calibration of Transmitter and Receiver Impairments in Direct-Conversion Radio Architecture

Joint Calibration of Transmitter and Receiver Impairments in Direct-Conversion Radio Architecture

Abstract—Direct-conversion radio architecture is a low-cost, low-power and small-size design that has been widely employed in today’s wireless devices. This architecture, however, induces radio impairments such as I-Q imbalance and dc offset that may incur severe degradation in communication performance if left uncompensated. In this paper, a new method is proposed to calibrate simultaneously a transceiver’s own transmitter and receiver radio impairments with no dedicated analog circuit in the feedback loop. Based on a unified time-domain approach, the proposed method is able to calibrate jointly the frequency- independent I-Q imbalance, frequency-dependent I-Q imbalance and dc offset and is applicable to any type of communication systems (single-carrier, multiple-carrier, etc.). The existing meth- ods in the literature either need a dedicated analog circuit in the feedback loop and/or are applicable only to a particular type of systems with some radio impairments present. The issue of training sequence design is also investigated to optimize the calibration performance, and analytical and simulation results show that the performance loss due to radio impairments can be recovered by the proposed method.
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Downlink Optimization and Performance of Relay-Assisted Cellular Networks in Multicell Environments

Downlink Optimization and Performance of Relay-Assisted Cellular Networks in Multicell Environments

Fig. 1. Multicell architecture (3, 3, 3). So far, as previously discussed, the performance evaluation and optimization of relay-assisted cellular networks have been limited to very specific system configurations: with a fixed number and location of RSs and/or using fixed reuse patterns. In this paper, our aim is to investigate the downlink optimization and performance limits of a general relay-assisted network in a multicell environment from an information-theoretic point of view. Two types of quality of end-user experience (QoE), i.e., 1) fixed-bandwidth allocation (FBA) and 2) fixed-throughput allocation (FTA), are investigated along with two path selection methods, i.e., SE based and signal-to-interference-plus-noise ratio (SINR) based. A genetic algorithm (GA) is proposed for the joint optimization of the system parameters, including RS’s positions, reuse pattern, path selection, and resource allocation among different links to maximize the system SE. The theo- retical performance serves as a benchmark. For more practical relay-assisted cellular networks, the effects of modulation and coding schemes and signaling overhead that enables the RSs’
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On the performance of an indicator-based stall avoidance mechanism for high-speed downlink packet access systems

On the performance of an indicator-based stall avoidance mechanism for high-speed downlink packet access systems

This paper includes two major contributions. 1) We introduce the term “gap-processing time” to evaluate the performance of different stall avoidance mechanisms. The gap-processing time is defined as the duration starting when the sequence of MAC layer data have a gap due to an NACK-to-ACK error until the receiver recognizes that this gap cannot be recovered by the MAC layer retransmission scheme. 2) We present the closed-form expression for the gap-processing time of the ISA mechanism in the multiprocess SAW HARQ mechanism. The gap-processing time is related to the MAC layer scheduling policy. Currently, two scheduling policies are considered for the HSDPA system to allocate radio resource to multiple users, namely 1) scheduling-by-bundle policy and 2) interleaving scheduling policy [28], [29]. The former policy schedules each user by a series of time slots, while the latter policy schedules time slots for multiple users one at a time. Therefore, with the scheduling-by-bundle policy, the gap in the reordering buffer can be detected earlier by consecutively receiving a series of packets. However, the scheduling-by-bundle policy does not ex- ploit multiuser diversity gain. Thus, the interleaving scheduling policy is adopted more commonly in current systems, since it can exploit the multiuser diversity gain [9], [10]. We will focus on the interleaving scheduling policy to derive the analytical model for the gap-processing time of the ISA mechanism. The relations between the gap-processing time and some system parameters in the physical layer and the MAC layer, such as packet error rates, the number of users, and the number of parallel processes in the HARQ mechanism, can be investigated by the developed analytical model. Since the gap-processing time affects the delay performance and quality of service sig- nificantly, the developed analytical approach can help evaluate the overall performance of the HSDPA system from the higher layer user’s perspective while considering the lower physical layer impact.
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COMPUTER-SIMULATION OF A DIRECT SEQUENCE SPREAD SPECTRUM CELLULAR RADIO ARCHITECTURE

COMPUTER-SIMULATION OF A DIRECT SEQUENCE SPREAD SPECTRUM CELLULAR RADIO ARCHITECTURE

Here we consider a spread spectrum cellular radio architec- ture in which the whole service area is divided into cells and each cell is served by a base. A mobile [r]

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Differential matched filter architecture for spread spectrum communication systems

Differential matched filter architecture for spread spectrum communication systems

For those matched filters with long stages, this new architecture saves half the number of M and A in comparison with the conventional filter, while maintaining an identical p[r]

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An Interference-Blocking RAKE (IB-RAKE) Receiver for CDMA Communications Systems

An Interference-Blocking RAKE (IB-RAKE) Receiver for CDMA Communications Systems

A major challenge for wireless communications systems is the limited capacity due to sparse radio frequency spectrum. The capacity limit, in practice, is mainly determined by the interference rejection capability [1]. Spread-spectrum communications techniques, realized in the form of code division multiple access (CDMA), with the advantages such as robustness against narrow-band interference with moderate power as well as noise, have been strong candidates in the next generation of high capacity wireless communications systems [2]. In CDMA systems, signals from other users, termed as interference, can be significantly attenuated as a means of lower cross-correlation among users’
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Digital-invisible-ink data hiding based on spread-spectrum and quantization techniques

Digital-invisible-ink data hiding based on spread-spectrum and quantization techniques

Plausible deniability is originally a term used in politics. It means the creation of loose and informal chains of commands in government, which allow controversial instructions given by high-ranking officials to be denied if these instructions become public. In the field of cryptography, deniable encryption allows an encrypted message to be decrypted to different meaningful plaintexts, depending on the key used. This allows the sender to have plausible deniability if he is compelled to give up his encryption key. But in strictly-defined modern cryptography, it is almost impossible to design a ciphertext that can be de- crypted to several different meaningful plaintexts. In the lit- erature of steganography, plausible deniability means the ca- pability to deliver some genuine message under the cover of other innocuous messages. When the existence of hidden in- formation is detected and the sender is forced to reveal the se- cret message, he can simply turn in one innocuous message and claim that no other information is hidden. As an example, the aforementioned real-world steganography system illustrates such a behavior. Plausible deniability has been proposed to en- hance the security of steganography systems and defend cur- rent steganalysis, as described in [14]. In this paper, instead of diving into details of various plausibly deniable schemes, some high-level discussions about implementing plausibly deniable steganographic systems based on generic watermarking tech- niques, and the comparisons with the proposed system are pro- vided in Section IV-A.
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Implementing an Ubiquitous Resource Service Architecture Based on the Web and LDAP

Implementing an Ubiquitous Resource Service Architecture Based on the Web and LDAP

The resource query, service request, and service confirmation procedures are illustrated in figure 5. For example, if a RU wants to contact with another people called Sam, the RU has to query a RDA in advance for getting the basic information of Sam, like email address or telephone number. Further example, if the RU needs to use a color laser printer service, the RU also has to query the RDA for knowing that where is a color laser printer located at and how to access the printing service. After the RU obtains the resource basic information which includes the uniform resource indicator (URI) of that resource, the RU points and clicks the URI hyperlink to connect to the resource service form page located at the corresponding printer RSP. Then, the RU must fill out the resource service form page and submit the request to invoke the action program- a corresponding printer service CGI program. The detailed action procedures was already described in the printer RSP
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Design and Simulation of a Low Power Rake Receiver for Indoor Communication

Design and Simulation of a Low Power Rake Receiver for Indoor Communication

• [2] NSC_BIST 子計畫六 • [3]Ahmed M. Eltawil and Babak Daneshrad, “A Low-Power DS-CDMA RAKE Receiver Utilizing Resource Allocation Techniques”, IEEE JSSC, vol. 39, Aug. 2004. • [4]Chi-Min Li and Hsueh-Jyh Li, “A Novel RAKE Receiver Finger Number Decisio n Rule”, IEEE Antennas and Wireless Propagation Letters, vol 2., 2003

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Estimating driving performance based on EEG spectrum analysis

Estimating driving performance based on EEG spectrum analysis

4. RESULTS AND DISCUSSION 4.1. Relationship between the EEG spectrum and subject alertness To investigate the relationship of minute-scale fluctuations in driving performance to concurrent changes in the EEG spectrum, we measured correlations between changes in the EEG power spectrum and driving performance by comput- ing the correlation coe fficients between the two time series at each EEG frequency. We refer to the results as forming a correlation spectrum. For each EEG site and frequency, we then computed spectral correlations for each session sepa- rately and averaged the results across all 10 sessions from the five subjects. Figure 4a shows the results for 40 fre- quencies between 1 and 40 Hz. Note that the mean correla- tion between performance and EEG power is predominantly positive at all EEG channels below 20 Hz. We also investi- gated the spatial distributions of these positive correlations by plotting the correlations between EEG power spectrum and driving performance, computed separately at dominant frequency bins 7, 12, 16, and 20 Hz (cf. Figure 4a) on the scalp (Figure 4b). As the results in Figure 4a show, the cor- relation coefficients plotted on the scalp maps are predom- inantly positive. The correlations are particularly strong at central and posterior channels, which are similar to the re- sults of previous studies in the driving experiments [21, 26, 27]. The relatively high correlation coefficients of EEG log power spectrum with driving performance suggest that us- ing EEG log power spectrum may be suitable for drowsi- ness (microsleep) estimation, where the subject’s cognitive state might fall into stage one of the nonrapid eye move- ment (NREM) sleep. To be practical for routine use during driving or in other occupations, EEG-based cognitive assess- ment systems should use as few EEG sensors as possible to reduce the preparation time for wiring drivers and compu- tational load for estimating continuously the level of alert- ness in near real time. According to the correlations shown in Figure 4b, we believe it is adequate to use the EEG signals at sites Cz and Pz to assess the alertness level of drivers con- tinuously.
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Fast feedforward channel sounding RAKE receiver

Fast feedforward channel sounding RAKE receiver

RAKE receiver includes a multipath searcher, a channel sounding subsystem, a pilot interference cancellation block, and a data sig- nal detection block.. The multipath searcher [r]

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Design and implementation of an all-digital QPSK direct-sequence spread-spectrum transceiver IC

Design and implementation of an all-digital QPSK direct-sequence spread-spectrum transceiver IC

We have integrated the DSSS DEQPSK modulatorldemodulator, the Costas carrier recovery loop, the PN sequence acquisition loop using a full digital matched filter in a sing[r]

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Performance analysis of noncoherent digital delay locked loops for direct sequence spread spectrum systems with Doppler shift and quantized adaptation

Performance analysis of noncoherent digital delay locked loops for direct sequence spread spectrum systems with Doppler shift and quantized adaptation

Digital code tracking becomes very popular because of the evolution toward all digital modem implementation of DSSS systems. In this paper, accurate nonlinear analysis for the noncoherent second-order digital code tracking loops is investigated over AWGN channels with the presence of Doppler shift. This modeling of channel finds applications in GPS [17] and other civilian or military satellite-based DSSS systems, where Doppler shift is due to the relative movement between the satellite and the receiver. In the analysis, based on a regenerative Markov chain modeling of the code tracking process, the lock-in range, transient response, MSE, and MTLL are evaluated more accurately than the traditional analysis. Furthermore, in a digital DLL, the adaptation of code tracking can only be done in discrete steps, i.e., quantized adaptation and that will result in significant changes in the loop performance. In this analysis, the effect of quantized adaptation is evaluated as well.
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