[PDF] Top 20 A single-chip low-power tunable CMOS low-IF single-conversion ISM receiver
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A single-chip low-power tunable CMOS low-IF single-conversion ISM receiver
... demodulation receiver system is shown Fig. 1. The choice of the IF frequency incorporates a principal design trade-off in heterodyne receiver ...requires a relatively high IF, ... See full document
4
Low-power fully integrated and tunable CMOS RF wireless receiver for ISM band consumer applications
... by a P+/N-well junction ...to power supply, the dc blocking capacitors are connected in se- ries to the varactor with a grounded ...be a full swing between supply voltage and the ...like ... See full document
9
Low-Power Sub-Harmonic Direct-Conversion Receiver With Tunable RF LNA and Wideband LO Generator at U-NII Bands
... Abstract—A low-power tunable-band sub-harmonic direct-con- version receiver covering the whole Unlicensed National Informa- tion Infrastructure band is demonstrated using ...two-stage ... See full document
12
A Low-Power 2.4-GHz CMOS GFSK Transceiver With a Digital Demodulator Using Time-to-Digital Conversion
... time-to-digital conversion is uti- lized in a digital demodulator for a low-power ...2.4-GHz CMOS GFSK ...employs a self-sampling technique and an auto-calibration algo- ... See full document
11
A 2.4-GHz Low-Flicker-Noise CMOS Sub-Harmonic Receiver
... 2.4-GHz Low-Flicker-Noise CMOS Sub-Harmonic Receiver Jin-Siang Syu, Member, IEEE, Chinchun Meng, Member, IEEE, and Chia-Ling Wang Abstract—A ...2.4-GHz low-noise sub-harmonic ... See full document
11
CMOS low dropout linear regulator with single Miller capacitor
... CMOS low dropout linear regulator with single Miller capacitor ...Liu A 2–5 V 150 mA CMOS low dropout (LDO) linear regulator with a single Miller capacitor of 4 pF ... See full document
2
A 2.4 to 5.4 GHz low power CMOS reconfigurable LNA for multistandard wireless receiver
... stage a CS-CG cascode topology is used and designed to be reconfigurable for variable gain and output ...frequency. A coarse gain control is conducted in three modes: high gain (HG), medium gain (MG) and ... See full document
4
A single chip CMOS APS camera with direct frame difference output
... Our sensor cell circuit can provide the frame difference output because the previous frame data are stored in each pixel circuit.. If the leakage current associated w[r] ... See full document
4
A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO
... of CMOS RFICs has been developed and applied to the design of the first K-band CMOS current-mode up-conversion ...up- conversion mixer has a low power consumption of ... See full document
8
Design and Simulation of a Low Power Rake Receiver for Indoor Communication
... “A Low-Power DS-CDMA RAKE Receiver Utilizing Resource Allocation Techniques”, IEEE JSSC, ...RAKE Receiver Finger Number Decisio n Rule”, IEEE Antennas and Wireless Propagation Letters, ... See full document
32
Task scheduling method for low power dissipation in a system chip
... The processing element (PE3) processes tasks (T7~T8) The poWer state of the processing element (PE3) changes from sleep to loW and then back to sleep. In sum, in a complicated system c[r] ... See full document
10
A novel electrically tunable RF inductor with ultra-low power consumption
... as a voltage-controlled variable resistance element to adjust the ground-return current, thereby changing the total magnetic flux and inductance between signal and ground ...on a lossy ...of a ... See full document
3
A CMOS current reused low-noise amplifier for ultra-wideband wireless receiver
... 1 Institute of Communication Engineering, National Chiao Tung University, Hsin-Chu, Taiwan 2 NOVATEK, Hsin-Chu, Taiwan 3 Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsin-Chu, Taiwan 4 ... See full document
4
New CMOS 2V low-power IF fully differential Rm-C bandpass amplifier for RF wireless receivers
... In this design, the Rm amplifier is realised by a simple inverter with tunable shunt-shunt feedback MOS resistor and tunable negative resistance realised by crosscoupled MOS [r] ... See full document
5
A low power high accuracy CMOS time-to-digital converter
... the mismatch among pulse-shrinking delay elements results in poor delay line linearity.. This sets a serious limit to the TDC resolution.[r] ... See full document
4
A low-power CMOS LNA for ultra-wideband wireless receivers
... Taiwan a) yiching.cm94g@nctu.edu.tw Abstract: In this paper, a low-power ultra- wideband (UWB) low- noise amplifier (LNA) is ...propose a structure to combine the common gate with ... See full document
6
A low power 2D DCT chip design using direct 2D algorithm
... In addition to the considerations in algorithm and ar- chitecture level, low power design methdologies in logic- style and circuit level are applied t o the real circuit im[r] ... See full document
6
A 5-GHz CMOS double-quadrature receiver front-end with single-stage quadrature generator
... 5-GHz CMOS double-quadrature front-end receiver for wireless LAN application is ...the receiver, a one-stage RLC phase shifter is used to generate quadrature RF ...m CMOS technology, ... See full document
3
10 GHz dual-conversion low-IF downconverter with microwave and analogue quadrature
... dual-conversion low-IF downconverter using 0.18-mm CMOS technology is ...while a two-section polyphase filter is utilised for the low- frequency LO 2 quadrature signal ...As ... See full document
2
A novel low-temperature growth and characterization of single crystal ZnO nanorods
... novel low-temperature growth and characterization of single crystal ZnO nanorods Chin-Hsien Hung, Wha-Tzong Whang ∗ Department of Materials Science & Engineering, National Chiao Tung University, 1001 Ta ... See full document
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