[PDF] Top 20 Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application
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Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application
... Corrector for Phase Lead-Compensated Buck Converter in DVS Applications Shaowei Zhen, Xiaohui Zhu, Ping Luo, Yajuan He, and Bo Zhang Abstract— Modern low-power system on a chip needs direct current ... See full document
6
Enhanced active feedback technique with dynamic compensation for low-dropout voltage regulator
... LDO regulator with a new compensation topology maintains high stability even without external load capacitors and features fast transient response, enabling it to reduce undershoot and ... See full document
12
A Switchable Digital-Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique
... LDO regulator enhances power con- version efficiency compared with the performance of converters without the ...load transient response with dis- tinct SoC operation ...LDO ... See full document
11
Low-Dropout Regulators With Adaptive Reference Control and Dynamic Push-Pull Techniques for Enhancing Transient Performance
... LDO with ARC technique. The first fast transient technique named as nonlinear control [1]–[3] speeds up the time of charging/discharging the large par- asitic capacitor ( ) at the gate ... See full document
7
Fast Transient DC-DC Converter with On-Chip Compensated Error Amplifier
... converter, fast-transient re- sponse, on-chip ...a dynamic voltage in terms of the processing ...the dynamic voltage scaling (DVS) technique is the most popular power ... See full document
5
CMOS low dropout linear regulator with single Miller capacitor
... CMOS low dropout linear regulator with single Miller capacitor ...CMOS low dropout (LDO) linear regulator with a single Miller capacitor of 4 pF is ...LDO ... See full document
2
Power-Tracking Embedded Buck-Boost Converter With Fast Dynamic Voltage Scaling for the SoC System
... contains fast (a) up-tracking and (b) ...Function Fast transient response and short settling time are necessary to achieve the F-DVS function in the PTE-BB converter for the SoC ...high ... See full document
12
A CMOS low dropout regulator stable with any load capacitor
... load transient performance cannot be ...vary with loading conditions. For example, as load current changes from 1mA to 100mA, transconductance of the pass element may be ten times larger, and R L ... See full document
4
A Low-Dropout Regulator With Smooth Peak Current Control Topology for Overcurrent Protection
... output voltage is smaller than the target ...large voltage ripple before the output voltage reaches to its rated ...drop voltage and the current flowing through the pass device is proposed to ... See full document
9
Power PHEMT with compact device layout for low voltage CDMA application
... Tlic doiible gale i " c s s wiis pcrfornied to iiicrcasc tlic dcvicc hresktlowii anti rcdiicc ihe ilevicc sourcc resishiiw using it dilute citric acid hiscd solution.. [r] ... See full document
3
Low voltage BiCMOS dynamic logic gates
... This design offers an effective speed improvement over other existing designs, such as merged BiCMOS (M-BiC- MOS) [2] and quasi-complementary BiCMOS (QC-BiCMOS) 131[r] ... See full document
2
Fast Transient (FT) Technique With Adaptive Phase Margin (APM) for Current Mode DC-DC Buck Converters
... control with the APM technique is proposed to achieve good transient response in current-mode DC-DC buck converters at different load ...The fast transient control can effectively ... See full document
13
Sensitisable-path-oriented clustered voltage scaling technique for low power
... However, if the circuit is considered to be under V,,, at the beginning, our PCVS technique can take advantage of the path sensitisation criterion and path selection [r] ... See full document
7
Smooth Pole Tracking Technique by Power MOSFET Array in Low-Dropout Regulators
... The power MOSFET array makes the power stage be turned on/off in a proper sequence to achieve smooth pole tracking. Basically, the turn-on sequence is from the large power MOS transistor to the small power MOS transistor ... See full document
7
A low phase-noise voltage-controlled SAW oscillator with surface transverse wave resonator for SONET application
... IV. C ONCLUSIONS A STW-based oscillator was designed and fabricated in this study. The resonator is operated directly at the specific frequency of 2.48 GHz to avoid the degradation of phase noise due to frequency ... See full document
6
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement
... D-LDO regulator with the bidirectional asynchronous wave pipeline ...the transient speed is mainly determined by because the shift register allows only one power switch to be turned on or off within ... See full document
13
An Optimization-based Multiple-Voltage Scaling Technique for Low Power CMOS Digital Design
... As illustrated in previous works, most long paths in a complex circuit are actu- ally false. Furthermore, a significant portion of long false paths do not need to be shortened. 14 We may need only to shorten long ... See full document
12
Low-voltage BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers
... BiCMOS integrated circuits The Letter presents a low-voltage BiCMOS dynamic minimum circuit using a parallel comparison algorithm for VLSI implementation of fuzzy contr[r] ... See full document
2
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings
... controller with the timing diagrams as depicted in ...synchronous with the edge-trig- gered clock signal ...power for each instruction according to the instruc- tion power table, which is generated ... See full document
13
Low-power wordline voltage generator for low-voltage flash memory
... the low standby current, the voltage divider requires large resistors in standby ...mode. With the aforementioned charge pump regulator scheme, if the time that the ring oscillator stops is ... See full document
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