Hyperbola 電路[8]補償使得
= 點所需的面積為 880×1040 μm2,電路特 性經積體電路模擬軟體加以驗證後,模擬
其結果如圖七所示;轉換器之最高效率為 百分之九十四,而負載電流由100 mA 變 化 600 mA 時其轉換效率都還可以維持 百分之八十五以上,其結果如圖八所示。
圖五 轉換器電路之佈局,其不含接點所需面積為 880×1040 μm2
圖六 轉換器在供電電壓為VDD = 3.3 V 時之輸出 情況,其輸電壓為1.2V,穩定時間約為 0.36 ms。
圖七轉換器之輸出電壓為 1.2V 時之漣波輸出情
況,其最大漣波約為10 mV。
圖八 轉換器之轉換效率與不同負載電流之變化情 況。
四、結論
小型化與長效性的電壓供電系統是行 動電子產品極為重要的需求之一,利用交 換式電源技術可以有效的達到這項要求,
本計畫以數位 CMOS 技術作為開發類比 積體電路的交換式電源核心電路晶片,已 順利的完成低電壓降壓式直流對直流轉換 器積體電路設計與晶片佈局,應用於多電 壓系統可以大幅度的解決多媒體系統與行 動電子產品供電系統的體積及效率等問 題,對於增長電池的使用時間及產品小型 化有極大的助益,這個計畫的成果可輕易 的被嵌入多媒體與行動電子產品中。本計 畫之部份研究成果已發表[11]或已被接受 [12] 由 IEEE 舉辦的國際性相關研討會 上。
由於時間的限制,部份目標尚在進行 中,如升降壓型轉換技術、電流感測技術、
磁滯電流控制電路與及最佳化控制機制等 技術,都是提高電池的使用效率之極佳論 點,也是未來要繼續努力的方向。
五、參考文獻
[1] Smith K. M., Jr., Lai Z., and Smedley K. M.: “A new PWM controller with one-cycle response,”
IEEE Trans. on Power Electronics, Jan. 1999, 14, (1), pp. 142-150.
[2] K. M. Smedley, S. Cuk, “One-cycle control of switching converters ,” in proc. of Power Electronics Specialists Conference, 1991, PESC '91, June 1991, pp. :888-896.
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[3] Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui,
“An integrated one-cycle control buck coverter with adaptive output and dual loop for output error correction,” IEEE Journal of Solid-State Circuits, vol. 39, no. 1 Jan. 2004.
[4] A. M. Wu, Jinwen Xiao, D. Markovic, S. R.
Sanders, “Digital PWM control: application in voltage regulation modules,“ in proc. of 30th Annual IEEE PESC 99, 1999, vol. 1, pp. 77-83.
[5] Chung-Hsien Tso and Jiin-Chuan Wu, “An integrated digital PWM DC/DC converter using proportional current feedback,” in proc. of the 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001, vol. 3, pp. 65-68.
[6] C. F. Lee and P. K. T. Mok, ”A monolithic current-mode CMOS dc-dc converter with on-chip current-sensing technique,” IEEE Journal of Solid-State Circuits, Vol. 39, No. 1, pp. 3-14, Jan. 2004.
[7] Cheung Fai Lee, and Philip K. T. Mok, “On-chip current sensing technique for CMOS monolithic switch-mode power converter,” in proc. of IEEE ISCAS, May 2002, PP. V265-V268.
[8] Jiann-Jong Chen, Yeong-Tsair Lin, Hung-Yih Lin, and Wen-Yaw Chung, ”Integrated
Pulse-width-modulation Circuit Using CMOS Processes,” in proc. of 2004 35th IEEE Power Electronics Specialists Conference, PESC’04, June 20-25 2004, Aachen, Germany, pp. 1356-1358.
[9] Lai Z. and Smedley K. M.: “A general constant-frequency pulse-width modulator and its applications,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, April 1998, 45, (4), pp. 386-396.
[10] Robert W. Erickson, Fundamental of Power Electronics. Norwell, MA, Kluwer Academic Punlishers, 1999.
[11] Yeong-Tsair Lin, Wen-Yaw Chung, Dong-Shiu Wu, Ho-Cheng Lin, and Robert Lin, “A Low Voltage CMOS Bandgap Reference,“ in proc. of the 3rd IEEE International Northeast Workshop on Circuits and Systems 2005, NEWCAS 2005, June 19-22 2005, Quebec, Canada, pp. 227-230.
[12] Yeong-Tsair Lin, Wen-Yaw Chung, Dong-Shiu Wu, Hung-Chan Wang, Hung-Yih Lin, and Jiann-Jong Chen, “A monolithic CMOS step- down dc-dc converter,” accepted by the 48th MWSCAS, Aug. 7-10 2005, Cininnati, U.S.A.
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