一、 緒論
5.6 實驗結果之分析與討論
由前面的實驗結果可看出，不論四階或八階的控制器，其模擬及實際測試的 結果與理論值都相當接近，可推測模擬平台的環境與實際的硬體平台環境類似，
且因為硬體平台的結果與理論值相近，所以相當適合做為實現 ANC 耳機理論的 平台。
從比較四階控制器與八階控制器的消音結果，可發現噪音值在頻率 250Hz 的 地方，由-8dB 變成-21dB，可知藉由提高階數的方式，增加消音的效果。
由耗電實驗表 5.4.1，在降低 DSP 的的工作時脈及工作電壓，使得測量的電 壓值由 0.014V 降到 0.005V，降低將近為原來的一半，由於測量電阻值為 0.16Ω，
可算出 DSP 晶片的總消耗電流為 0.005/0.16=0.03125A，因工作電壓為 1.1V，所 以 DSP 總消耗功率為 0.03125*1.1=0.034375W。
最後，在模擬去除八階控制器 CODEC 時間延遲的實驗，比較圖 5.3.2 和圖 5.5.2 可發現去除 CODEC 時間延遲的因素後，在低頻的地方（約 130Hz），消音 值由-3dB 改善到-10dB，增大了消音的頻帶，所以如改善時間延遲的問題後，可 達到更好的消音效果。
六、結論
本論文的目標分為兩部分，一部份是 ANC 實驗平台的建立，另一部份是研 究數位控制器的優點。目前在 ANC 實驗平台方面成果如下
一、 測試平台的自動化
-減少人工操作的失誤及達到測量工作的自動化 二、 利用 simulink 建立模擬環境
-可加速設計控制器的速度 三、 使用 C5510 DSK 實現硬體平台
-其實現結果與理論值相當接近，相當適合做為實現 ANC 耳機理論的 平台
在研究數位控制器的優點方面，我們利用前面所提的平台實現了八階的數位 控制器，也證明利用高階的控制器可讓噪音消除的效果變好，未來可嘗試別的演 算法（例：H∞最佳化控制），設計更高階的控制器。
在硬體平台方面，由於我們使用 Fixed-point DSP 且利用組語編寫相關程式 碼，達成省電且程式執行效率高的特性，便於未來可繼續增加功能。
而使用 DSK5510 實現硬體平台時，發現其上的 CODEC 晶片造成相當大的 時間延遲，雖然可藉由控制器提高階數的方法來改善其效能，但是，如果能去除 時間延遲的因素，相信能達更好更穩定的抑制效果。
參考文獻
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∞
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附 錄
A-1 DSP 主程式程式碼 1（C language）
#include <std.h>
#include <log.h>
#include "mcbsp.h"
#include "mcbspcfg.h"
#include "iircas51_mod.h"
#include <csl_irq.h>
#include "dsk5510.h"
#include "dsk5510_dip.h"
#include "dsk5510_led.h"
#include "QP_filter.h" // filter coefficients
/* Codec configuration settings */
DSK5510_AIC23_Config config = { \
0x0002, /* 0 DSK5510_AIC23_LEFTINVOL Left line input channel volume \ 0x0002, /* 1 DSK5510_AIC23_RIGHTINVOL Right line input channel volume */\
0x01f9, /* 2 DSK5510_AIC23_LEFTHPVOL Left channel headphone volume */ \ 0x01f9, /* 3 DSK5510_AIC23_RIGHTHPVOL Right channel headphone volume */ \ 0x0011, /* 4 DSK5510_AIC23_ANAPATH Analog audio path control */ \
Int16 input_L,input_R,zero=0;
Int16 output_L,output_R;
Int16 delayBufferL[4*NBIQ+2]; // Delay Buffers for DSPLIB routine Int16 delayBufferR[4*NBIQ+2]; // Delay Buffers for DSPLIB routine
void AIC23_openCodec(DSK5510_AIC23_Config *Config);
void AIC23_rset(Uint16 regnum, Uint16 regval);
void AIC23_config(DSK5510_AIC23_Config *Config);
CSLBool AIC23_read16(Int16 *val);
CSLBool AIC23_write16(Int16 val);
Uint16 rcvEventId, xmtEventId;
Uint16 old_intm;
void main() {
//--- initial all compoment --- short i;
/* Initialize AIC23 and MCBSP */
AIC23_openCodec(&config);
/* Initialize the board support library, must be called first */
DSK5510_init();
/* Initialize the LED modules of the BSL */
DSK5510_LED_init();
/* set the content of delay buffer to zero */
for (i=0;i<(4*NBIQ+2);i++) delayBufferL[i]=0;
for (i=0;i<(4*NBIQ+2);i++) delayBufferR[i]=0;
}
void read_isr(void) {
iircas51_mod(&input_L, COEFFS_L, &output_L, delayBufferL, NBIQ, 1);
DSK5510_LED_on(3);
iircas51_mod(&input_R, COEFFS_R, &output_R, delayBufferR, NBIQ, 1);
DSK5510_LED_on(3);
while (!AIC23_write16(output_R));
}
void AIC23_openCodec(DSK5510_AIC23_Config *Config) {
Uint32 delay;
/*
* Initialize the AIC23 codec */
/* Start McBSP1 as the codec control channel */
MCBSP_start(Mcbsp1_control, MCBSP_XMIT_START | MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 100);
/* Reset the AIC23 */
AIC23_rset(DSK5510_AIC23_RESET_ADDRESS, 0);
/* Configure the rest of the AIC23 registers */
AIC23_config(Config);
/* waiting the Codec become stabile */
for (delay = 0; delay < 20000000; delay++);
//set the interrupt for MCBSP2
/* Clear any garbage from the codec data port */
if (MCBSP_rrdy(Mcbsp2_data)) MCBSP_read16(Mcbsp2_data);
/* Temporarily disable all maskable interrupts */
old_intm = IRQ_globalDisable();
/* Get Event Id's associated with MCBSP 2 receive */
/* The MCBSP_Handle object, Mcbsp2_data has been predefined */
/* in the code automatically generated by the DSPBIOS/CCSL */
/* GUI config */
rcvEventId = MCBSP_getRcvEventId(Mcbsp2_data);
MCBSP_start(Mcbsp2_data, MCBSP_XMIT_START | MCBSP_RCV_START | MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 220);
void AIC23_rset(Uint16 regnum, Uint16 regval) {
/* Mask off lower 9 bits */
regval &= 0x1ff;
/* Wait for XRDY signal before writing data to DXR */
while (!MCBSP_xrdy(Mcbsp1_control));
/* Write 16 bit data value to DXR */
MCBSP_write16(Mcbsp1_control, (regnum << 9) | regval);
}
/*
* ======== DSK5510_AIC23_config ========
* Set the default codec register config values */
void AIC23_config(DSK5510_AIC23_Config *Config)
{
CSLBool AIC23_read16(Int16 *val) {
/* Read the data */
if (!MCBSP_rrdy(Mcbsp2_data)) { return (FALSE);
}
*val = MCBSP_read16(Mcbsp2_data);
return (TRUE);
}
CSLBool AIC23_write16(Int16 val) {
MCBSP_write16(Mcbsp2_data, val);
return(TRUE);
}
A-2 DSP 主程式程式碼 2（C language）
#define NBIQ 4 //Number of biquads
#pragma DATA_SECTION (COEFFS_L, "coeff_sect1");
// 0.5*y(n)=b0*x(n)+b1*x(n-1)+b2*x(n-2)-a1*y(n-1)-a2*y(n-2) Int16 COEFFS_L[5*NBIQ] = {
/* C55x: b0 b1 b2 a1 a2 ... */
//fs=32k Hz
// 4 order filter , AIC23_Config=-13.9060 // -16384, 30129,-13776,-31547, 15250, // 8192,-16468, 8334,-32583, 16234,
// 8 order filter , AIC23_Config=-26.254523 -16384, 9255, 6832,-31781, 15456,
16384,-32331, 16053,-31781, 15456, 16384,-31781, 15456,-32665, 16322, 16384,-32665, 16322,-32665, 16322 };
#pragma DATA_SECTION (COEFFS_R, "coeff_sect1");
// 0.5*y(n)=b0*x(n)+b1*x(n-1)+b2*x(n-2)-a1*y(n-1)-a2*y(n-2) Int16 COEFFS_R[5*NBIQ] = {
/* C55x: b0 b1 b2 a1 a2 ... */
// fs=32k Hz
// 4 order filter , AIC23_Config=-22.037167 //-16384, 27159,-10844,-31890, 15567,
// 16384,-32591, 16308,-32564, 16222
// 8 order filter , AIC23_Config=-26.254523 -16384, 9255, 6832,-31781, 15456,
16384,-32331, 16053,-31781, 15456, 16384,-31781, 15456,-32665, 16322, 16384,-32665, 16322,-32665, 16322 };
A-3 DSP 組語程式碼
.def _iircas51_mod
;******************************************
; Program section
;**********************************************************************
.text _iircas51_mod
;Context save
PSH mmap(ST0_55) PSH mmap(ST1_55) PSH mmap(ST2_55) PSH mmap(ST3_55)
BCLR CPL ;DP relative addressing
PSH mmap(DP) MOV #0, DP .dp 0
PSH @T3_L
PSHBOTH XAR4 PSHBOTH XAR5 PSHBOTH XAR7
;initialization
BSET SXMD ;sign extension enable BCLR SATD ;D-unit saturate disable BSET FRCT ;fractional mode enable BCLR SATA ;A-unit saturate disable
;Save pointer to index at dbuffer[0]
MOV XAR3, XAR5
;setup circular addressing
MOV T0, T3 ;compute 2*nbiq SFTS T3, #1
MOV @T3_L, BK03 ;init AR0-3 circular buf size (2*nbiq) MOV @T3_L, BK47 ;init AR4-7 circular buf size (2*nbiq)
BSET AR3LC ;init AR3 = circular (dbuffer) ADD #1, AR3 ;adjust AR3 to buffer start
MOV @AR3_L, BSA23 ;init AR2-3 circular start addr: dbuffer(1)
BSET AR4LC ;init AR4 = circular (dbuffer) MOV XAR3, XAR4 ;adjust AR4 to buffer start ADD T3, AR4
MOV @AR4_L, BSA45 ;init AR45 circ start addr: dbuffer(1+nbiq)
MOV *AR5, AR3 ;init AR3 offset to x(n) buffer start MOV *AR5, AR4 ;init AR4 offset to y(n) buffer start
SUB #1, T1, T3 ;compute nx-1
MOV T3, BRC0 ;init outer loop counter (nx-1)
MOV XAR1, XAR7 ;save original value to reinitialize coeff buffer pntr
SUB #1, T0, T3 ;init inner loop counter (#bi-quads-1) MOV T3, BRC1
ADD #1, T0, T1 ;index for buffer reset
RPTBLOCAL loop1-1 ;outer loop: process a new input
MOV *AR0+ << #16, AC1 ; HI(AC1) = x(n)
||RPTBLOCAL loop2-1 ;inner loop: process a bi-quad
MPYM *AR1+, AC1, AC0 ; AC0 = b0*x(n)
MOV rnd(HI(AC0)), *AR4 ; y(n) replaces y(n-2)
||AADD T1, AR4 ;point to next y(n-1)
;
MOV AC0, AC1 ;input to next biquad
loop2:
MOV XAR7, XAR1 ;reinitialize coeff pointer
MOV rnd(HI(AC0)), *AR2+ ;store result to output buffer
loop1:
; Signal overflow MOV #0, T0
XCC check1, overflow(AC0) MOV #1, T0
check1:
;Save last index value
MOV AR3, *AR5 ;save index to dbuffer[0]
;Context restore POPBOTH XAR7 POPBOTH XAR5 POPBOTH XAR4 POP @T3_L POP mmap(DP_L)
POP mmap(ST3_55) POP mmap(ST2_55) POP mmap(ST1_55) POP mmap(ST0_55)
RET