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結論與未來展望

在文檔中 多執行緒Java處理器設計 (頁 89-92)

本論文我們以先前 JAIP 為基礎提出 Multicore multithreading Java Processor 架構。每 個 JAIP 處理器的可容納多個 threads、達到極小的 context-switching overhead、time slice 數值可以壓縮到 20 milliseconds,並且大幅減少電路資源的使用;在多核心 JAIP 處理器 方面,我們提出 Inter-Core Communication Unit 與 Data Coherence Controller 新的設計,

用以支援 thread 的分配、lock object 與 waiting thread 的維護,修改每個處理器的 Thread Manager Unit 以支援 waiting thread 管理與排班。實驗結果顯示我們提出的架構可大幅縮 減 Java 處理器電路資源使用並且有效支援更多 threads。

未來設計方向有 3 點:(1)使用不同 thread scheduling 方法實作成電路例如 priority queue,當 Java 應用程式內每個 thread 的指令數量或重要性不一致時,能夠設定每個 thread 的 priority 並且作為 scheduling 電路模組的參數 (2)藉由 JAIP 的 Hardware Native Interface 支援更多 Java native methods (3)多核心 JAIP 處理器下 Object Heap Cache 與存取效率的 改進,目前 JAIP 處理器的 Heap Cache Controller 採用 Write-through 機制,由於每次執 行 Object Heap Cache 寫入的指令時皆需要傳資料到 DDR memory,因此需要設計 Write-back 或是更進階的 flush 機制減少 memory accessing overhead。

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在文檔中 多執行緒Java處理器設計 (頁 89-92)