Conclusion

A new circuit of RMCNN w/o EO is implemented. The new circuit has the same recognition rate with RMCNN with elapsed operation, but the operation of RMCNN w/o EO is simpler.

The new RMCNN w/o EO doesn’t need a elapsed period to get the feature enhanced ratio weights. The RMCNN w/o EO can generate the feature enhance ratio weights directly after pattern learning, and it has a good recognition rate that is the same with RMCNN with elapsed operation. Though the operation of the RMCNN w/o EO is simpler, the circuit of RMCNN w/o EO isn’t complicated. The RMCNN w/o EO doesn’t need the multi-divider (M/D)[18] in the RMCNN with elapsed operation. Thus the transistors count of RMCNN w/o EO is less than the RMCNN with elapsed operation. Besides, there is a division behavior in RMCNN w/o EO, but there isn’t any divider in the circuit. Thus the hardware of RMCNN w/o EO is simple.

The number of the learning patterns of RMCNN w/o EO is 3. They are Chinese characteristic one , two and four (一, 二 and 四). Maximum standard deviation of normal distribution noise is about 0.3. The number of learning patterns that RMCNN w/o EO can remember is still few. To increase the number of learning patterns that can be remembered, we should modify the learning algorithm or the recognizing algorithm continuously in the future.

In the experimental result, some vertical lines of pattern “四” are unrecognized. The recognition results of patterns “一” and “二” are successful and all lines in pattern “一” and

“二” are horizontal. That doesn’t mean the recognition rate of horizontal lines is better than vertical lines. The failure of recognition result dues to the ratio weights around one pixel and

the inputs of neighborhood pixels. If the ratio weights around one pixel are wrong, the recognition fails even that pixel is on horizontal line. Thus the failure of recognition will appear in other patterns like “五” if the wrong ratio weights are generated. Fig. 5.1 shows some examples that recognizing failure may happen and not all of the failure examples are vertical lines.

Fig. 5.1 Examples of Recognizing failure 5.2 Future Works

The RMCNN w/o EO in this thesis can’t recognize all of the three patterns. The cause is found and the circuit is also redesigned in this thesis. Simulation supported that the modified design can really recognized all of the three patterns. Thus the RMCNN w/o EO should be taped out again. To reduce the chip area, the routing of RMCNN w/o EO should be modified too.

There are some modifying methods for the next chip are proposed in this thesis

1. The capacitance value should be optimized in the future. The operating speed of RMCNN w/o EO should be decided and the capacitance value of Cw and the saturated output current of T2D Iysat can be chosen according to the operating speed of RMCNN w/o EO.

2. The routing of layout can be more effective and save die area and the smaller die area has less process variation.

3. The static D-flip-flop should be used instead of dynamic D-flip-flop.

4. The modified output stage can be used to save power consumption.

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簡歷

VITA

姓 名：吳 諭 學 歷：

台北市立建國高級中學 (85年9 月~88 年6 月) 國立中央大學電機工程學系 (88年9 月~92 年6 月) 國立交通大學電子研究所碩士班 (92年9 月~94 年9 月)

研究所修習課程：

類比積體電路 I 吳介琮教授

類比積體電路 II 吳重雨教授

數位積體電路 柯明道教授

積體電路之靜電放電防護設計特論 柯明道教授

數位通訊 桑梓賢教授

高等數位信號處理 劉志尉教授

隨機過程 王聖智教授

混合訊號式積體電路設計與實驗 I 吳介琮教授

永久地址：板橋市介壽街66之2號 Email： vivid175.ee92g@nctu.edu.tw

u88084100@cc.ncu.edu.tw m9211657@alab.ee.nctu.edu.tw