1930 Lilienfeld have proposed the idea of field-effect transistors (FET) [1], and written in the patent, but he has no actual experiment. Until 1947, W.
Shockley, J. Bardeen, W. H. Brattain was actually made well known JEFT, and in 1956 received the Nobel Prize [2]. Then, in 1960 Kahng and Atalla made the first metal-oxide-semiconductor (MOS) transistor, the widely used MOSFET [3].
The development of organic semiconductors must to mention that Shirakawa contribution of the conductive polymer in 1977. The development is such a breakthrough so that he got the Nobel Prize in 2000 [4]. To be in 1986 by Mitsubishi Electric corporation Koezuka team made out of polythiophene FET, thus opening up the development of today's OTFT [5]. In just twenty years, this field has made rapid development. For example, the thin film transistor mobility from the initial 10-6 ~ 10-5 cm2V-1s-1 rise to 10.0 cm2V-1s-1 [6-8], an increase of over six orders of magnitude, the mobility of the organic crystal is more than 40.0 cm2V-1s-1 [9-10]. Organic thin film transistor (OTFTs) driven displays, electronic paper, RFID tags and other products are gradually coming into view.
These notices OTFTs have broad application prospects. There are many kinds of OTFTs material source. Controlling semiconductor performance can be achieved through molecular design and synthesis.It has good flexibility that can achieve full flexible devices and circuits which can be applied to the rollable
product such as electronic paper. (see in Fig.1-1). In addition, most OTFTs materials can be dissolved in common solvent, which can be used to solvent processing methods. For example: inkjet printing, spin coating, drop coating, micro-contact printing, etc., to prepare devices and circuits, thus promoting the development of printing electronics.
Fig.1-1 OFET-based flexible display [11] and electric skin sensor [12]
1.2 Operation principle of OTFTs
1.3 Motivation
OTFTs have much attraction by their solution process ability, low temperature processing, and potentially low cost fabrication, with the added advantage of lightweight, bendable features [13-14]. Despite recent advancements in material functionality and processing technologies, OTFTs are somewhat limited in terms of device lifetime and mobility, which hinder their adoption on a wider scale.
Recent progress on hybrid nanostructured inorganic-organic transistors may become an alternative means to conquer these barriers [15-16]. For instance, using carbon nanotubes as an additive into the organic-based semiconducting
channel has showed certain enhancement on device mobility due to their metallic/semiconducting electrical properties and unique one-dimensional structures [17]. Thus, further work on utilizing different nanostructures with high aspect-ratio into semiconducting organic hosts can help us disclose the potential of hybrid transistors [18].
The work centers on the hybrid nanowire-polymer semiconducting network for the generation of hybrid-based TFT devices. The network is consisted of a layer of parallel oriented silicon nanowires (Si NWs) and a subsequent organic layer of solution-processed poly-3-hexylthiophene, P3HT. The electrical characterization of these hybrid Si-P3HT TFTs and organic P3HT devices is investigated
1.4 Thesis Organization
This thesis is divided into five chapters. In Chapter 2, brief review active layer materials, transistor structure, and measurement and extraction methods of electrical parameters are introduced. In Chapter 3, the fabrication flow of hybrid OTFTs is described. In Chapter 4, electrical and material properties of devices are presented and discussed such as the Si-NWs density effect on hybrid OTFTs.
Conclusions and future works are integrated in Chapter 5.
Chapter 2
organic and inorganic semiconductors arrangement method. In the organic semiconductor, a larger grain size, the smaller the grain boundary, and has a more orderly stacking direction, the transmission of the carrier has a positive impact. In the one dimensional composite material in transistors, highly directional, high-density structure of one dimensional materials show good improvement features, thus effective manufacture of high-density and high directivity one dimensional material structure also become a very important issue. This will introduce this experiment materials used in the active layer, and various control method of the organic semiconductor layer stack and the various effective permutation methods of the one dimensional material. In section 2.3 will briefly present hybrid OTFTs development, as well as the experimental materials used in the active layer. Section 2.4 is the literature review summary.2.1 Structure and Theory of Organic Thin Film Transistors
OTFTs expected to be the basic building blocks for flexible integrated circuits and displays. A schematic structure in this thesis is shown in Fig. 2-1.
The operation principle of FET that is to rely on a strong electric field induced current in the dielectric and semiconductor interface. By controlling the electric
field intensity to control source and drain current. To Bottom gate bottom contact structure as an example, insulating oxide layer spacing between the gate and the semiconductor, Source and drain contacts with the semiconductor.
Source electrode injected the carrier flow to the channel. Channel current transport to the drain electrode. Professor Bao said ‘’For pixel switching transistors in liquid crystal displays, for instance, mobility greater than 0.1 cm2V-1s-1 and ON/OFF ratio greater than 106 are needed [19].’’ In recent years, organic semiconductor materials have considerable progress on carrier mobility (see Fig. 2-2).Compared with inorganic semiconductor materials they still have much room for improvement (see Fig. 2-3). Hence, a variety of innovative ideas are constantly being proposed to hybrid materials based on inorganic and organic semiconductors may be one of the potential candidates.
Fig. 2-1 Bottom gate bottom contact structure of an OTFT
Fig. 2-2 Mobility of organic semiconductors [20]
Fig. 2-3 The span of mobilities of organic materials of interest for electronic applications [21]
The π-bonding orbitals and quantum mechanical wave-function overlap are the most important mechanism for organic semiconductors charge transport [22].
Compared with high carrier mobility inorganic semiconductors, organic semiconductor molecular to form a grain is by weak Van de Waal force. Current carrier mean free path is less than the average distance between molecules, the degree of electron delocalization weaker than strong covalent bonding and inorganic semiconductors. Thus, developed a charge localization hopping transfer model which be called hopping model. Carriers were localized in a potential well. It need thermal excitation to assist to breakthrough the potential well, and overcome the energy barrier between two transition energy level to transport to the next potential well. Therefore, the charge transfer transition is thermally active. From microscopic view, carrier transition between molecule and molecule is continuous intermolecular redox process. This charge transport mechanism theory can be calculated by the famous Marcus theory [23]. Charge or hole carriers can use band-like transportation under external electric field (see Fig. 2-4). Carrier mobility is considered of the speed of many small energy level gaps for the holes or electrons to move between two energy levels. When the electric energy carriers continue toward the direction of high energy level, and have a short transition path, the carrier mobility will get higher [24].
Fig. 2-4 Sketch of the spatial (left) and energy (right) landscape of hopping transport under the influence of an external electric field (redrew from ref. 21)
2.2 Semiconductor Material Alignment
2.2.1 Ordering of organic semiconductors
The carrier transport in OTFT is specific for two-dimensional carrier propagation through the device. Since the π-faces and the chain backbone are the only direction can transport charges (the side chains are insulators), the edge-on orientation has been suggested to benefit two-dimensional charge transport [25]. Therefore, for produce a transistors, a better arrangement of stacked, larger grain, smaller grain boundaries are needed. Besides, it hopes to be able to control lattice arrangement direction. Different arrangements have their advantages and disadvantages (see Table 2-1). The following are several methods to control polymer stacking direction：
(1) SAM treatment ： Organosilanes such as alkylchlorosilanes, alkylalkoxysilanes, and alkylaminosilanes are the most widely used materials as effective surface modifiers because of the uniform and reproducible surface energy and hydrophobicity they provide (see Fig. 2-5a) [26-29].
(2) Solvent self-assembly：Polymer semiconductors easily dissolved in solvent, through use different solvents, mix different material (such as PMMA), use
various concentrations, to control the crystallographic orientation and crystallization characteristics (see Fig. 2-5b) [30-33].
(3) Electric field：Applying a strong electric filed during the thermal annealing process may be able to align molecules into a better crystal orientation (see Fig.
2-5c) [34].
(4)Substrate structure：Etching the substrate produce different density, aspect ratio of the groove, that crystal orientation can be effectively controlled (see Fig.
2-5d) [35].
(5)Alignment film：The concept is similar to the way of aligning liquid crystal.
Using the alignment layer (such as PI), after rubbing method or photo-alignment method to achieve the effect of molecular alignment (see Fig. 2-5e) [36-37].
(6)Mechanical force：Using lateral sheared on the film or control the direction of fluid motion to have alignment of polymer film. Because external force is strong, so it is easy to have great impact on arrangement, but it is easy to destroy the film surface structure (see Fig. 2-5f) [38-40].
Fig. 2-5 Schematic view of molecular aligned methods. (a) SAM treatment [26]
(b) Solvent self-assembly [33] (c)Electric field [34] (d)Substrate structure [35]
(e)Alignment film [37] (f)Mechanical force [40]
Table 2-1 Comparison of alignment methods for organic semiconductors
Method Advantage Disadvantage
SAM treatment It can change polymer face on to edge on.
Alignment film An easy way to have alignment structure.
Alignment layer will affect the electrical
properties.
Mechanical force
It has the ability to align molecular orientation
For developed microelectronics, have high density, high directivity one dimensional material is very important things. Have good one-dimensional material properties and have effective to control density and direction are often able to demonstrate greater efficiency. Using 1-D nanomaterial with organic
materials also has been showed a good effect of improving. Here are some methods of transfer one dimensional material：
(1) Flow-assisted alignment：Use of air flow of controlling nanowire growth direction, to achieve the effect of nanowires arrangement (see Fig. 2-6a) [41-42].
(2) Deposition by chemical interactions ： Use of surface treatment of one dimensional materials and substrate to get the effective arrangement (see Fig.
2-6b) [43].
(3) Langmuir—Blodgett technique：Pressure-induced isotropic-nematic-smectic phase transitions as well as transformation from monolayer to multilayer 1-D nanomaterial assembly. Then, use a surfactant to an aligned NWs layer on a surface of liquid, from where the NWs layer is transferred to a planar substrate (see Fig. 2-6c) [44-46]
(4) Blown-bubble technique：Use surface tension of bubbles blown to achieve one dimensional material array alignment, and transfer to the substrate (see Fig. 2-6d) [47].
(5) Electric field directed deposition：Use strong electric filed between adjacent electrodes to polarize and align the NWs before deposition on a solid substrate (see Fig. 2-6e) [48-49].
(6) Contact transfer technique：The use of shearing force, tensile strength and other stress-contact methods, the one dimensional material contact printing on a substrate and have a arranged results (see Fig. 2-6f) [50-52].
Fig. 2-6 Assembly methods for 1-D nanostructures (a) Flow-assisted alignment [41] (b) Deposition by chemical interactions [43] (c)Langmuir—Blodgett
technique [45] (d)Blown-bubble technique [47] (e)Electric field directed deposition [49] (f)Contact transfer technique [51]
2.3 Hybrid Inorganic-Organic OTFTs
2.3.1 Introduction of hybrid TFTsConventional OTFTs are benefit from flexible and soluble molecular functionality, and large area process ability at low temperature, compatibility with plastics and cost down. Nevertheless, the inferior mobility and unstable in ambient constrain its applicability. Inorganic TFTs based high carrier mobility and well air stability, but also have some limitations.Itcan’t have high mobility, flexibility, transparency and low-temperature manufacturing on one device.
Unconventional hybrid materials combine many inorganic and organic materials favourable characteristics. It would be have great interest in electrical devices [53].
2.3.2 Material properties of organic semiconductor
One of the most important issues with regard to the development of high-performance polymer OTFTs is the high field-effect mobility. However, in
comparison with organic small molecule field-effect transistors, polymer OTFTs has a field-effect charge mobility lower by 1 to 2 orders of magnitude. Therefore, extensive efforts have been made for the improvement of the mobility in polymer OTFTs. In regioregular poly(3-hexylthiophene) (rr-P3HT) (see Fig.
2-7), the promising candidate for PFET, the mobility can be manipulated through polymer intrinsic properties (degree of regioregularity (RR) and molecular weight (Mn)) [54-56], and by introducing a self-assembled monolayer (SAM) onto the substrate surface [57]. To date, the highest mobility value among the rr-P3HT OTFTs ever documented is about 0.28 cm2V-1 s-1 [58-59].
Fig. 2-7 Poly(3-hexylthiophene-2,5-diyl),P3HT structure [60]
2.3.3 Material properties of inorganic semiconductor
To the best of our knowledge, first Si wire growth was published by Treuting and Arnold in 1957 [61-62]. In the 1960s, Wagner and Ellis demonstrated vapor–liquid–solid (VLS) mechanism of single-crystal growth [63]. In this paper, they claimed their famous vapor–liquid–solid (VLS). For synthesize silicon wire, it’s still a common way [64].
Si wire have good semiconducting properties. A different way to grow Si wire will also affect the characteristics. Relative to the organic semiconductor material Si wire have higher mobility and air stability [65-67].
2.4 Summary
For the OTFT, the active layer is the most important part of the functionality present on the transistor. In the active layer of the semiconductor material of their structure and properties are often decided the merits of the OTFT function. The experiment produced hybrid OTFT that is focused on the active layer carrier transport ability of the upgrade, as well as its air stability improvements.
Chapter 3
Experimental Procedures
_______________________________
3.1 Fabrication Flow of Pristine Thin Film Transistors
The transistor structures employed in this study are semiconductor parameter analyzer with HP4140 quasi-static C-V instrument) was cleaned by acetone and iso-propyl alcohol (IPA). Standard photolithography (Table 3-1) was used to form a positive photoresist contacts on the gate oxide which have the source and drain pattern. Then, we use thermal metal evaporating to deposited source and drain metal layers. Cr is used as an adhesion layer, the electrodes is consisting of Cr/Au (5 nm/50 nm). Acetone was used to a standard lift-off process. It can remove the metal film on the top of the photoresist to form the metal film pattern. Cr/Au was used to be source/drain electrodes, then deposited of the organic semiconductor layer, the substrate were immersed in a solution of octyltrichlorosilane (OTS-8) (97%, Alfa Aesar) or n-octadecyltrichlorosilane (ODTS) (95%, contain 5-10% branched isomers, Alfa Aesar) in toluene (0.05 g mL-1) at 60 °C for 20 min. After subsequent IPA rising, the surface-treated substrate were baked at 60 °C for 60 min. Finally the P3HT
polymer (18 mg mL-1, 98.5% regional regular, 50,000 M.W., Uni Region Bio-Tech) was spin coated on the bottom-gate-bottom-contact transistor structure to form a thin film as the active layer. The coating and annealing process were carried out inside a N2 glovebox (see Fig. 3-1).
Fig. 3-1 Fabrication process of pristine OTFTs Table 3-1 Standard photolithography parameters
Step Process description Parameters
1 Standard clean sonication in acetone and IPA, 5 min , N2 blow dry 2 Dehydration bake 120°C hotplate, 1min, center of hotplate
3 HMDS coating HMDS, 1000 rpm 15s then 3000 rpm 30s 4 HMDS baking 120°C hotplate, 1min, center of hotplate 5 Coating PR AZ5214E, 1000 rpm 15s then 3000 rpm 30s 6 Prebake PR 100°C hotplate, 1min, center of hotplate
7 Mask alignment Align mask with wafer, expose for 80 mJ cm-2, G-line
8 Development
Use AD-10 developer, ~1 min, DI rinse 1min, N
2 blow dry
9 Inspection Inspect for good transfer, exposure quality marks
3.2 Fabrication of Hybrid Thin Film Transistors
Preparation of Nanowires on PDMS film. Intrinsic Si NWs with diameters of ∼10−60 nm and ∼7 μm (see Fig. 3-2) in length were synthesized by chemical vapor deposition (provided by Dr. Ken Ogata, University of Cambridge) [68]. A polydimethyl-siloxane (PDMS) film (∼0.7−1 mm thick, 20 mm in width, 40 mm in length) was formed by casting its prepolymer (Sylgard 184, Dow Corning), mixed with its curing agent at a ratio of 15:1 (w/w). NWs growth substrate contact transfer to 1cm×1cm Si wafer (surface treated with poly-L-lysine to increase the adhesion, Sigma-Aldrich) (yield: 50−60%). The PDMS film was placed on top of the Si wafer substrate, and after applying gentle manual pressure from the top, the film was quickly peeled to transfer the NWs to the PDMS surface (yield: 50−60%). While a single yield is not high, but the transfer can be repeated to increase yield [18].
Fig. 3-2 SEM images of Si NWs. Scale bar : (a) 1μm and (b) 100 nm
Stretched Contact Printing for Assembling Nanowires. The controlled stretched contact printing was carried out using an home-built stretching machine (see Fig. 3-3). First, a PDMS each side fixed with a carrier that can be shifted along the length of a horizontal rail. The carrier can be moved slowly to
stretch the PDMS up to 100% of strain. The PDMS film with a random distribution of NWs was stretched to different distances at a controlled speed.
Then, SiO2 wafer was slowly moved down to transfer Si-NWs from the stretched PDMS film. NWs were transferred to the surface of a rigid Si/SiO2
substrate (SiO2 surface treated with poly-L-lysine to increase the adhesion) by stamping and then peeling back the PDMS at a relatively slow speed, forming a single layer of oriented NWs on the receiving substrate (see Fig. 3-4). Si-NWs in the flashlight irradiation appear blue reflective (see Fig. 3-5) [18].
Fig. 3-3Set-up of the home-built machine for stretched contact printing
Fig. 3-4 Process flow of stretch contact printing
Fig. 3-5 Stretch contact printing operation (a) Transfer NWs on Si chip treated with poly-L-lysine (b)(c) Contact printing of ‘chaotic’ NWs (d) PDMS film with ‘chaotic’ NWs (e) PDMS fixed at stretcher and measure it’s length (f)
SiO2 Wafer fixed upon PDMS (g) Stretch PDMS for 100% of strain, then contact printing of NWs (h)Parallel aligned NWs on SiO2 wafer
Hybrid Si-P3HT transistors fabrication. For hybrid TFTs, the Cr/Au (5 nm thick Cr, 50 nm thick Au) contacts were defined by conventional UV photolithography on the Si/SiO2 substrates (200 nm thick SiO2, Cox = 15 nF cm−2). with stretching-assembled Si NWs. Prior to self-assembled monolayer (SAM) surface treatment, the Si NW samples were dipped in a dilute HF (1:40) solution to remove their native oxide shells. An organic semiconductor poly(3-hexylthiophene-2,5-diyl), P3HT was spun-coat (at 500 rpm for 10 s and then 1200 rpm for 60 s) in a 1,2-dichlorobenzene solution (18 mg mL−1) onto those substrates covered with Si NWs and Cr/Au electrodes. The coating process was carried out inside a N2 glovebox. Pristine P3HT devices were also fabricated in the same manner without the stretched contact printing process.
The devices were annealed at 160 °C in N2 for 30 min (see Fig. 3-6) [18].
Fig. 3-6 Fabrication process of hybrid NW-P3HT TFTs
3.3 Electrical Measurement Methods
The devices electrical properties were measured by Agilent 4155C I-V analyzer in a light-isolated probe station at room temperature. In IDS-VGS
measurement, the typical drain-to-source bias was swept from VGS = -40 V to VGS = 20 V. In IDS-VDS measurement, the typical drain-to-source bias was swept from VDS = 0 V to VDS = -40 V.
In this section, it describe the methods of typical parameters extraction such as threshold voltage (VT), subthreshold swing (SS), ON/OFF current ratio (ION/IOFF) and field effect mobility (μFE) from device characteristics.
3.3.1 Determination of the VT
Threshold voltage (VT) was defined from the gate to source voltage at which carrier conduction happens in OTFT channel. VT is related to the gate insulator thickness and the flat band voltage. Plenty of methods are available to determine VT which is one of the most important parameters of semiconductor devices. In this thesis, IDS take the square root of the number, and take a linear approximation way to get VT (see Fig 3-7).
Fig. 3-7 Parameter extraction method in the thesis
3.3.2 Determination of the Subthreshold Swing
Subthreshold swing (S.S., V decade-1) is a typical parameter to describe the control ability of gate toward channel which is the speed of turning the device on and off. In this study, S.S. was defined as the gate voltage required to decrease the threshold current by two orders of magnitude (from 10-10A to 10-8A). The threshold current was specified to be the drain current when the gate voltage is equal to VT.
3.3.3 Determination of the field effect mobility
Typically, by IDS-VGS curve, we calculated with the formula 3-1 which can be obtained field-effect mobility (μFE) and threshold voltage (VT) at high negative drain bias (VDS = -40 V), VSD ≥ (VSG–VT). The OTFT transfer I-V characteristics can be expressed in saturation region as
ISD = µFECOX W
2 (VSG-VT)2...……….………...………… (3-1) Where
COX is the gate oxide capacitance per unit area, W is channel width, L is channel length, VT is the threshold voltage.
Square root of the formula 3-1 can be obtained, and the conversion formula 3-1 as formula 3-2.
The transconductance is defined as the drain current can be approximated in linear region as
ISD = µFECOX
W[(VSG-VT)VSD -
2VSD2
]……….………..…….(3-6) 3.3.4 Determination of ON/OFF Current Ratio
ON/OFF current ratio is another important factor of OTFTs. High ON/OFF current ratio represents not only the large turn-on current but also the small off
ON/OFF current ratio is another important factor of OTFTs. High ON/OFF current ratio represents not only the large turn-on current but also the small off