1.1. Motivation
Semiconductor companies must maintain high-level customer service to gain their competitive edge. Facing the environment with volatile demand, how to deliver order on time justifies the efficiency of the production planning and scheduling in semiconductor manufacturing. Meanwhile, increasing throughput and minimizing setup times are among other managerial and strategic goals. Finding practical scheduling methods that effectively include these sometimes conflicting objectives is a great challenge.
Integrated circuit (IC) is the major product of semiconductor industry. Its process is very complicated and can be divided into four basic manufacturing steps: wafer fabrication, wafer probe, IC assembly, and final test. The four stages of the IC manufacturing are shown in Figure 1-1 [59], [81]. Wafer fabrication and wafer probe are referred as the “front-end”, while IC assembly and final testing are referred as the
“back-end”. In the front-end, silicon wafer are chemically processed, and then tested to generate a supply of electronic devices. In the back-end, the wafers are sawed into ICs, and the IC are packaged, branded, and tested.
Figure 1-1. The four stages of the IC manufacturing.
Due to different product profit rates and the varied importance level of customers, there often exists more than one priority level of orders in most semiconductor
companies. The multiple-priority job constraint should be included when developing the scheduling methods. On the other hand, the more sophisticated devices being developed are leading to more complex assembly machinery, which is increasing the capital intensity of the IC assembly operations [73]. In order to increase a company’s competition edge and profitability, an Integrated-Circuit (IC) manufacturer needs to utilize its existed capacity efficiently and effectively. Therefore, developing efficient scheduling methods simultaneously considering multiple-processing priorities and minimizing the total bottleneck workload is essential.
For the IC assembly scheduling problem (ICASP) investigated in this paper, the jobs are assigned processing priorities and are clustered by their product families with each family containing several product types, which must be processed on a group of identical parallel machines. Further, the job processing time may vary, depending on the product type (job cluster) of the job process on. Setup times for two consecutive jobs of different product types (job clusters) on the same machine are sequence dependent. Since the IC assembly scheduling problem involves constraints on multiple job priorities, job cluster, job-cluster dependent processing time, machine capacity, and sequentially dependent setup times, it is more difficult to solve than the classical parallel-machine scheduling problem.
Wafer fabrication determines to a large extend the production plan of the whole semiconductor manufacturing due to its high complexity and long manufacturing process time. In order to quickly respond to customers’ fluctuating demand, companies make changes on the product mix periodically. Because of the complexity of the wafer fabrication process, the due-date assignment problem in semiconductor companies is more difficult to solve compared to other manufacturing industries. Since the accuracy of due-date assignment for wafer fabrication strongly influences the efficiency of the
scheduling of downstream operations, a due-date assignment model for wafer fabrication would be required.
1.2. Research Scope and Objectives
Semiconductor companies can be successful if they only focus on either of the two types: mass manufacturing with high volume and low cost, or high level of product mix that is flexible [81]. High-volume, low-cost fabs produce a few kinds of products, such as memory products, in large quantity in order to have economies of scale; while high-mix flexible fabs mainly produce Application-Specific Integrated Circuit (ASIC) and aim to leverage economies of scope. Hence, the manufacturing strategies and performance measurements of these two types would be significantly different.
This dissertation focuses on the scheduling problems for the manufacturers mainly producing memory products. The purpose of this dissertation is to develop methods for solving two problems that are crucial for efficient scheduling in IC assembly scheduling problem. The objectives of this dissertation include the following:
1. Due-date assignment for the wafer fabrication.
To present a due date assignment model consistent with the target on-time-delivery rate for the environment where product mix changes periodically.
2. Scheduling model for the IC assembly operations.
To design a scheduling model for ICASP with minimizing the total machine workload to simultaneously assign job to machines and to determine the processing sequence on each machine with considerations of the multiple job-priority constraint, and the processing time and the setup time in the capacity constraints.
1.3. Organization of the Dissertation
This dissertation includes five chapters that cover the conceptual bases of the study, due-date assignment for wafer fabrication, scheduling of IC assembly operations, and the conclusions. This dissertation is organized as follows.
Chapter 1 provides the background of the research, defines the research domain, problem, and objectives.
Chapter 2 reviews past research work done in the areas related to the study of due-date assignment for wafer fabrication and IC assembly scheduling problems.
Chapter 3 considers the due-date assignment for wafer fabrication and presents a due-date assignment model to set manufacturing due date satisfying the target on-time-delivery rate. Cycle times are first analyzed for each product type under single product mix. A due-date assignment model for periodical product mix changes is then presented by taking the merit of contamination model.
Chapter 4 considers the IC assembly scheduling problem. We first describe the IC assembly process in detail, and capture the characteristics of the ICASP. An integer programming formulation is then proposed to solve the ICASP with minimizing the total machine workload to simultaneously assign jobs to machines and sequence the jobs on each machine. An efficient heuristic is also proposed to obtain the near-optimal solution for large scale problems.
Chapter 5 gives a summary of this research. Conclusions will be drawn based on the results of the research.