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Introduction

1.1 Research Motives

In the current electronic, optoelectronic, communications, and other products, require high-power, high-calorie, high-planned, high memory capacity, high stability, in addition to the performance requirements of thin short, which IC packaging industry will derive various Packaging technology, With the rapid IC process Micro, the functions of IC lead to increased proliferation of IC-pin IC frequency and the enhancement of the electric transmission and cooling capacity requirements accordingly upgrade, this evolution can be achieved demand makes the "flip chip packaging technology" should be transported packaging industry to become a star. The information appliance (IA) the rise, the demand for portable electronic products surged, also causing meet the light, thin, short, small properties "chip size package (CSP; Chip Scale Package)" has become the trend. [1]

Flip Chip Packaging currently the most widely used metal bump of the bump and tin-lead bump, the bump 95% used in the LCD driver IC packaging, and the remaining 5 percent is used in the Smart Card products;

tin Lead bump the scope of the application of a wide pan, a few feet from high to low number of IC both feet use, it could meet the high electric, high heat, high reliability and light, thin, short, small, and other functions, application of the products include computer products (eg, personal computers, handheld computers), communications products (eg, portable

phones, Internet products, launchers, base station), the automobile industry (eg, engine control devices, airbag control , ABS braking systems) and consumer products (eg, mobile video recorders, digital cameras, watches, flat panel display and IC card).

However, in flip chip bonding process, the substrate and wafer bonding force control is a big key, because the thin-chip bonding process resulted in the control of forces must be very careful, otherwise it will be very easy to chip cracking the information currently found, the bonding strength of the control agencies and actuators are pneumatic cylinder and hydraulic cylinder for the majority, as shown in Figure 1.1 and Figure 1.2, but due to pressure effects lead stick slip bonding strength of the control is very difficult, therefore This paper to design a two stage positioning and control system to control the strength bonding strength, improve chip yields.

1.2 Development of Flip Chip

Flip chip bonding for IBM was first developed in the 1960s. Its technology is in the grain of the metal pad solder bump formation, and formation in the base version of the solder bump and the relative grain of contact should be, and then the grain will be overturned at the base version will be on the tap all point junction. Flip Chip bonding with the shortest connection length, the best electrical characteristics, the maximum output/income tap density, and can reduce IC size and increase unit wafer production capacity.

Flip chip technology, also called "inverted crystal Packaging," or

"inverted crystal Packaging Law" is a chip packaging technology. As

shown in Figure 1.3 This packaging technology is different from the last major chip package, the chip will be used to be placed on board (chip pad), and then a line technologies (wire bounding) will be on the chip and substrate link connecting point, and flip chip packaging technology is to connect point-bump, and then flip chip from the bump and substrate and gain a direct link.

Now flip chip technology has been widely used in microprocessor packaging, but also become graphics, special applications, and computer chip group, and other mainstream packaging technology, the market for flip chip technology with the thrust, Packaging industry must provide 8-inch and 12-inch wafer probe testing, bump growth, assembly, final test to the integrity of services.

The future of electronic products continued towards thin short, high-speed, high-pin number, and other features to the wire based on the traditional-style packaging will gradually NA, will be limited to the application of low/low-priced products. According to the investigation report IC Insights, logic IC products because of the increasingly complex functional requirements, the demand for pin-count packages, generally show an annual 12 percent to 13 percent increase rate. ASICs to high-end products as an example, in 2002 the highest pin-count requirements for 2100 feet, and is expected to 2007, the largest pin count will be as high as 3500 feet. The flip chip package in the coming trend, it was still will be moving a few feet high (I /O), fine pitch goal. In addition, the next addition to the demand for flip chip packaging equipment will continue to expand, flip chip testing equipment required for the development is also the focus

bump-guided path, distribution of the entire chip, the chip center located in the vicinity of bump quality testing, also depends on the automatic detection equipment to ensure that bump quality, and as Flip Chip closure the tall installed several characteristics of single-chip probe up to 1000 pin over several of the vertical probe cards, will become test equipment manufacturers to compete for the potential of the market.

Flip Chip IC technology with the following main advantages:

1. Space more efficient: the chip will be installed directly in the substrate can reduce the cost of space, both planar and thickness, Flip Chip can save a great deal of room. To replace the QFP IC Flip Chip, Chip area can be 900 mm2 to 100 mm2. More IO Contact: Flip Chip IC at the bottom of the entire chip for input / output connections, as can be installed at the bottom of the tap-tap than the more peripheral installation, Flip Chip IC can have more I / O contact.

2. Lines and wire bonding without: Flip Chip IC chip will be installed directly in the substrate, the line can be avoided and wire bonding.

3. Flip Chip IC materials can be saved and more than QFP TAB IC.

4. Heat consumption of the smaller and better heat dissipation (because of shorter circuit), and can be installed in the back of the chip heat sinks, thermal conductivity closure glue or heat.

5. As Flip Chip IC welding points smaller, so its conductivity than QFP with the TAB IC better. And Flip Chip IC to the shorter the distance between the substrate and chip directly, so its resistance and inductance extremely low. The signal response speed of the high-frequency components become faster and help greatly on operation in such as telecommunications equipment.

6. Flip Chip access is not legitimate to use fuse, there is no larger wire-bond in the junction of stress. Flip Chip is due to the use of direct welding, increased bonding strength.

7. Flip Chip for procedures than other patch technology faster, but can enhance joint reliability and cost savings.

1.3 Research Orientation

In this thesis, five of its chapter summarized as follows: The chapter 1 on flip chip technology for the development and application, then illustrate flip chip positioning system and force control system and the motives and objectives. Chapter 2 is mainly in the force control and positioning mechanism system to consider the design elements of movement and path planning. System design further detail parts and analysis and integration.

Chapter 3 will introduce the principle of force control. And introduce the Ampere’s law, magnetic circuit, force of electromagnet, magnetic reluctance. We will illustrate the model of force control mechanism, and control structure. Chapter 4 we will introduce the specifications and characteristics of DC servomotor, load cell and USB interface DAQ card.

In chapter 5 we have a conclusion on our mechanism and experiment result.

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