In this section, the post-routing redundant via insertion problem is formulated as a graph match-ing problem. Firstly, we give the definitions of several related graphs. Then, the graph matchmatch-ing problem which we call it the “MBC graph matching problem” is defined.
Definition 1 (Via-candidate bipartite graph) A via-candidate bipartite graph Gv = (V ∪ R, Ev) is an undirected bipartite graph whose vertices are composed of two independent sets V and R. V is the set of single vias in the circuit, and it is named to be a single via set. R is the set whose vertices are the redundant via candidates of single vias, and it is called as a redundant via candidate set. Evis the edge set. For each v ∈ V and r ∈ R, there exists an edge e(v, r) ∈ Evif
r is a redundant via candidate of v.
Definition 2 (Candidate relative graph) A candidate relative graph Gc = (R, Ec) is an undi-rected conflict graph whose vertex set is the redundant via candidate set R. For each r1 ∈ R and r2 ∈ R, there exists an edge e(r1, r2) ∈ Ecif the design rule will be violated for simultaneously
RR2
Fig. 3.3: Two feasible cases without violating the design rule.
choosing r1 and r2. Moreover, if r1 and r2 originate from the same single via, there wouldn’t
exist an edge e(r1, r2) to connect r1 and r2.
Remark of Definition 2: The Ec wouldn’t contain an edge e(r1, r2) to connect r1 and r2 if they belong to the same net and wouldn’t violate any design rule for simultaneously choosing them. Two examples are shown in Fig. 3.3. Both RL1 and RR2 in Fig. 3.3(a) can simultane-ously exist, and both RR1 and RR2 in Fig. 3.3(b) can simultanesimultane-ously exist because they do not violate any design rule.
Definition 3 (Mixed bipartite-conflict graph/MBC graph) A mixed bipartite-conflict graph G = (V ∪ R, Ev∪ Ec) is a union of Gv = (V ∪ R, Ev) and Gc = (R, Ec). Here, the vertex set of G is equal to V ∪ R, and the edge set of G is equal to Ev∪ Ec.
Fig. 3.4 gives an example to illustrate the above graphs. Fig. 3.4(a) shows a portion of routed circuit which has three single vias and seven redundant via candidates, and it shows the conflicts of their redundant via candidates. Fig. 3.4(b) illustrates the corresponding via-candidate bipartite graph of this routed circuit. The edge set Ev is composed of all edges in
Fig. 3.4(b). Fig. 3.4(c) is the corresponding candidate relative graph of this routed circuit. The edge set Ec consists of all edges in Fig. 3.4(c). Finally, Fig. 3.4(d) is the MBC graph of this routed circuit by combining Fig. 3.4(b) and Fig. 3.4(c). The edge set E of MBC graph shown in Fig. 3.4(d) is the union of Ev and Ec.
One difference between the MBC graph and the bipartite graph in [14] is that the vertex set of MBC graph is constructed by all single vias and their redundant via candidates in all layers. The graph can represent the conflicts of redundant via candidates methodically and perform the matching effectively. Moreover, the bipartite graph formulated in [14] merges the redundant via candidate vertices if they are in conflict, treats each stack via as a unit, and the single vias which form a stack structure can only have redundant vias inserted on the same side simultaneously [18]. On the contrary, in the MBC graph, an edge is added to connect two redundant via candidate vertices if there is a conflict between them, and each single via is treated as a unit no matter it is stacked or not. For example, Fig. 3.5(a) consists two different nets with a single via (V 3) and a stack via which consists of two single vias (V 1 and V 2). Fig. 3.5(b) shows the feasible redundant via candidates of these three single vias, where a vertical conflict exists between RR1 and RL3, and a horizontal conflict exists between RR2 and RL3. The RR1 and RR2 do not exist conflict because they belong to the same net and from different metal layers.
Fig. 3.5(c) shows the feasible redundant via candidates of bipartite graph formulation in [14], where RR1 and RL2 are merged to one candidate because V 1 and V 2 are stacked. Note that some available redundant via candidates are missed such as RB1 and RL2. Fig. 3.5(e) gives the bipartie graph of Fig. 3.5(c), where vertex RR1 and vertex RR2 are merged into one vertex RR12, and vertices RR12 and RL3 are also merged into a vertex R because they are in conflict.
Fig. 3.5(d) gives the MBC graph of Fig. 3.5(b). Instead of merging the conflict vertices RR1 and RL3, and RR2 and RL3, we add an edge between RR1 and RL3, and an edge between RR2 and RL3.
The post-routing redundant via insertion problem can be reformulated as a mixed bipartite-conflict graph matching problem which is described below.
Mixed bipartite-conflict (MBC) graph matching problem: Given a MBC graph G = (V ∪ R, Ev∪ Ec), the problem is to find a matching M of the given MBC graph. Here, M is a set of
Fig. 3.4: An example of mixed bipartite-conflict graph. (a) A portion of routed circuit. (b) The via-candidate bipartite graph. (c) The candidate relative graph. (d) The mixed bipartite-conflict graph.
Single via
Fig. 3.5: Illustration of the difference between the mixed bipartite-conflict graph and the bipar-tite graph
pairwise non-adjacent edges, and the endpoints of each edge consist of one in V and the other in R. Furthermore, for two arbitrary endpoints r1 ∈ R and r2 ∈ R, it is not allowed to exist an
edge between them in Ec.
3.4 Redundant Via Insertion Method with Wire Pushing Ca-pability (RVI
fA-WP)
The executing flow of the proposed RVIfA-WP method is summarized in Fig. 3.6. Although simultaneously dealing with alive vias and dead vias can achieve a better insertion rate to all single vias, the RVIfA-WP method inserts the redundant vias of alive vias firstly and then insert the redundant vias of dead vias for not altering the original routed design too much. Given a cell library with the design rules (such as Library Exchange Format file–LEF) and a post routed circuit design (such as Design Exchange Format file–DEF), firstly, a MBC graph is built for those alive vias, and the edge weight assignment procedure is performed for this MBC graph.