CHAPTER 1 Introduction
1.2 Organization of This Thesis…
This thesis is organized as follows. Chapter 2 introduces the principles and process of power amplifier’s design. Meanwhile, the simulated and experimental results are appeared. Chapter 3 describes a novel bi-directional amplifier with gain control utilizing two reflection-type amplifiers. In this chapter, the designed theories and considerations are explained. The layout and simulated results are also illustrated to prove the feasibility. The conclusions are made in Chapter 4.
CHAPTER 2
Design and Analysis of a Ka-Band Power Amplifier
The RF front-end of an automotive radar operates in millimeter-wave frequencies and uses either FMCW or pulse radar principles. The forward looking automotive radar in the 76-77GHz range is one of the most promising commercial applications at W-band frequency. The majority of these modules are manufactured using hybrid assemblies of Gunn, Schottky and PIN diode circuits. Nevertheless, a major step forward is the utilization of GaAs MMIC technology which results in d reduction of assembly, test, and finally lower module costs. In addition, the use of gallium arsenide (GaAs) based dual-gate PHEMTs will lead to higher circuit performance.
2.1 Semiconductor pHEMT
The high electron mobility transistor, or HEMT, is a field-effect transistor having current carrier densely confined in a thin sheet of order 100Å thickness. The HEMT consists of epitaxial grown layers of compound semiconductors which have different bandgap energy, so the interface between them constitutes a heterojunction. For application to MMICs, the most attractive feature of the HEMT is its low noise. At millimeter frequency particularly, the HEMT promises a lower noise figure than gain.
Furthermore, the HEMT also provides the better power performance due to its characteristic of high breakdown voltage.
The Fig.2.1 shows the schematic cross section of pHEMT. A planar-doped AlGaAs layer for electron supply from the bottom of the channel, an InGaAs channel, a Si planar-doped AlGaAs layer for electron supply from the top and gate isolation,
using 0.15um AlGaAs/InGaAs/GaAs pseudomorpic T-gate power HEMT MMIC technology on a 100um GaAs substrate. The pHEMT possesses a gate-to-drain breakdown voltage of 10v typically, parameter fT of 85GHz, and fmax of 160GHz.
2.2 Basic Theories and Design Methodology 2.2.1 Crucial Parameters
Efficiency
Efficiency is a critical parameter for RF power amplifiers. It is important when the available input power is limited, such as in battery-powered mobile equipment. Efficiency is output power versus input power level in rough.The most common definitions are presented below by the different meanings of input power and output power. From a practical standpoint, a designer’s goal is to minimize the total dc power required to obtain a certain RF output power level.
Therefore, the overall efficiency is defined as
Power-added efficiency is an alternative definition that includes the effect of the drive power used frequently at microwave frequencies and is defined as
Intermodulation
The harmonic distortion is often used to describe nonlinearities of analog circuits. Common used is the intermodulation distortion in a two-tone test.When two signals with different frequencies are applied to a nonlinear system, the output in general exhibits some components that are not harmonics of the input frequencies. Of particular interest are the third-order IM products at 2W1-W2 and
2W2-W1 when two signals’ frequencies are W1 and W2 because they appear in the vicinity of W1 and W2, as shown in Fig.2.2. The corruption of signals due to third-order intermodulation of two nearby interferer is so critical that a performance parameter “third intercept point“(IP3) has been defined to characterize the behavior.
As shown in Fig.2.3, the horizontal coordinate of this point is called the input IP3 (IIP3), and the vertical coordinate is called the output IP3 (OIP3). The value of IIP3 and OIP3 can be obtained by the formulas below.
Pout
Intermodulation is a troublesome effect in RF systems. The IIP3 and OIP3 can be utilized to characterize the linearity of nonlinear circuits.
Gain Compression
The small-signal gain of a circuit is usually obtained with the assumption that harmonics are negligible. However, as the signal amplitude increases, the gain begins to degrade. In fact, nonlinearity can be viewed as variation of the small-signal gain with the input level. In RF circuits, this effect is quantified by the “1-dB compression point”, defined as the input signal level that causes the gain to drop by 1dB.Adjacent Channel Leakage Power Ratio (ACPR)
This analysis assumes two separate carriers with fixed spacing. Such a signal is the result of the AM of a signal carrier, as shown in Fig.2.4. The two-carrier signal would be the spectrum from a double side-band suppressed carrier AM system with a single, fixed frequency modulating tone. The key point to note is that the IM bands stretch out to three times the original modulation band limits in the case of the third-order distortionproducts, and five times these limits for fifth order, as shown in Fig.2.5. Therefore, the spectrum resulting from nonlinear amplification has a stepped appearance, with each step corresponding to a higher order of distortion. These steps recently have
become known as growth sidebands, or the adjacent channel power (ACPR).
2.2.2 Class A Amplifier
Several types of RF power amplifiers will be discussed, most often called Class A, AB, B and C. The portion of the RF cycle the device spends in its active region is the conduction angle and is denoted by 2θc. Based in the conduction angle, the amplifiers are categorized as
z Class A amplifiers, if 2θc =360 degree. The active device is in its active region during the entire RF cycle.
z Class AB amplifiers, if 180°< 2θc < 360°
z Class B amplifiers, if 2θc=180 degree z Class C amplifiers if 2θc<180 degree
The numerous classic modes of operation discussed above are shown in Fig.2.6. The investigation below will focus on these operated types in detail.
The equations of the DC component is
−
∫
and the magnitude of the output nth harmonic is
−
∫
The parameter α is the conduction angle. If a sine-wave signal of amplitude Vdc is
assumed as the RF output voltage at the transistor. Therefore, the RF fundamental
where I1 is the output 1st fundamental harmonic and the dc supply is given by
Idc Vdc
Pdc = ∗ (2.8)
The DC power dissipation neglects the current of gate end due to the current Igs is slight extremely.
For Class A operation, the Idc current must be selected to keep the transistor in its active region during the entire RF cycle, thus assuring a 360 degree conduction angle(α =2π). The operation of class A is illustrated in Fig.2.7. The input RF signal enters the device from the gate end. The drain current turns on across 0 to 2π resulting from the selection of biasing point. Utilizing the formulas of (2.5) to (2.8) and the relation ofα =2π to calculate the DC power dissipation Pdc and the output power Po, the efficiency of PAE could be obtained in accordance with the equation of (2.2). The operation of class A mode owns approximately 50% output PAE efficiency if the gain is high sufficiently. And the circuit possesses the higher linearity than the other types, but power dissipation is the largest drawback for this category of these circuits.
2.2.3 Class B and AB Amplifier
The power amplifier adopted class B or AB modes is a classic compromise, offering higher efficiency and cooler heat sinks than the linear and well-behaved class A mode, but incurring some increased nonlinear effects which can be tolerated. The
active device is biased to a quiescent point which is somewhere in the region between the cutoff point and the class A bias point. The Fig.2.8 shows an idealized RF device, having a linear transconductive region terminated by a defined cutoff point. Based on this figure of ID versus VGS, the biased points of class B and AB mode could be determined. Assumed that the turn-on voltage is Vt, the gate voltage of the class B mode is selected at this point Vt. But the biased point must be above Vt if the class AB mode is opted. The operation of class B and AB mode are illustrated in Fig.2.9 and Fig.2.10. The output signal without the output matching circuit is like the half-wave rectified waveform, indicated by the equation below.
∑
∞This kind of waveform will produce the larger even harmonic terms, eliminated by means of the output matching circuit. Utilizing the formulas of calculating the PAE efficiency again, the class B mode possesses the 78.5% efficiency ideally, and the PAE efficiency of the class AB is between 50% and 78.5%.
2.2.4 Gain Match and Power Match
In general, amplifiers are realized by conjugate match in order to derive the
maximum output gain. The amplifier matched at complex conjugate is referred to gain match condition. But the output power match is necessary because power amplifiers must be devised to drive large power level. The Fig.2.11 illustrates the compression characteristics of common circuits for conjugate match and power match.
The figure shows that the response for an amplifier having output power match owns lower gain at much lower drive levels. Nevertheless, amplifiers with power match could drive larger power level than that with conjugated match. It is important to note that no matter which criterion is utilized for RF power, the power match gives about 2dB improvement. Using the load pull measurement is the most efficient approach. By drawing the constant power contours, it is convenient to design the output power matching circuit. The discussion below will describe this measured system in detail.
2.2.5 Load Line Theory
The simple loadline principles could be extended to predict load-pull contours for a device kept in its linear range. The predicted output power level utilizing this method is close to the measured optimal output power Popt. The start for this analysis of an RF PA is a heavily idealized device, shown in Fig.2.12. This ideal nonlinear transconductive device is represented in the figure as a voltage-controlled current source with zero output conductances and zero knee voltage. The analysis is valid up to the start of gain compression because the device is never allowed to breach the limits of linear operation. The loadline resistor is determined by drawing a straight line which connects the overdrive voltage Vov to the breakdown voltage VDSmax, as shown in Fig.2.12. The load-line resistor in the optimal power-matched condition has a value of
m
The optimum output power Popt is obtained for a load impedance with real part equal to Ropt. Using a simplified load-line theory, two cases have to be considered.
(1) Zl ≤Ropt when output power is current limited A load resistance < Ropt lead to current-limited compression as evidenced by the forward gate current IGS resulting from the gate end turn on. A load resistance >
Ropt lead to voltage-limited compression as evidenced by the drain-gate breakdown current IGD. The maximum output power occurs when IGS = IGD.
2.2.6 Load Pull Theory
The output power level is the most significant parameter for the design of power amplifiers. Power amplifiers are large-signal devices which output power is related to the output reflection parameter ΓL generally. It is difficult to draw the constant output power contours in the ΓL plane because they are all ellipses. In common, the load pull measurement is the most efficient approach to obtain the constant power contour, shown as the Fig.2.13. The output matching circuit could be determined according to the large-signal information of the transistor obtained by the load pull measurement. Then, assumed that the input match influences the output power slightly, the Gp circuit can be utilized to predict the overall gain. The formula of the Gp is
( ) ( ) 11 2 2 2
Observing the place of output optimal power point, the complex conjugate match is employed in the input port according to the Gp circle discussed above. The overall gain can be obtained.
The typical load-pull configuration is shown in the Fig.2.14. The load pull is a method to measure the device terminal impedance under a particular operating condition. The device is tuned with removable passive tuner until the required performance is obtained. Then, the tuner is removed and the impedance to the tuner is then measured by the network analyzer. The procedure is repeated at each frequency and power of interest. The coupled forward power P1 is measured at the fixed frequency and power level. Next, the input impedance tuner T1 is adjusted in order to receive the optimum return loss P2. Finally, the output impedance tuner T2 must be modified for the desired power performance P3. The input and output reflection coefficients are determined by a network analyzer. Therefore, power amplifiers can be realized readily base according to the information of load pull.
2.3 Ka-Band Power Amplifier 2.3.1 Selection of the Elements
The schematic of transmitted circuits applied in automotive collision avoidance radar systems connects commonly a buffer amplifier after the 38GHz oscillator in
order to boost the signal amplitude. This chip is designed to replace the buffer amplifier and remove the 77GHz power amplifier from the 77GHz output port by supporting the sufficient output power. In order to acquire the linearity and adequate efficiency of the system, the architecture with two stages is adopted to devise this power amplifier. The first stage utilizes class-A type to supply sufficient power gain.
The second stage improves the RF-to-DC signal ratio by class-AB mode. The 0.15um GaInAs pHEMT transistor with gate width 300um is picked at the first stage.
And the transistor with gate width 600um is utilized at the power stage to drive plentiful output power. The operating points of the two stages are shown in Fig.2.15.
2.3.2 Calculating Load Line Resistance from IV Curve
In order to estimate roughly the load line resistance, the characteristics of output conductance and variable overdrive voltages are ignored. According to the features of I-V curve shown in the Fig.2.15, the optimal load line resistance and the maximum output power are calculated in accordance with the Eq. (2.10). Assumed that Imax is equal to 300mA and Vmax is 4V, Ropt and Pmax are computed in Eq. (2.16) and (2.17).
Utilizing the software of load pull measurement, the constant power contours and the constant efficiency contours are drawn as shown in Fig.2.16. The optimal output power level has to compromise with the demanded efficiency. Therefore, the adequate output matching point is selected referred to the proposed specifications.
2.3.3 Overall Schematic and Layout Considerations
The whole schematic of this 38GHz power amplifier is depicted in the Fig.2.17.
The circuit is divided into five sections; they are the input matching circuit, the drive stage, the interface matching circuit, the power stage and the output matching circuit.
Firstly, the biasing points of the two stages are selected in order to acquire the desired characteristics. Utilizing the software of load pull measurement, the output matching circuit could be determined by making trade-off between the output power level and the power-added-efficiency. Referred to the output optimal point of the drive stage and the input optimal point of the power stage, the best interface matching point is chosen to balance the mismatch. The input matching circuit is realized easily by conjugate match because it is assumed to influence the output power level slightly.
The layout of this power amplifier is shown in the Fig.2.18. The thin transmission lines are applied in this circuit as bias lines because a thin line is equivalent to an inductance compared to a thick one. Therefore, RF chock inductances could be neglected when the thin transmission lines are utilized.
Simultaneously, a resistor is placed at gate ends in order to prevent from the low-frequency oscillation. And a bypass capacitance is put at drain ports so as to cut off DC leakage completely. In order to think over the EM characteristics of the passive circuits, the EM software of HFSS and Sonnet is adopted to simulate the interference of passive devices each other. The length of transmission lines and the gap in two lines are modified to eliminate the interference. And the active devices at the power stage are arranged in parallel so as to solve the problem of overheating.
The Fig.2.19 shows the photograph of this power amplifier, marked out the input port RF_IN, the output port RF_OUT, and biasing points Vgs and Vds.
2.3.4 Simulations
The fig.2.20 shows that the PAE and Pout alter versus input power Pin. The output power is 19.4dBm and the PAE is 27.4% at the 1dB compression point. The maximum output power level is 20.5dBm at Pin=10dBm. The maximum value of PAE is 35.9% at the maximum output power point due to the equation of PAE=Pout/Pdc * (1-1/Gain) shown in Eq. (2.2). The Fig.2.21 depicts that the Pout and Gain vary versus input power Pin. The constant power gain is maintained at 16.5dB when the input power is smaller than 2dBm. The Fig.2.22 describes that the PAE and Pout vary versus frequency. Observed this diagram, the bandwidth of this circuit can be determined by the testing input power Pin=0dBm. It is about 1GHz.
The Fig.2.23 shows that the fundamental and third-harmonic components vary versus input power Pin in order to examine the IIP3 and OIP3 points. The IIP3 point is about 20dBm and the OIP3 is 40dBm nearly. The result is appropriate for this design. The overall specifications are shown in the Table.2.1.
2.3.5 Measurements
The measurement of this power amplifier utilizes the on-wafer test in order to eliminate the parasitic inductances resulting from bonding wires at the RF input and output ports. The power lines are connected by gold bonding wires to supply the DC voltages. Firstly, the VNA HP8510C is adopted to determine the central frequency.
Then, the source generator Agilent 83640B creates the signals of different power levels at this frequency to estimate the performance of this power amplifier. At Vds1=2.15V、Vgs1=-0.45V and Vds2=2.65V、Vgs1=-0.6V, the total drain current is 117mA. The measured maximum small-signal gain is 13.4dB at the central frequency of 32.4GHz, shown in Fig.2.24. The Fig.2.25 shows the experimental result of Pout and Gain versus input power Pin. And the experimental result of PAE versus input power Pin is depicted in Fig.2.26. The maximum power-driving ability
is 15dBm. And the largest PAE value is 23%. The experimental results are not the same as the simulated performances completely. Discussed the reasons, the S-parameter of the WIN 0.15um power device at designed frequency and biasing voltage must be confirmed by test-key devices. And the parasitic capacitances of the RF pads have to deliberate whether it’s appropriate for the designed circuit or not.
They are critical parameters to influence the performance crucially.
Fig.2.1 The schematic cross section of PHEMT
Fig.2.2 The third-order IM products resulted from the nonlinearity
Fig.2.3 Third intercept point (IP3) has been defined to characterize the linearity
Fig.2.4 Two separate carriers with fixed spacing such as the AM of a signal carrier
Fig.2.5 The composition of the adjacent channel leakage power is illustrated
Fig.2.6 The numerous classic modes of operation are discussed
Fig.2.7 The operation of class A mode
Fig.2.8 An idealized RF device, having a linear transconductive region
Fig.2.9 The operation of class B mode
Fig.2.10 The operation of class AB mode
Fig.2.11 The comparison of power-driving ability between the conjugate match
Fig.2.11 The comparison of power-driving ability between the conjugate match