Organization of The Thesis

There are six parts in this thesis. Chapter 1 is the introduction. We describe the motivation and organization of this thesis. In Chapter 2, we show the fabrication and equipment setup used in experiments. In Chapter 3, we will discuss the current models and switching mechanism on the basis of experimental data. In Chapter 4, the transient behavior of RRAM is discussed and for the first time, we propose two models to quantitatively describe RRAM switching time. In Chapter 5, RRAM memristive characteristic is fully examined. Compared with original theory, we will discuss the limitations and possibilities of RRAM as a memristor. Finally, the summary and conclusions are given in Chapter 6.

Chapter 2

Device Fabrication, Equipment Setup and Measurement Methods

2.1 Device Fabrication

The structure of RRAM was the TiN / TiOx / HfOx / TiN stack, which was deposited on the Ti / SiO2 / Si substrate. The HfO₂ thin film was deposited by atomic layer deposition (ALD), while all the other thin films were deposited by sputtering methods. Owing to the well known ability of Ti to absorb oxygen atom [2.1], oxygen atoms diffuse from the HfO₂ layer to the Ti, which resulting in the formation of HfOx (x~1.4) with a large amount of oxygen deficiency and the oxidation of Ti. The corresponding XTEM image made by the XPS examination is presented in Fig. 2.1 [2.2].

2.2 Equipment Setup

The whole experimental setup for the I-V and pulse characteristics measurement of RRAM is illustrated in Fig. 2.2. Based on the PC controlled instrument environment by HP-IB (GP-IB, IEEE-488 Standard) interface, the complicated and long-term characterization procedures to analyze the behaviors in RRAM cells can be easily achieved. As shown in Fig. 2.2, the equipments, including the semiconductor parameter analyzer (Agilent 4156C), low leakage switch mainframe (HP 5250A Switching Matrix), pulse generator (Agilent 81110A), and probe station, were used for our measurements on

RRAM. Programs written by HT-Basic were used to execute the measurement via HP-IB interface.

The Agilent 4156C provides a high current resolution up to pico-ampere range, and is equipped with four programmable source/monitor units. Two source units, and two monitor units for supplying or monitoring the voltage and the current. The pulse generator Agilent 81110A with high timing resolution provides for P/E cycling endurance and transient characterization. The HP 5250A switching matrix equipped with an 8-input x 12-output switching matrix switches the signals from the Agilent 4156C and Agilent 81110A to device under test in probe station automatically.

In order to control the pulse timing of Agilent 81110A during transient and P/E cycling endurance characteristics precisely, we select the triggered pattern mode to achieve this goal. Fig. 2.3 (a) and Fig. 2.3 (b) show the program and erase schemes on the RRAM respectively. For example, by taking the programming timing pattern as shown in Fig. 2.3, the triggered pattern mode can be explained as follows. In Fig. 2.3 (a), the VSU1 of Agilent 4156C generated a voltage signal which is equal to the low voltage level of Agilent 81110A. This triggered pattern mode method can provide a substrate bias during programming, and prevent additional stress to device during P/E cycling endurance operation. The pattern mode defined as 01000 in Fig. 2.3 (a) from Agilent 81110A is then sent and the program or erase operation is performed.

2.3 Measurement Methods

2.3.1 Introduction

There are four measurement techniques used in this thesis. First, a forming process is required for every fresh device before normal operation. Second, normal operation using bipolar voltage/current sweep is necessary for basic device characterization. The last two methods are designed to examine RRAM transient behavior: series resistor sensing and continuous pulse measurement for different applications.

2.3.2 Forming

Before we start to operate the resistive switching random access memory correctly, we need to perform the so-called “forming” procedure first, as shown in Fig. 2.4. We add a ramped voltage on the top TiN electrode which is near the Ti buffer layer, and measure the corresponding current by Agilent 4156C semiconductor parameter analyzer. When the accumulated energy exceeds a certain limit determined by device material and thickness [2.3], the current rushes to the value of compliance current, and the forming step is accomplished, as shown in Fig. 2.5. The compliance current is usually set to be a little less than the compliance used in normal SET process.

2.3.3 Sweep

After the “forming” process, this device switches to LRS (Low Resistance State).

The following step is to turn it off, i.e., to switch the RRAM from LRS to HRS (High Resistance State). There are two operation mode to identify the switching type of RRAM [2.4]. As shown in Fig. 2.6, one is uni-polar, and the other one is bi-polar. Uni-polar means that the turn on voltage and turn off voltage are at the same polarity, where the turn on voltage is usually larger than turn off voltage. On the other hand, the bi-polar means that the turn on voltage and turn off voltage are in opposite polarities. Usually the bi-polar switching device is more suitable for future CMOS technology due to less operation voltage and power consumption. Our device basic characteristic is shown in Fig.

2.7, which is obviously a bi-polar device. The illustrations of voltage sweep operations in this thesis are shown in Fig. 2.8 and Fig. 2.9.

For SET process, besides voltage sweep method, we can also use current sweep to eliminate current compliance, which is illustrated in Fig. 2.10. In this method, we simply exchange the current compliance to the target current amplitude. This method avoids large current flow through RRAM during SET process and thus improves device consistency and reliability. There are also some reports indicating the benefit of current sweep method [2.5, 2.6].

2.3.4 Series Resistor Sensing

To measure RRAM transient behavior, we use an oscilloscope to directly monitor RRAM real-time current. The equipment setup is illustrated in Fig. 2.11. The sensing resistor is chosen to be 100Ω to avoid significant voltage dividing while giving enough signal amplification, because normally lowest resistance state is about 1kΩ. This

technique allows us to investigate RRAM transient behavior in linear time scale, which is very useful in analyzing RRAM memristive characteristics.

2.3.5 Continuous Pulse Measurement

The linear time scale measurement can not see the whole story about RRAM switching behavior, as we will discuss later in Chapter 4, so we need another technique to measure logarithmic time scale behavior. Fig. 2.12 illustrates the concept of this measurement technique. We use Agilent 81110A to generate a series of pulses with the same top and bottom levels. After ten same pulses, the eleventh pulse width increase one order so that the overall stress time continues in logarithmic time scale. After each pulse, HP 5250A switches the input to Agilent 4156C to start small voltage sampling. This sampling procedure “reads” RRAM temporary state by applying 0.1V to evaluate current and resistance. The 0.1V is chosen to be less than RRAM switching threshold to avoid disturbance. This method is helpful in giving an overview on RRAM transient switching behavior.

Fig. 2.1 XPS depth profile of TiN/Ti/HfO2/TiN stack layers after alloying

01000

Probe Station Personal Computer

HP 81110A Pulse Generator

Parameter Analyzer HP 4156C

Switch Matrix HP 5250 A

Fig. 2.2 The experimental setup of the current-voltage and the P/E cycling endurance characteristics measurement in RRAM. Automatic controlled characteri- zations system is setup based on the PC controlled instrument environment.

Fig. 2.3 The timing diagram of the triggered pattern mode method during (a) program and (b) erase operation.

Fig. 2.4 The cross section of transition metal oxide based resistive switching memory during forming process.

Fig. 2.5 Forming: The predominant step before resistive switching operation.

(a)

(b)

Fig. 2.6 Two terminologies of RRAM. (a) unipoalr (b) bipolar.

Fig. 2.7 Basic characteristics of the test RRAM cells in this thesis.

Fig. 2.8 Illustration for positive sweep operation.

Fig. 2.9 Illustration for negative sweep operation.

Fig. 2.10 Illustration for positive current sweep

Fig. 2.11 Measurement setup for series resistor sensing method.

Fig. 2.12 Continuous pulses measurement: The red pulse is used for RESET, and the blue lines indicate a small read voltage after each time-varying RESET pulses.

Chapter 3

Physical Model of Transition Metal Oxide Based RRAM

3.1 Introduction

There are three parts in this chapter. First in Chapter 3.2, we discuss all reported RRAM models about their validity. Then, we propose a possible universal model to include all RRAM phenomena. We utilized WKB approximation to quantitatively describe the tunneling model that we proposed, and finally, we will show the simulation result with real experimental data to verify our model.

3.2 Discussion on Known RRAM Models

3.2.1 Space Charge Limited Current

A number of literatures refer RRAM current to be the so-called “space-charge- limited current”, abbreviated as SCLC, due to the special nonlinear current characteristic of RRAM [3.1, 3.2]. According to Fig. 3.1 [3.2], we can clearly tell that when applied voltage is small, RRAM current is proportional to the applied voltage, just like an ohmic resistor. As the applied voltage increases, the current-voltage relation then follows a square law. This behavior is similar to the theory of SCLC, which contains both linear and square law of applied voltages [3.3]. There are three equations used in SCLC theory :

1、 In the mobility region (Mott-Gurney law)

2、 In the velocity saturation region

2

2 _{s s}v V

J L

= ε (3.2)

3、 In the velocity saturation region

12 3

The space charge is determined by both the doping concentrations and the free-carrier concentrations. When the injected carrier is larger than its equilibrium value as well as the doping concentration, the space-charge effect is said to occur [3.3]. In semiconductor, the carrier velocity is proportional to the electric field under low electric field, and saturated under high field. According to this, we should expect a square law at low applied voltage and a linear law at high applied voltage, which contradicts the RRAM measurement result. Beyond this, we can see the current increase more rapidly beyond the square law region, where SCLC theory fails obviously. Based on these contradictions, we can say that SCLC is not a good model for RRAM current behavior.

3.2.2 Schottky Barrier Thermionic Emission

Another reported RRAM current characteristic is Schottky barrier thermionic emission, which is also based on measured current-voltage characteristic. As shown in Fig. 3.2, the RRAM current is actually proportional to the exponential of the square root of applied voltage [3.4]. To understand the origin of this relation, we have to first realize the fundamental of the theory. The current characteristic of Schottky barrier thermionic emission is shown below [3.5]:

(

⁰

)

The square-root law comes from the Ei term in equation (3.4), which means the electric field inside the insulator. First of all, the thermionic emission is a diode-like behavior. That is to say, when the applied voltage is forward biased, the current will exponentially increase with applied voltage. This opposes to the RRAM current characteristic, which shows reverse bias characteristic for both positive and negative applied voltage.

The supporters of Schottky barrier thermionic emission refer the RRAM switching to the change of Schottky barrier height. In their works, the barrier height is extracted by fitting current characteristic with the formula above. However, a more accurate method is done by temperature experiments. Our result, as shown in Fig. 3.3, and another paper [3.6]

show that the Schottky barrier height does not change in different high resistance states.

Also, the RRAM current seems to be rather insensitive to temperature [3.7, 3.8]. As a result, we can certainly say RRAM current cannot be explained by Schottky barrier thermionic emission.

3.2.3 Frenkle-Poole Transport

One of the conduction mechanisms through an insulator is controlled by inter-trap tunneling, which can be described by Frenkle-Poole transport. In Frenkle-Poole transport, the electron enters the trap site first by tunneling, and then leaves by thermionic emission.

The current characteristic of Frenkle-Poole transport is described by the following equation [3.5]:

( )

Nevertheless, this equation fits only the pre-forming current of RRAM [3.9]. A possible explanation is that this theory is adaptable when the trap density is low. But the conduction filament is actually a bundle of dislocations composed of extremely localized traps [3.10]. These dislocations form a high conductance passage for electron transport instead of using thermionic emission.

3.2.4 Coupled Ionic Drift and Electronics

The first adapted RRAM switching mechanism is described by the ion motion under applied electric field [3.11], but the device size then is of the order of millimeter. Recently, the HP research group proposed a modified coupled ionic drift and electronics model in Nature to explain RRAM memristive characteristic [3.12]. The main idea is illustrated in Fig. 3.4 and the current model is described by:

( )

There are some assumptions made in this model. One of them is the ion mobility which is independent of applied electric field. This assumption is unrealistic for modern nano-scale device. Another one is assuming that there is not any threshold to initiating ionic motion. According to this assumption, the RRAM will eventually change state as long as the bias is applied for enough time. This is contradicted to every known RRAM measurement result, which always exhibits a certain threshold voltage both in SET and RESET operation. The threshold is important for a memory device since it can avoid

disturbance during read or programming of the other cells. Third, the ion motion is assumed to be controlled only by electric field intensity without considering the polarity.

The result will make the switching behavior similar in both SET and RESET processes.

However, the basic characteristic shown in Fig. 2.7 indicated that SET and RESET process obviously show asymmetric behaviors. In summary, for large scale device, RRAM behavior can be well explained by ionic motion, but for nano-scale device, we must develop some new models since quantum mechanics may play a significant role in electron transport.

3.3 Theory of Tunneling Model

3.3.1 Introduction

In order to effectively improve RRAM performance, it is crucial to find out an exact model for RRAM switching mechanism. In previous section, we already deliberated that none of the existing model can fully explain all experimental phenomena of RRAM. Still some of the concepts in those models are worthy of reference. First, the exponential relationship between the current and the square root of applied voltage in both Schottky barrier thermionic emission and Frenkle-Poole transport models is a key. We also found this characteristic under small applied voltage, as shown in Fig. 3.5. The origin of this relation comes from image force induced barrier lowering [3.13]. This characteristic suggests there is indeed a barrier hindering electron transport. We have already shown that barrier height doesn’t change for different states, so we may assume that it is the barrier “width” which is changing. This hypothesis seems reasonable because the conduction filament length will extend or shrink as ionized oxygen vacancies moves under applied electric field and thus the distance between the filament and the electrode will change. The depletion region near the interface forms a nano-scale tunneling barrier which is the origin of RRAM current and resistance switching.

In order to verify our tunneling barrier width model, we adopted a simple semi-quantum simulation method called WKB approximation [3.14] to describe RRAM

current behavior. We found it successfully fits experimental data and is very useful to further describe all problems which cannot be explained by other models.

3.3.2 Formulae and Parameters for Simulation

Since the cross section of a single conduction filament is normally few nm², which is relatively small compared to total electrode area (up to μm²), so we consider only one dimension potential barrier and assume the conduction filament is a cylinder with 4 nm² cross section, as shown in Fig. 3.6. The tunnel barrier width “d” is the only variable in the following equations.

According to WKB approximation, the tunneling probability is defined as :

* 0

exp 2 ^d 2

P= ⎛⎜⎝−

∫

m q E V dx− ⎞⎟⎠ (3.9)

where m* is the effective of the dielectric, E V− is the absolute difference between electron kinetic energy, and potential barrier. The potential barrier is defined by the conduction band energy difference between the electrode or trap level of conduction filament and the depleted dielectric, which is initially constant. However, in the last section, we already mentioned we have to include image force induced barrier lowering to satisfy RRAM current characteristic. So, the energy difference now becomes a distance- and voltage-dependent equation as below:

2

where φ_i,ε_i,andV are the initial barrier height, dielectric constant, and voltage drop of _i the dielectric layer. The integration now can be done as long as the constants are known.

inconsistent with real measurement data. However, it has been published that the formation energy of titanium oxide is lower than hafnium oxide [3.15]. Therefore, we assumed the tunneling dielectric layer is actually titanium oxide and took the parameters of titanium oxide to perform the simulation again. The result was surprisingly good. This result is a great revolution. It means the dielectric material is not the only factor that affects RRAM performance, the choice of electrode material is also a great issue. Fig. 3.7 (a) illustrates possible schemes in LRS and HRS. According to the motion of oxygen ion, a new titanium oxide layer should be formed near the bottom interface. There is also a titanium oxide layer initially formed right after titanium sputtering, but the area of the top layer is much larger than the bottom layer. In order to satisfy the charge conservation, the total charge used in redox reaction is the same for both SET and RESET process.

Therefore, if the charge densities of both layers are equal, the width variation of the bottom layer must be greater than the top layer. That is to say, it is the bottom titanium oxide that controls the RRAM resistance switching. Fig. 3.7 (b) shows the band diagram along the conduction path. Assuming the top layer does not share the applied voltage, we can thus drive the equation as given below based on Gauss’s law:

2

where VA is the applied voltage. Table 3.1 includes all the parameters we used in the simulation [3.16-3.19]. One thing is noticeable that the barrier height and effective mass used for positive and negative bias conditions are different, indicating different conduction band characteristics between electrode and the conduction filament.

3.3.3 Analytical RRAM Low-Field Current Model

Although the integration mentioned above can be numerically done to fit any measured RRAM current characteristic, it is hard to describe RRAM behaviors in this form. We need an analytical formula for further discussion. If the barrier width is large

enough so that the barrier distortion can be seen as effective barrier height lowering, we can simplify the integration and multiply it by a pre-factor [3.20]:

( )

^{3 3}

where A is the conduction filament cross section and φ_i^' is the effective barrier height defined as:

Equation (3.11) can be further reduced if the voltage drop on titanium oxide is much smaller than the initial barrier height, the exponential term will become voltage-independent, i.e.,

Equation (3.13) is exactly the formula of direct tunneling through a constant barrier height. Based on equation (3.12), we can transform the RRAM current state which is measured by specific read voltage (usually 0.1V) into the effective barrier width.

3.4 Simulation Result and Discussion

Figure 3.8 shows the simulation result with real experimental data and the effective tunneling barrier width are shown in the legend. The maximum sweep voltage is ±0.3V

to avoid resistance switching, and this condition also meets the requirement of low field assumption in our model. Fig. 3.9 shows the relation between read resistance and RESET

to avoid resistance switching, and this condition also meets the requirement of low field assumption in our model. Fig. 3.9 shows the relation between read resistance and RESET

在文檔中 二氧化鉿基底電阻式記憶體之動態轉換物理模型 (頁 17-0)