Chapter 1 Introduction
1.2 Outline of The Dissertation
The contents of this dissertation include: literature review, experiment,
results, discussion and conclusions. In Chapter 2, the literature survey of ohmic contact for n-type GaAs and GaAs-based HBTs are reviewed. In Chapter 3, the study of ohmic contact, the samples preparation for material analysis, and the fully Cu-metallized GaAs HBT device process flow are described. Besides, the results of multilayer interfacial material analysis, the DC and RF device characteristics and the reliability tests for the fully Cu HBTs will also be presented. The Pd/Ge/Cu ohmic contact, formation mechanism, the DC and RF characteristics of the HBT devices using the Pd/Ge/Cu ohmic will be discussed in Chapter 4. Finally, the conclusions will be given in Chapter 5.
Table
Table 1 Properties comparisons of possible interlayer metals
Property Cu Ag Au Al
Resistivity(µΩ‧cm) 1.67 1.59 2.35 2.66 Young’s modulus.10-11 dyn/cm2 12.98 8.27 7.85 7.06
Thermal Conductivity (W/cm) 3.98 4.25 3.15 2.38
CTE.106 17 19.1 14.2 23.5
Melting Point (℃) 1085 962 1064 660 Specific heat Capacity (J/Kg•K) 386 234 132 917
Corrosion in air Poor Poor Excellent Good Deposion
Sputtering Yes Yes Yes Yes
CVD Yes No No No
Evaporation Yes Yes Yes Yes
Etching
Dry No No No Yes
Wet Yes Yes Yes Yes
Resistance to Electromigration High Very Low Very High Low
Delay Time(ps/mm) 2.3 2.2 3.2 3.7
Chapter 2
Literature Review
2.1 Ohmic Contact for GaAs-Based Devices
The definition of ohmic contact on a semiconductor is to allow electrical current to flow into or out of the semiconductor freely without barrier [10]. The contact should have a linear I-V characteristic, be stable over time and temperature, and contribute as little contact resistance as possible.
2.1.1 Requirements for A Good Ohmic Contact Material The requirements for a good ohmic contact include: [11]
1. Low contact resistance
The first requirement for ohmic contacts of most devices is low contact resistivity, the resistance must be low enough not to affect the device I-V characteristics. The requirement for the reduction of the contact resistances has been continuing, because as the size of the device shrink to improve the device performance according to the scaling rule, the specific contact resistivity must decrease in order to keep the same contact resistance.
2. Thermally stable:
The second requirement for the ohmic contacts in GaAs devices is thermal stability during device fabrication and device operation.
In addition, a smooth surface, good adhesion, shallow horizontal and verticle diffusion depths, and low metal sheet resistance are required for ohmic contact in GaAs device. The requirements for ohmic contact are illustrated in
Figure 1.
2.1.2 Guideline for Low Resistance Ohmic Contact Formation
When a metal deposited on a semiconductor, the Fermi levels in the metal and the semiconductor must be equal. For the Fermi levels to be equal in both sides, an energy barrier eΦB must exist between the metal and semiconductor interface [12]. The carriers can not transport freely because of the energy barrier.
The carrier transport mechanisms through the metal/semiconductor interface are strongly influenced by the doping concentration in the semiconductor and the temperature.
The current density (J) between contact metal and n-type semiconductor is shown below:
J = exp(-qΦB/E00) (2.1) When
E00=(qh/4π) x (ND/εm*) ½ ε:dielectric constant
ND: doping concentration m*:effective electron mass χ:electron affinity
Equation 2.1 indicates that the current density increases when the doping concentration increases. When the semiconductor is extremely heavily doped (>high-1018cm-3), the electrons can tunnel through the energy barrier between metal and semiconductor to form good ohmic contact. This is called “tunneling mechanism”. The band diagram is shown in Figure 2.
Higher doping level is easy achievable in p-type GaAs. Because the dopants used in the p-type GaAs are not amphoteric and DX centers are associated with donors only, the ohmic contact to highly doped p-type GaAs can be easily formed. However, for n-type GaAs, the upper limit of the Si doping concentration achieved by the conventional ion-implantation technique is about 1018 cm-3. This level is limited by the formation of DX centers in n-type GaAs.
Due to this limitation on the of doping concentration, the formation of ohmic contact on n-type GaAs is difficult. The best way to modify the interfacial microstructure to produce low resistance ohmic contact is to form a new intermediate semiconductor layer (ISL) with low energy barrier or high carrier density at the metal/semiconductor interface after heat-treatment as shown in Figure 3. This fabrication process are called “deposition and anneal ohmic contact” [11].
The most common method of forming “deposition and anneal ohmic contact” on n-type GaAs is to apply an appropriate metallization scheme to the heavily doped GaAs followed by annealing process. During the annealing process, one of the constituent metals diffuses into the wafer and dopes the cap GaAs layer heavily.
This ohmic contact fabrication technique needs a relatively simple fabrication system and with excellent reproducibility. Thus, this technique is suitable for manufacturing devices and used in a wide variety of GaAs devices.
However, the big disadvantage for this technique is that the process parameters can not easily be found, such as the contact metals, thickness of each metal layer, annealing time and temperature, diffusion coefficients, stress, surface energy, etc.
There are many kinds of “deposition and anneal ohmic contact” reported
from the literatures. Ge-based ohmic contact, one of the famous ohmic contact systems, will be described in the following section.
2.1.3 Ge-based Ohmic Contact Materials
AuGeNi contact materials were invented by Braslau et al. in 1967. [13], and have been extensively used as n-type ohmic contact materials for advanced GaAs devices over 30 years. Although AuGeNi ohmic contacts provided low contact resistance and excellent reproducibility, this ohmic contact also has several drawbacks such as rough surface morphology, deep reaction depth in GaAs substrate, complex alloying process, and thermal instability after contact formation. These reasons cause the large scale spread of the contact resistivity.
To overcome these problems, many groups develop different ohmic contacts and try to apply them to the future sub-micron GaAs devices. The most popular ohmic contact system is Ge-based ohmic contact materials. Because Ge was found to dope heavily in the GaAs surface after heat-treatment, the contact resistivity of traditional Ge-based ohmic contacts is below 10-6Ωcm2 range.
In order to increase the donor concentration, a small amount of elements can be added. These additional elements increase the donor concentration in the GaAs surface layer and decrease the energy barrier height at the contact metal/GaAs interfaces.
To increase the donor concentration, “direct” doping elements and
“indirect” doping elements were chosen in the past. The ”direct” doping elements were Sn, Sb, and Te which would increase the donor concentration in the GaAs surface layer by diffusing after heat-treatment. The “indirect” doping elements were Pd, Pt, and Au. Because the mixing enthalpy of the Ga with those elements (M) is smaller than that with As, Ga would form M-Ga phases with
these elements in the GaAs surface. And Ge atoms could easily diffuse to the Ga vacancies in the vicinity of the GaAs surface to increase the donor concentration in the GaAs surface layer and reduce the Rc values [14]. In addition, Ag and Cu also belong to the “indirect” doping elements with wide solubility with Ga in a wide temperature range, forming M(Ga) solid solutions [15]. The formation of M(Ga) solid solutions would also incease the Ga vacancy concentration and facilitate heavy doping of Ge atoms in the GaAs surface layer.
Pd/Ge/Cu ohmic contact is also one kind of the Ge-based ohmic contacts, but the formation mechanism is different from other Ge-based ohmic contacts reported in literature. Before introducing the formation mechanisms of Pd/Ge/Cu ohmic contact, PdGe and Cu3Ge ohmic contact will be briefly introduced in next paragraphs.
Marshell et al. [16] developed the PdGe ohmic contact in 1980. PdGe ohmic contact is based on solid phase regrowth, not based on complex alloying process like traditional AuGeNi ohmic contact. The advantages of PdGe ohmic contact are uniform and shallow reaction, good thermal stability, and planer interface. The formation mechanism of PdGe is complex. When annealing at 100℃, Pd layer reacted with GaAs to form PdxGaAs ternary phase. The TEM image is shown in Figure 4 [17]. Because the mixing enthalpy of PdGa is smaller than PdAs, it could creat Ga vacancies in the near-interface region of the GaAs substrate. But at this temperature, ohmic contact is still not formed. After annealing above 300℃, the Pd reacted with amorphous Ge layer to form PdGe compounds and bring in some excess Ge atoms. Also at this temperature PdxGaAs ternary phase decomposed to form Pd atoms with GaAs layers. Then excess Ge atoms can dope the regrown GaAs layer and become highly doping
layer and finally excess Ge atoms become epitaxial crystal Ge layer between the regrown GaAs and PdGe layer. The final structure is shown in Figure 5. Table 2 shows the summery of the contact resistivity of PdGe contact from four literatures. The lowest contact resistivity was about 10-6 Ωcm2 on n-type GaAs with Si doping concentration of 1018 cm-3.
M. O. Aboelfotoh et al. [18] have developed the Cu3Ge ohmic contact in 1994. This ohmic contact system is very unique. After annealing, Cu layer reacts with the Ge layer to become Cu3Ge structure. Because the chemical potential of Ga atom in the Cu3Ge is lower than that in the GaAs substrate, Ga atoms diffuse out to the Cu3Ge compound and creat many Ga vacancies. Ge atoms can dope in near-interface region of GaAs to highly doping. It also can be seen by SIMS profile in Figure 6. Besides, this compound is crystal structure and has long range order. The grain boundary of Cu3Ge compound is vertical to the GaAs surface. It can increase conductivity. The TEM image is shown in Figure 7.
Giving a summary of these two ohmic contact systems, the formation of the low resistance ohmic contact has two conditions. First, create Ga vacancies and then Ge atoms doping into near-interface region of GaAs substrate. It can use some elements reacted with GaAs to form ternary phase. And after annealing, MGaAs phase decomposed to metal and regrown n+- GaAs layer same as the formation mechanism of the PdGe ohmic contact. It uses the chemical potential of Ga atoms in the ohmic compound is lower than in the GaAs so that Ga atoms diffuse out to create Ga vacancies as the formation mechanism of Cu3Ge ohmic contact. Second, it forms the low resistivity metallic compound like Cu3Ge crystal structure.
2.2 GaAs Based Heterojunction Bipolar Transistors
The concept of the heterojunction bipolar transistor was first introduced by William Shockley in 1948. A detailed theory related to this device was developed by H. Kroemer in 1957 [23]. Kroemer realized that the use of a wide-band-gap emitter and low-band-gap base would provide band offsets at the heterointerface that would favor the injection of the electrons, in an n-p-n transistor, into the base while retarding hole injection into the emitter. These advantages would be maintained, even when the base is heavily doped, as is required for low base resistance, and the emitter is lightly doped. Thus in an HBT, high emitter injection efficiency would be maintained while parasitic resistances and capacitances would be lower than for a conventional homojunction bipolar transistor.
The cross section of a basic n-p-n AlGaAs/GaAs heterojunction bipolar transistor is shown in Figure 8. The n-type emitter is formed in the wide-band-gap AlGaAs while the p-type base is formed in the lower band gap GaAs. The n-type collector, in this basic device, is also formed on GaAs. To facilitate the formation of the ohmic contacts, a heavily doped n+-GaAs layer is present between the emitter contact and the AlGaAs layer. The energy band diagram of this device is shown in Figure 9.
Some inherent advantages of HBTs over silicon bipolar transistors are as follows [24]:
(1) Due to the wide-band-gap emitter, a much higher base doping concentration can be used, decreasing base resistance.
(2) Emitter doping can be lowered and minority carrier storage in the emitter can be made negligible, reducing base-emitter capacitance.
(3) High electron mobility, built-in drift fields, and velocity overshoot combine to reduce the electron transit time.
(4) Semi-insulating substrates help reduce pad parasitics and allow convenient integration of devices.
(5) Early voltages are higher and high injection effects are negligible due to high base doping.
Figure 10 shows the band diagram of a homojunction BJT and HBT. The energy band gap difference between the emitter and the base gives the HBT a substantial edge over BJT. When the base-emitter junction of a BJT is forward biased, both the electrons forward-injection into the base and the hole back-injected into the emitter experience the same amount of energy barrier. For the HBT, when the base-emitter junction is forward biased, the holes, which are back inject from the base into emitter, experience a △Eg larger energy barrier than the electrons, which are injected into the base. So, the HBT provides a design freedom meaning that a HBT structure design can have a heavily base dope to reduce the base resistance, while still maintaining a high current gain.
We can quantify the advantage of HBT compared to BJT by calculating the ratio of the collector current to the base current [25].
⎟⎟⎠
Equation (2.1), which relates the intrinsic carrier concentration to the energy gap, was used in the derivation. It’s defined as the current gain which is one of the most important parameters in bipolar transistors.
Among several HBT device structures, InGaP/GaAs HBTs are becoming attractive as compared with the AlGaAs/GaAs HBTs in the circuit applications such as high-speed analog-to-digital converters, high-power microwave amplifiers, and high-speed optical communication circuits due to their robust reliability and excellent DC and RF performances. In addition, several advantages have been claimed for this material system, such as large valence-band discontinuity, very low interface recombination velocities with GaAs, significantly less oxidation in comparison with AlGaAs, no DX centers issue, and good selective etch with GaAs [26].
Table
Table 2 Summary of PdGe ohmic contact data from literature
Pd / Ge ( A ) ρc (Ωcm2) doping (cm-3) Formation Condition Ref.
500 / 1260 ~10-6 1 x 1018 Anneal 325℃ for 30min
[18]
500 / 1260 2.84 x 10-6 2 x 1018 Anneal 330℃ for 30min
[19]
500 / 1250 1.4 x 10-6 3 x 1018 RTA 425 ℃ for 60sec
[20]
200 / 400 5.33 x 10-6 2 x 1018 RTA 350 ℃ for 45sec
[21]
Figure
Figure 1 Ideal interfacial structure for the low-resistance ohmic contact
Figure 2 Conduction mechanisms through metal/semiconductor interface with high donor doping level
Figure 3 Cross-section of the metal/semiconductor interface with ISL
Figure 4 The TEM image of the Pd /Ge contact after annealing at about 100℃
(a)
(a)
Figure 5 (a) The structure and (b) TEM image of the PdGe contact
n-GaAs
n+-GaAs (regrowth)
PdGe
epi-Ge (crystal)
Figure 6 SIMS profiles of an Cu3Ge contact formed at 400℃ for 30min
Figure 7 TEM image of an Cu3Ge contact formed at 400℃ for 30min
Figure 8 Schematic of the cross section of an HBT structure
Figure 9 Energy band diagram of an HBT structure
(a)
(b)
Figure 10 The band diagrams of (a) a homojunction bipolar transistor and (b) a heterojunction bipolar transistor.
Chapter 3 Experiment
The experiment can be divided into three parts. First, the Pd/Ge/Cu ohmic contact formation on n-type GaAs was studied. Second, the Pd/Ge/Cu ohmic contact was applied on the InGaP/GaAs HBTs as the n-type GaAs contact metal to form Au-free fully Cu-metallized InGaP/GaAs HBTs. Third, material analysis and electrical characterizations of the devices were performed.
3.1 Study of Ohmic Contact
The studies of ohmic contact include electrical characteristics measurement, material analysis, and thermal stability test.
The measurements of specific contact resistances of the n-GaAs/ Pd (15nm)/ Ge (150nm)/ Cu (150nm) were carried out by transmission line (TLM) method. The substrates used for the ohmic contact resistivity measurement in this study were semi-insulating GaAs wafers with Si-doped GaAs epitaxial layers (2000 Å, 1x1018 cm-3). Standard photolithography was used to pattern the substrates for transmission line measurements (TLM). The GaAs mesa was etched by H3PO4/H2O2/H2O solutions. After the conventional organic solvent cleaning process, the substrates were chemically cleaned in a solution of HCl:
H2O (1:1 by volume) to remove the native surface oxide layer, the samples were load into the evaporation chamber. Pd (15nm)/ Ge (150nm)/ Cu (150nm) compositions were then deposited on the substrates using an electron-beam evaporator in a pressure of ~1x10-6 Torr. The bulk of the resist and metal were
then removed by a wet solvent lift-off process, followed by a high pressure DI water rinse to remove the residues. After lift off, the samples were annealed in a conventional tube furnace at various temperatures from 150oC to 450oC in an N2-ambient tube furnace for 20 minutes. The ohmic contact resistance (RC) of the samples after annealing was measured using the transmission line model (TLM).
In order to understand the formation mechanism of Pd/Ge/Cu ohmic contact, the Pd/Ge/Cu multilayer was analyzed by XRD, TEM, SEM, and AFM.
Phase identification was analyzed by the X-ray diffraction (XRD). The interface microstructure of the Pd/Ge/Cu ohmic contact materials/n-GaAs was observed by transmission electron microscopy (TEM) and scanning electron microscopy (SEM). The surface morphology was observed by atomic force microscope (AFM).
The thermal stability test of the Pd/Ge/Cu ohmic contact was performed by high-temperature annealing test (250oC) in a N2-ambient tube furnace for 24 hours. The ohmic contact resistances (RC) of the samples were measured using the transmission line model (TLM).
3.2 Device Structure and Fabrication
The epitaxial layers of the InGaP/GaAs single heterojunction bipolar transistors (SHBTs) were grown by molecular beam epitaxy (MOCVD) on semi-insulating (100) GaAs substrate.
3.2.1 Device Structure
The InGaP/GaAs HBT epitaxial layer structure is shown in Table 3.The
GaAs subcollector layer was grown on a 3-inch diameter semi-insulating substrate, and it was heavily doped to reduce the n-type ohmic contact resistance.
The lightly n-type doped GaAs collector layer and the heavily p-type doped GaAs base layer were grown on it subsequently. The emitter layer is InGaP, and the heavily doped GaAs layer on the top serves as the ohmic cap layer.
3.2.2 Device Fabrication
The details of the Au-free fully Cu-metallized InGaP/GaAs HBT device fabrication are described as follows. Besides, the traditional Au-metallized InGaP/GaAs HBTs which use Au/Ge/Ni/Au and Pt/Ti/Pt/Au as n-type and p-type ohmic contacts metals and Ti/Au as the interconnect metal were also fabricated for comparison. The flow charts of the process flow for device fabrication were shown in Figure 11.
The first step is wafer clean. The wafers were immersed into ACE and IPA separately, each for five minutes to remove any contaminants from the wafer surface, and then they were blown to dry by nitrogen gas.
The second step is emitter mesa, collector mesa, and isolation etching. The InGaP/GaAs HBT devices were fabricated using a standard triple mesa process.
The GaAs layers were etched by etchant composed of phosphoric acid, hydrogen peroxide, and D.I. water. And the InGaP layer was etched by a mixture of phosphoric acid and hydrogen chloride acid. After each etching process, the devices were rinsed by D.I. water and blown dry by nitrogen gas. The first step of the fabrication was to define the emitter mesa area. The emitter mesa was etched and stopped on the InGaP emitter layer. The collector mesa was etched
The GaAs layers were etched by etchant composed of phosphoric acid, hydrogen peroxide, and D.I. water. And the InGaP layer was etched by a mixture of phosphoric acid and hydrogen chloride acid. After each etching process, the devices were rinsed by D.I. water and blown dry by nitrogen gas. The first step of the fabrication was to define the emitter mesa area. The emitter mesa was etched and stopped on the InGaP emitter layer. The collector mesa was etched