Because more and more electronics applications require switching converters, switching converter performance must be considered. The most important specifications include the high conversion efficiency of switching converter, excellent regulation of load and line regulation, and fast transient response. This section describes some terms and definitions that will make it easier to design or evaluate a switching converter.
2.4.1 Efficiency
Although a switching converter has high conversion efficiency, it wastes power at different load conditions, reducing efficiency. There are many sources of power loss, including switching loss, power MOSFET conduction loss, diode conduction loss, ESRL and ESRC conduction loss, control circuit power consumption, etc. Because the pass of power MOSFET can equal that of a resistor (RON), it will result in a power loss. This power consumption is also called conduction loss (Pcond), and expressed as follows:
2
( )
cond rms DS ON
P = I R
( 2 9 ) When the power MOSFET switches on and off, the gate parasitic large capacitor of power MOSFET alternately charges and discharges. This produces a large conversion loss, called switching loss (PSW), which can be expressed as follows:( )
2SW GP GN IN SW
P = C + C V F
( 3 0 ) The terms CGP and CGN represent the gate parasitic capacitors of the power PMOSFET and power NMOSFET respectively. VIN is represented the input voltage and FSW is represented the switching frequency. The final part is the idle mode, which is the condition in which the converter has no loading. Although there is no load at output, the converter can still regulate the output voltage. This current consumption in the internal controller is called the quiescent current. The system power loss (PSYS) is the product of the quiescent current and input voltage. The ratio of the output power and input power, including the power loss, represents the efficiency of a DC-DC converter, and can be expressed as follows:out OUT OUT
100%
in OUT LOSS OUT SW cond SYS
P P P
Efficiency
P P P P P P P
= = = ×
+ + + +
( 3 1 )2.4.2 Load and Line Regulation
Variations in the supply voltage or output load current can affect the operation of the circuit. To keep the regulated voltage and decrease the steady state error when increasing, the supply voltage and load condition of DC-DC converter is very important.
The load regulation is the percentage change of output voltage when the load current changes. Load regulation is Line regulation is a measure of the ability of changes in input power supply to maintain the output voltage. Line regulation is the percentage of change in the output voltage relative to the change in the input line voltage. Line regulation is defined as:
The transient response is one of the most important specifications of switching regulator for the system applications. It is measured by the magnitude of output voltage drop and output voltage settling time when applying the step load is applied to the switching converter. Due to limits in switching regulator bandwidth, the feedback control cannot provide sufficient current in time. Therefore, the output capacitor discharges the energy to support the load current and make an output voltage drop. The switching converter is the concern of key parameter for transient response that is affected by output capacitor, equal series resister of the switching and passive component.
Fig. 21. The output waveform when a dynamic load is applied
Fig. 21 [15] shows the time characteristic of the transient response. At time period∆ , t1 the large current flow to the output load forms a switching regulator This is due to limitation in the system bandwidth, which prevent the switching regulator from providing current for the output in time. Therefore the output capacitor discharges the energy to support the load current and make an output voltage drop. As a result, the voltage ∆Vdropcan be calculated as:
(max) 1 LOAD
drop ESR
OUT
V I t V
∆ = C ∆ + ∆ ;
∆ V
ESR= I
LOAD(max)× R
C ESR_ ( 3 4 ) t1∆ depends on the bandwidth of the switching converter. Besides, a large output capacitor continues to provide charges to the output load and holds the output voltage steady without a drop.
The timing of ∆ depends on the feedback system to turn on the power MOSFET to t2 support the load energy. The output voltage finally settles to its final value in period∆ . The t
sum of ∆ and t1 ∆ is called “Recovery Time.” The static error, t2 ∆Vreg represents the voltage difference between no-load and full load affected by the load regulation. The system loop gain and closed-loop output resistance both affect ∆Vreg .
Suddenly removing the load from the output causes the output voltage to increase until the switching regulator turns off the pass element completely. ∆ is the system response time. t3 Before the pass element turns off, the excessive current charges the output capacitor.
Therefore, the voltage ∆Vpeak can be calculated as:
(max) 3 LOAD
peak ESR
OUT
V I t V
∆ = C ∆ + ∆ ; ∆VESR =ILOAD(max)×RC ESR_ ( 3 5 ) During the time period of ∆ , the output capacitor is discharged by feedback resistor. t4 The value of the feedback resistors determines the timing of ∆ : when the value of the t4 feedback resistors is smaller, the settling time of ∆ is shorter. On the other hand, when the t4 value of feedback resistors is larger, the settling time of ∆ is longer. t4
As a result, the transient response is related to the bandwidth of the switching regulator, output capacitor, ESR of output voltage, and the load current.