3-1 a-IGZO TFT with Si capping layer
The back channel effect has strong relationship with electrical performance of oxide transistors, we try to apply back channel effect to improve electrical performance through Si capping layer. The silicon capping can induce the formation of a thin accumulation layer of extra electron carriers in back channel. The extra electron carriers can contribute carriers to the front channel and result the mobility significantly increased. In this method, we enhance not only electrical performance but also prevent degradation of the device performance.
In this section, a set of experiments have been demonstrated to investigate the high mobility effect (about than 10 times increment) found in Si-capped a-IGZO TFT.
3-1.1 Motivation
In our groups’ previous research, we found that the back interface played an important role in bottom gate a-IGZO TFT. Therefore, the passivation layer became a considerable issue for our device stability. Accidentally, we found that the device was short circuit while capped SiOx on bottom gate a-IGZO TFT. The cross section and top view of device diagram and its transfer characteristics are shown in Fig. 3.1. We suspected that there were extra electron carriers in back channel to cause short circuit. Taking this phenomenon as an advantage, we reduced the capping area of SiOx instead of the whole channel part and found that this device exhibited great transfer characteristics.
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3-1.2 Transfer characteristics of SiO
x-capped TFT with differnent oxygen ratio
According to the experimental result mentioned above, we reasonably doubt that the extra electron carriers which are created by oxygen vacancy contribute to the large on-current and lead to ultra-high mobility. We co-sputtered Si and SiO2 to reach different oxygen ratio of SiOx
from x=0 to x=1 on bottom gate a-IGZO TFT to figure out whether different oxygen ratio of SiOx could create different quantity of oxygen vacancies. In this case, we fixed the capping layer thickness to 20nm, capping length to 300μm and the total channel length to 500μm. In Fig. 3.2, we observed that when the capping layer is lack of oxygen such as Si or SiO, it might be absorb the oxygen from a-IGZO films, and therefore, a-IGZO films can generate extra electron carriers due to oxygen vacancy. The transfer characteristics of SiO2 capping layer is without different from standard samples. We found that the carrier mobility significantly increase by capping the silicon oxide (SiOx, x = 0、1) .
3-1.3 Transfer characteristics and time decay of lightly doped and undope Si-capped TFT
From previous section, both silicon and silicon oxide (SiOx, x = 0、1) could significantly increase the field effect mobility. To simplify the case, from this section we choose only silicon (SiOx, x = 0) as the capping layer, and the ratio of Si capping length to channel length is 150μm /300μm. In Fig. 3.3, we show the ID-VGS and (ID)1/2-VGS transfer characteristics of different doped Si-capped devices, where VDS = 20 V. Each device was traced for about 30 days, and the variation of threshold voltage and mobility during 30 days is shown in Fig. 3.4.
As we could see, whether doped or undoped Si capping layer would cause threshold voltage
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shift to negative right upon deposition, and S.S. as well as μsat became larger. To explain these, from previous section we know that the extra electron carriers are created by oxygen vacancy.
And the increasing oxygen vacancy sites may both contribute to form more donor states and defect states, depending on the local structure [34]. The donor states enhance the electronic conductivity, but the defect states lead to larger S.S. The threshold voltage shift may be caused by the increasing carrier density near back interface of a-IGZO film, which needs negative gate bias to deplete the active layer and to turn off the device.
When devices are exposed to air, the rapid oxidation of Si eliminates the threshold voltage shift, the increased S.S as well as the off current, but decreases the mobility. These all can be explained by the reduction of oxygen vacancies in oxygen rich surrounding. After 30 days, the device has threshold voltage around -1V~-2V and mobility about 50~100cm2/VS, the device becomes stable and keeps high mobility. Detail parameters are listed in Table. 3.1.
3-1.4 a-IGZO thickness effect of Si-capped TFT
The a-IGZO thickness effect of Si-capped device is investigated, and the mobility enhancement effect becomes inferior when IGZO thickness increases as shown in Fig. 3.5.
Table. 3.2 lists the extracted parameters for standard (in parentheses) and Si-capped devices with various a-IGZO thicknesses. As discussed before, we supposed the threshold voltage shift after Si capping attribute to the creation of oxygen vacancy in a-IGZO film at the interface of Si/a-IGZO. And this effect is supposed to be sensitive to the distance of Si/a-IGZO interface and the front channel of bottom gate a-IGZO TFT. The result indicates that the film becomes harder to deplete when the front channel is far from the Si/a-IGZO interface.
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3-1.5 Annealing effect on Si-capped TFT
In previous section we doubt that the decaying characteristics of Si-capped devices are caused by the oxidation. In order to speed up the process, we try annealing the devices. In Fig.
3.6, two experiments are demonstrated. The first device was fabricated with no annealing before capping Si but only one post annealing in the final step; the other one was the same as previous section but added another post annealing in the final step. Both devices show similar results that 400℃ annealing in nitrogen (N2) furnace for 1hr would eliminate all the effect caused by Si capping.
3-1.6 Passivation layer and stability test of Si-capped a-IGZO TFT
Stability is also an important issue to know if Si capping causes degradation of a-IGZO film, which limits this work in practical application. Here we test only bias stress stability, and both positive bias stress (PBS) and negative bias stress (NBS) are demonstrated. (VG-VT=20 for PBS and VG-VT=-20 for NBS, and VD was not supplied during bias stress) Fig. 3.7 shows the transfer characteristics of old standard (old_STD, gas mixing ratio of Ar/O2 = 25/0.7) and Si-capped device. As we could see, after same bias time both devices exhibit only parallel shifts; i.e. the values of S.S and mobility are not affected, and similar voltage shift is obtained, which indicates Si capping doesn’t degrade the stability.
The passivation layer was also used to enhance the stability. Fig. 3.8 shows the bias stress tests of both passivation layers mentioned in Section 2-1.6 on new standard (STD, gas mixing ratio of Ar/O2 = 30/0) and Si-capped devices. Fig. 3.9 shows the threshold voltage shift versus stress time. The stability under positive bias stress of each device is enhanced as compared with the unpassivated devices, but somehow the negative bias stress becomes a little worse in some cases.
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3-2 Co-sputtered a-IGZO/IZO film with Si capping layer
3-2.1 Motivation
The high mobility in the a-IGZO material is attributed to the electron transport by the conduction band, whose minima in a-IGZO are composed of spatially spread nano-second orbitals of post-transition cations (In, Ga, and Zn) without directionality and the fact that their spherical symmetry makes the structural disordering in the amorphous state a rather uncritical issue.
Many groups have reported high performance TFTs with an a-IGZO film co-sputtered using a dual IGZO and indium zinc oxide (IZO) target [35, 36]. The indium content incorporated in the a-IGZO film was varied by controlling the rf power of the IZO target. The effect of the indium content on the performance was significant, and we would combine this with Si capping method to see further improvement.
3-2.2 Film deposition and Transfer characteristics of Co-sputtered a-IGZO/IZO TFT
In this work, we used ratio frequency (RF) –magnetron sputter to deposit our active layer.
The co-sputtering was carried out at room temperature with a working pressure of 9mTorr.
The input rf power of the In2Ga2ZnO7 target was fixed at 100 W, while that of the In2O3 –10 wt % ZnO target was varied from 50 to 100 W. The gas mixing ratio was also varied with the In2O3 –10 wt % ZnO target. And later the aluminum was deposited as source and drain after a 400℃ post annealing in nitrogen (N2) furnace for 1hr. We show a great result in Fig. 3.10
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and Table. 3.3, where a significant improvement of the device performance was observed for the TFTs with the a-IGZO channel co-sputtered at an IZO rf power of 100 W and 20 volume
% of O2 in Ar/O2 mixing gas.
3-2.3 Stability test of Co-sputtered a-IGZO/IZO TFT
The bias stress stabilities of co-sputtered device is demonstrated in this section (VG-VT=20 for PBS and VG-VT=-20 for NBS, and VD was not supplied during bias stress). Fig.
3.11 shows the transfer characteristics and threshold voltage shift of this device. The instability comparing with the usual a-IGZO TFT is much better in PBS but a little worst in NBS. The higher indium content and higher O2 gas ratio in the film deposition seem to reduce the defect states, resulting in a much stable device.
3-2.4 Transfer characteristics and time decay of co-sputtered a-IGZO/IZO TFT with Si capping layer
From the result of the above section, we chose a-IGZO channel co-sputtered at IZO rf power of 100 W as our basic device. Then the Si capping layer whose capping length and position were mentioned before was deposited on the co-sputtered a-IGZO/IZO TFT. Fig.
3.12 shows the time decay of ID-VGS and (ID)1/2-VGS transfer characteristics, where VDS = 20 V.
The device was traced for about 30 days, and the variation of threshold voltage and mobility during 30 days is shown in Fig 3.13. When the Si-capped a-IGZO/IZO device is stable, it seems that the threshold voltage becomes more negative than the usual one, but no further improvement of the mobility. All this might attribute to the higher indium content, but we still don’t have any proof in this part.
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3-3 Mechanism determination and analysis of Si-capped a-IGZO TFT
In the previous experiment, the saturation mobility (μsat) could rise up to 5~10 times when Si capping half of the channel length on the middle of back interface. If we count the capped part of a-IGZO film as totally conductive, which could be taken as a short channel, the recounted μsat still reaches to 20~50 cm2/Vs of the uncapped part. Therefore, it’s reasonable to suspect that the Si capping layer has influence on not only the right under part of the film but also the side part. We hence set several experiences to investigate the uncertain affected length of side. And for the possible mechanism of the increasing carrier density, XPS analysis was used to examine whether the main cause is due to excess oxygen vacancy.
3-3.1 Dependency of different Si-capped length and position on a-IGZO TFT
We would separate the experiment into two parts to discus.
In the first part, the Si capping layer was fixed right in the middle of the channel but modulate the total capping length as well as the channel length. In Fig. 3.14, we define a new parameter, μuc, to represent the recounted mobility for the uncapped part. The shadow mask-designed capping length to channel length (Lcap/L) is 150/200, 150/300, 300/400, and 300/500 (μm), respectively. However, with the help of microscope we found that the real length of Si layer was always larger than the defined one. To precisely calculate theμuc, digital camera is used and the photos of the top view are shown in Fig. 3.15. The transfer characteristics and detail parameters are list in Fig. 3.16 and Table. 3.4. However, in some cases the drain current begins to be suppressed at certain values (ex: 10-2 A for channel length
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200μm with capping length 150μm). This phenomenon appears only when we get a large drain current (induced by the Si capping layer), and from the ID-VDS curve in Fig. 3.17 the larger VGS brings to almost total linear region comparing with the smaller drain current one.
This could be explained by multi channels. The turn on voltage would be negative when we get a large on current, which indicate thatthe back channel first appears when the device starts to turn on. With increasing VGS, the drain current increases rapidly attribute to both front and back channel until reaching certain values (VC). Then the carriers wouldn’t increase anymore in the back channel but only in the front channel which contributes to the drain current. The band diagram in Fig. 3.18 could make a clear illustration.
The second part we placed the Si capping layer right at the side of the channel. Here we added more conditions of the length varieties. The shadow mask-designed capping length to channel length (Lcap/L) is (100, 125, 150, 175)/200, (100, 150, 200, 250)/300, (200, 250, 300, 350)/400, and (300, 350, 400 ,450)/500 (μm), respectively. Fig. 3.19 shows the top view diagram, and in this plot the drain is on the left hand side. Here we also take the real photos of the top view in Fig. 3.20, and the transfer characteristics and detail parameters are list in Fig.
3.21 and Table. 3.5, where μuc is obtained using the real length. From the experiment data above, the influence of Si capping layer could expand to within 100μm to the side. When the Si was capped on the source side, the transfer characteristics presented to a quit different behavior. We could see from Fig. 3.22 and Table. 3.6, the on current of large VDS is much larger with no differences between two threshold voltage values when Si capping layer leans against drain side. But when we apply smaller VDS like 0.1 V or 1 V, the on current and the calculated field effect mobility are almost the same of these two. From the standard field effect transistor theory, the higher VDS would form stronger depletion, but the excess carriers near drain side make it hard to deplete. Therefore, at the same VGS the drain current could reach higher until pinch-off, which means the saturation current would also be higher at the
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same VDS. It is matched with the ID-VDS curve in Fig. 3.23, and the diagrams in Fig. 3.24 could help to understand.
3-3.2 XPS analysis of Si-capped device
Finally, XPS analysis is used to survey the variation of oxygen vacancy caused by Si capping. Fig. 3.25 (a) shows the depth profile diagram of XPS. There are three phases in our definition which based on the atomic concentration variation of O1s、Zn2p3、Ga2p3 and In3d5 as a function of sputtering time, and all is shown in Fig. 3.25 (b). The XPS spectrum of O1s with different depth is shown in Fig. 3.26. The Si capping layer region is from 0 to 1.6 min and the Si/IGZO interface region is from 1.6 to 2.3 min. After the etching time over 2.3min is the IGZO bulk layer.
The O1s XPS spectrum can be fitted by three peaks. For adjustment, the C 1s at 284.6eV is used as the reference to calibrate the energy positions of all detected peaks. The peak with the lower energy value of 530.30 eV, represents O2- ions combined with Zn, Ga, and In ions, in the IGZO compound system. The medium binding energy value at 531.15 eV, is associated with O 2-ions which are in oxygen vacancy reg2-ions within the IGZO films. The higher binding energy value of 532.40 eV, is related to loosely bonded oxygen on the IGZO surface, including absorbed H2O, CO3, or O2. Analysis for bottom gate a-IGZO with Si capping layer with etching time 1.6, 1.8, 2, 2.3 and 3.5 min and without Si capping layer (STD) are shown in Fig. 3.27 (a), (b), (c), (d), (e), and (f), respectively. The peak fitting function is Voigt area, and a linear base line is used. We observed the content of oxygen vacancy of IGZO without any treatment is almost the same with Si capping layer of IGZO films at 3.5-min etching time from O1s XPS spectra analysis. Hence, we can make sure the criteria of IGZO films are identical. Therefore, the oxygen vacancy becomes richer at the IGZO surface due to Si capping layer from a series of
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O1s XPS spectra. The area ratio of OM 1s peak, OL 1s peak, and OM 1s peak to OL 1s peak and OM 1s peak ( OM / (OL +OM ) ), is shown in Table 3.6.
In addition, Fig. 3.28 shows the XPS spectra of In3d5 with etching time 1.6, 1.8, 2, 2.3, 2.6, 3.5 min and STD. The lower binding energy corresponds to the In0 bonding state of In-In Bonds, and the higher binding energy corresponds to the In3+ bonding state of In2O3. Hence, near the Si/IGZO interface the In shifts to lower binding energy, which indicates the higher conductivity within this region.
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Fig. 3.1 (a) The transfer characteristics of capping SiOx BG-STD TFTs. (b) and (c) is cross section and top view of device diagram.
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All the
thickness
of capping layer is 20nmCapped
Fig. 3.2 The transfer characteristics and cross section of device diagram of BG-STD TFT with capping different oxygen ratio layer, and typical parameters of TFT with capping
different oxygen ratio layer.
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Fig. 3.3 The transfer characteristics of (a) undoped, (b) p-doped and (c) n-doped Si-capped device.
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Fig. 3.4 The variation of threshold voltage and mobility of (a) undoped, (b) p-doped and (c) n-doped Si-capped device during 30 days.
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Table. 3.1 The extracted parameters of a-IGZO TFTs with different Si capping layers.
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Fig. 3.5 Transfer characteristics of Si capped devices with various a-IGZO thicknesses.
The inset shows the initial transfer characteristics of uncapped devices with various a-IGZO thicknesses.
Table. 3.2 Extracted parameters for standard (in parentheses) and Si-capped devices with various a-IGZO thicknesses.
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Fig. 3.6 Transfer characteristics of (a) STD without annealing before capping Si and (b) STD with annealing before capping Si. Both Si-capped devices are treated with post
annealing when stable.
Fig. 3.7 Transfer characteristics of (a) old_STD and (b) Si-capped device during positive bias stress. The inset shows the negative bias stress.
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Fig. 3.8 Transfer characteristics with photoresist (left) and SiOx (right) passivation layer of (a) STD and (b) Si-capped device during positive bias stress. The inset shows the
negative bias stress.
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Fig. 3.9 Threshold voltage shift of (a) STD and (b) Si-capped device with and without passivation layer during bias stress.
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Fig. 3.10 Transfer characteristics of a-IGZO/IZO co-sputtered film with IGZO fixed 100W and IZO (a) 50W and (b) 70W and 100W with different oxygen gas ratios.
Table. 3.3 Extracted parameters for a-IGZO/IZO co-sputtered devices with various powers and oxygen gas ratios.
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Fig. 3.11 (a) Transfer characteristics and (b) threshold voltage shift of a-IGZO/IZO co-sputtered device during positive bias stress and negative bias stress.
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Fig. 3.12 The transfer characteristics of a-IGZO/IZO co-sputtered device with Si capping layer.
Fig. 3.13 The variation of threshold voltage and mobility of a-IGZO/IZO co-sputtered device with Si capping layer during about 30 days
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Fig. 3.14 Top view and definition of μuc and other parameters with Si capping layer in the middle.
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Fig. 3.15 Top view in real photos and measured length of all parameters. The ratio of uncapped length to channel length (a) 29/202 (b) 121/302 (c) 83/326 and (d) 154/502.
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Fig. 3.16 The transfer characteristics of different ratios of uncapped length to channel length with Si capping layer in the middle (a) 29/202 (b) 121/302 (c) 83/326 and (d) 154/502. The inset is (ID)0.5 on the left side for saturation region and gm on the right side
for linear region.
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Table. 3.4 Extracted parameters for different ratios of uncapped length to channel length of a-IGZO devices with Si capping layer in the middle.
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Fig. 3.17 The transfer characteristics and ID-VD curves of (a) high on current (b) normal on current Si capped devices.
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Fig. 3.18 The band diagram to explain the suppressed on current at high gate voltage.
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Fig. 3.19 Top view and definition of μuc and other parameters with Si capping layer closed to drain.
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Fig. 3.20 Top view in real photos and measured length of all parameters with Si capping layer closed to drain.
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Fig. 3.21 The transfer characteristics of different ratios of uncapped length to channel length with Si capping layer closed to drain. The inset shows the (ID)0.5 for saturation
region.
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Table. 3.5 Extracted parameters for different ratios of uncapped length to channel length of a-IGZO devices with Si capping layer closed to the drain side.
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Fig. 3.22 The transfer characteristics of Si-capped devices with different positions (close to drain or source) and applied drain voltages for (a) VD = 20 V (b) VD = 1V and (c) VD =
0.1 V. The inset is (ID)0.5 for saturation region and gm for linear region.
Table. 3.6 Extracted parameters of Si-capped devices with different positions (close to drain or source) and applied drain voltages.
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Fig. 3.23 (a) The transfer characteristics and (b), (c) the ID-VD curves of Si-capped devices with different positions (close to drain or source).
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Fig. 3.24 The schematic cross-section and mechanism of the a-IGZO TFT with Si
Fig. 3.24 The schematic cross-section and mechanism of the a-IGZO TFT with Si