. The fo
e electrical performance under multi-strain tatus after first-time bending.
G D
DS
Chapter 3
3-1. Electrical Performance under Different Mechanical Strain
As mentioned before, we found that the first-time mechanical strain will induce a irreversible degrading effect on flexible a-Si TFT sample
llowing contents will focus on the first-time bending effect first.
In realistic living application, because the flexible TFT must be operated under repeatable mechanical strain, the second part of our experiments is to investigate th
s
3-1-1. Bending processes on flexible a-Si:H TFTs
Fig.3-1. shows the V -I transfer curves of the flexible a-Si TFTs before the first-time bending. The channel size is 24um in width and 16um in length. The off current is ~5 x 10-13 A , the on-off current ratio >
107, the threshold voltage ~6 V, and the subthreshold slope ~0.76 V/decade. The electron linear mobility, calculated from the transfer characteristic for drain-to-source voltage V = 1 V, is ~0.55 cm2/Vs.
Inward cylindrical bending produces compression, by definition negative, and outward bending tension, positive. By repeating the flat-bending-reflatten process for several times, we get a TFT threshold voltage degradation diagram Fig.3-2. The error bar in Fig.3-2 represents the data range because we have more than one experiment data showing this kind of trend and the solid points are the average values of all data
urs
discussion about these
we calculate the strain ε under bending from the formula [3.1] given by
collection. From this figure, we could obviously find that the threshold voltage shifted most seriously when our device was under mechanical strain for the first time, and didn’t recover to the initial performance for a period of time (We had transfer characteristics measured after 72 ho later and showed it still couldn’t get back to the initial performance).
In compression of first-time bending effect, our initial flexible a-Si TFT sample were bent to two kinds of bending method, tensile strain Rp = 10mm and compressive stress Rn = 10mm. Fig.3-3. shows the transfer characteristics with VD = 13V respectively. We first applied tensile strain and observed a slight increase in the threshold voltage, and then found there was more seriously shift in threshold voltage when applied compressive strain. We will have more detailed
phenomenons in the following section.
Fig. 3-4, Fig. 3-5, Fig 3-6 shows the relative mobility, threshold voltage, and sub-threshold swing as a function of strain extracting from the same TFT device after the sample is bent time after time. To compare the data from the bending and stretching experiments,
(1 2 2)
ore serious decrease
ese degrading effects under mechanical strain in the next
draw this conclusion with ervations as some previous reports [3.2].
tance, under mechanical strain has not been precisely discus
mobility (Flat condition). It shows that the mobility will have a decreasing trend both under tensile strain and compressive strain.
Obviously the compressive strain stress will cause m on mobility than the tensile one [3.2].
Fig. 3-5 shows the relative threshold voltage VTH/VTH0, where VTH is the threshold voltage at a given strain and VTH0 is the initial threshold voltage. The greatest increasing ratio of VTH shift is almost 17% when the flexible a-Si TFT is under compressive strain of ~ -0.00187 (R = -50mm).
Similar to the phenomenon observed in mobility change, we could find the VTH degradation existing in both tensile and compressive strain. We will discuss th
section 3-1-3.
Fig. 3-6 indicates the relative sub-threshold swing SS/SS0, where SS is the sub-threshold swing at a given strain and SS0 is the initial swing.
While there is a clear trend in μ/μ0 and VTH/VTH0 as a function of strain, the spread in SS/SS0 seems more disorderly. Roughly, the value SS will increase with the applied strain, but we
res
3-1-2. Analysis of Parasitical Resistance Extraction
Form previous reports, the parasitical resistance might be one factor of change on a-Si TFT transfer characteristics. However, the effect of the parasitical resis
sed yet.
The total resistance for the ON resistance, Rtotal, extracted from the VD-ID curves, is consisted of channel resistance Rch and parasitical
p. The parasitical resistance is estimated by the following
e channel length. From linear region drain current equation, we could get
, where Rp0 is the intrinsic parasitical resistance independent of electric fields and L+L0 is defined as effectiv
( )
, there are two different channel length sizes, A and B respectively. And
∂ = (3-5)
If under the same VG
total p
R A=R +AK
(3-6)
= +
ere is no great change for Rp when the sample
ere is an identical value of L0 between flat
oltage under mechanical strain is dependent of parasitical resistance.
3-1-3.
ide range of energies because of the resistance under mechanical strain. The first step of extracting Rp is shown in Fig.3-7. Clearly th
is under mechanical strain.
Having estimated the total Rp, we proceed to find the intrinsic Rp0 which is independent of gate voltage. As can be seen from Eqn.(3-1), (3-2), (3-3), the measured resistance for the TFT is linear function of L.
Therefore, based on the method used bt Terada and Muta [3.3], and Chern at al. [3.4], a plot of RonW as a function of channel length L for different values of VG maybe used to extract L0. Fig.3-8. illustrates this for TFT remaining flat and under mechanical strain. As can seen, the curves for different applied voltages have an intercept point with x-axis coordinates (L0). It should be noticed that th
condition and strain condition.
Summarizing all the results above, we make a conclusion that the degradation mechanism of threshold v
in
Analysis of Activation Energy Extraction
As mentioned in introduction, the localized states in the amorphous silicon can be divided into two types, tail states and deep states as the Fig.
3-9. The tail states are the Si conduction band states broadened and localized by the disorder to form a “tail” of localized states just below the conduction band mobility edge. The deep states originate from defects in the amorphous silicon network. These are thought to mostly consist of Si dangling bonds, which have a w
variations in local environments.
VG above VTH, VG between zero point and VTH, VG below
, the mobility decreases as the results we measured before in Fig. 3
By changing the measuring temperature [3.5-3.6], we have extracted the activation energy under Rp = 10mm and Rn = -10mm to investigate the degradation phenomenon. Fig. 3-10 shows the activation energy (EA) as a function of VG in three conditions. The thick solid line indicates the VTH for this TFT device. We divide the total EA illustration into three regions:
zero point.
The region for VG above VTH relates to the “ON “state for a-Si TFT and the acceptor-like tail state, which is the dominant region for the mobility. Firstly, as shown in Fig.3-10 the EA of the a-Si TFT in this region under tensile and compressive strain are both larger than the flattened condition. Additionally, the compressive strain status has the largest EA. These trends indicate that there are larger densities of states (DOS) in acceptor-like tail state when sample is under mechanical strain.
Therefore -4.
The region relating to VG between zero point and VTH represents the forward sub-threshold region, where the deep state in acceptor-like states. For VG below zero point, TFTs operated region start from reverse sub-threshold region to the well known Poole-Frenkel region, both relate
e made for threshold voltage degradation under echanical strain before.
and source terminals remain
mpr
specifically, we can find the region for VG < 0 has the greater EA decreasing value than the region between 0 to VTH. If we transfer EA to DOS parameter, we will obtain a result just as Fig. 3-11. The solid line represents the initial state for flatten status while the dotted line represents the condition under mechanical strain. Clearly Ei will shift left when applied strain on flexible a-Si TFT. Therefore, there is larger range between EC to Ei, which means more charges needed to fit in the deep states, and so the threshold voltage will increase. Again the EA analysis supports the conclusion w
m
3-1-4. Reliability Investigations of Gate DC Bias Stress
The gate-bias voltage was set to 40V to keep the TFT channel forming in the a-Si layer. The drain
grounded during all the reliability tests.
For most of the reliability researching papers, the metastability of threshold voltage is what people always focus on. Fig. 3-12 shows the Vth shift curves of the TFTs of the flexible a-Si TFT before and after 10000 seconds of gate voltage 40V DC stress with different status including flat、tensile (co essive) strain at room temperature、tensile (compressive) strain at 50℃、and reflatten conditions. It is observed that threshold voltage serious depends on the applied mechanical strain. When the TFT sample is under no matter outward (tensile) or inward (compressive) bending, there is much more degradation of VTH shift than flat condition. For the reflatten condition curve it could tell us that the
us. This result verifies the
s defect state creation during our ga
sample didn’t recover to the initial stat conclusion we made in section 3-1-1 again.
From the previous sections, the most important instability mechanisms for a-Si TFTs under prolonged gate stress are charge trapping and defect creation. Usually the degradation behavior is identified as the combination of both effects, but one mechanism mainly dominates. From Fig. 3-13, we can observe the obvious power-law time dependence of positive VTH shift. This phenomenon shows the first step that we predict the defect states creation is the dominant instability mechanism of our gate DC bias stress experiment. As mentioned before, the defect state creation is strongly affected by the temperature. From Fig 3-13, clearly the variation of VTH curve shifts much more seriously when the temperature is 50 than 25 under mechanical strain. The second ℃ ℃ step for identification of instability mechanism is done. We could now make a conclusion that the dominant instability mechanism under mechanical strain for the flexible a-Si TFT i
te voltage DC bias stress experiment.
From the theory of defect pool model [3.7], the rate of defect creation is a function of the barrier to defect formation, the number of carriers in the tail states, and the density of the weak bond sites. It has
gree of interior disorder than tension gain via reliability investigation.
the re-flatten result was so similar to bending one.
After the first-time bending reliability analysis, we now proceed to investigate the reliability for different strain status. The radii of cylindrical bending we use for VG stress tests are Rp = 10mm, 30mm, and 50mm, Rn = -10mm, -30mm, and -50mm. Fig. 3-14 and Fig. 3-15 show the threshold voltage shift under compressive strain (Rn) and tensile strain (Rp) respectively. First, there is an obvious trend that the degradation of threshold voltage is more serious under larger strain whether compression or tension. This result also accords with the prediction we made in first-time bending test. And then from Fig. 3-14 and Fig. 3-15, we can find that there is an instant threshold voltage shift when Rn = -50mm strain is applied. Comparing with Rp = 50mm, it seems no such large threshold voltage degradation. We make a conclusion that the compression will cause more de
a
3-2. I
ct of capping silicon nitride (SiNx) passivation under 190℃ PECVD.
crease the density of defect tates during depositing SiNx layer process.
nfluence of Nitride Layer Capping on TFTs
The following contents include all the results of electrical performance analysis and reliability tests for the effe
3-2-1. Effect of Passivation on flexible a-Si:H TFTs
Fig. 3-16 showed comparison of the ID-VG figure operated under VD = 10V of the flexible TFTs with and without passivating layer, and pre-annealing and the post-annealing. Clearly 190℃SiNx passivatng process will improve our flexible a-Si TFT as well as the traditional high temperature passivating process. The mobility increased from 0.31 to 0.33 cm2/Vs, VTH shifted from 9.5 to 7.3 volts, and SS decrease from 1.76 to 1.55 V/decade. From the result, we conjecture that hydrogen will have a passivating effect on dangling bonds and de
s
3-2-2. Reliability Comparison of TFTs under Strain
In order to investigate the reliability issue of passivating nitride at
have an obvious improvement after 190℃ SiNx capping process.
Combining the results of 3-2-1 and 3-2-2, we successfully affirm that capping SiNx at 190℃ has the same effect for improving a-Si TFT device characteristics as industrial 300~350 ℃ SiNx deposition temperature.
3-2-3. Post-Annealing Effect on Passivated a-Si:H TFTs
As mention before, we try to follow the same post-annealing process as the standard a-Si TFT fabrication in industry but reduce the annealing temperature to 190℃ in order to match our low temperature flexible a-Si TFT fabrication.
From Fig. 3-16 again, we can observe the additional improved transfer curve after 190℃ thermal annealing for 60 minutes. Comparing with the sample only passivated, the mobility increased from 0.33 to 0.35 cm2/Vs, VTH shifted from 7.3 to 6.6 volts, and SS decrease from 1.55 to 1.51. The behavior of the electrical performance of flexible a-Si TFTs after post-annealing treatment is similar to the effect of thermal enhanced diffusion (TED). With the thermal effect, the hydrogen will diffuse into the active layer for mending the dangling bonds and defect states, and improve the electrical performance.
Fig. 3-19 shows the threshold voltage shift under three different conditions, including flat, tensile, and compressive status comparing the sample with and without post-annealing process. It clearly indicates the reliability improving again after 190℃ annealing in atmospheric anneal
furnace 60 minutes. The results of reliability tests also support our argument for hydrogen diffusion under thermal influence.
Fig. 3-1
The basic transfer curves of a flexible a-Si TFT on stainless steel foil, showing the 5 different VD operated condition.
V
G5 6 7 8 9 10 11
Vth
1 2 3 4 5 6 7
Fig. 3-2
The diagram shows the threshold voltage shift caused by repeating
Fig. 3-3
Transfer characteristics for flexible a-Si TFTs strained under tensile radius of 10mm and compressive radius of 10mm.
VG
0.6 0.8 1.0 1.2 1.4
Fig. 3-4
The relative mobility as a function of strain.
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3
μ/ μ o
(ε*10
2)
Compressive
Mobility
Tensile
0.6 0.8 1.0 1.2 1.4
Fig. 3-5
The relative threshold voltage as a function of strain.
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3
V TH / V THo
Tensile Compressive
Vth
(ε*10
2)
0.6 0.8 1.0 1.2 1.4
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3
SS/ SS o
(ε*10
2)
Tensile
SS
Compressive
(MΩ)
RpW
VG RpW
0 2 4 6 8 10 12 14 16 18
Fig. 3-7
The parasitical resistance under two conditions shows as a function of gate voltage. The two curves almost matching indicates that there is no great change for Rp under mechanical strain.
Flatten Under Bending
5 10 15 20 25 30 35 40
(Volts)
RON‧W (Ω‧cm) x 105