The system performance including data read and memory movement is listed in Table 8 and around 50% power is wasted in system I/O and task switching. However, it is necessary, because the ARM core is running under Linux OS, and each process must be handled by the scheduler. There are a lot of exceptions, such as CF card I/O, TCP/IP interrupt, and etc., such that the DSP program is affected in these cases.
Table 8 System performance of the proposed encoder
Test Sequences Claire Foreman News Suzie
Simulated Cycles 16,567,209 25,535,516 16,966,072 21,223,767
FPS 5.5 4.9 5.4 5.2
In Table 9 , the performance of PSNR is better than the architecture executed on the ADI BF561, but the needed cycles are more than it. The Blackfin is the world’s first family of DSPs to integrate the high-performance Micro Signal Architecture (MSA) jointly developed by Intel Corporation and Analog Devices. The Blackfin core features a dual datapath modified Harvard architecture and is optimized for both DSP and micro-controller functions. By the report from BDTI (listed in [27]) the C55 DSP is a power efficient DSP, its speed performance is lower than the ADI Blackfin BF5xx series.
Table 9 Comparison of PSNR measured in dB
Test Sequences Claire Foreman News Suzie
96 Kbps 44.39 33.90 44.89 38.83
Table 10 Comparison of computation time measured in cycles
Test Sequences Claire Foreman News Suzie
Proposed 16,567,209 25,535,516 16,966,072 21,223,767 Kant[26] 2,550,000 3,600,000 2,580,000 3,170,000
Table 11 Comparison of adjusted computation time measured in cycles
Test Sequences Claire Foreman News Suzie
Proposed 3,084,110 4,753,628 3,158,361 3,950,963 Kant[26] 2,550,000 3,600,000 2,580,000 3,170,000
From the BDTI’s report, the C55x DSP gets scores in range of 780 to 1460, and the ADI Blackfin gets scores in range of 1680 to 4190. If the Kant’s performance is scaled with the BDTI’s report as illustrated in Table 11, the proposed performance is close to theirs but gets better quality measured in PSNR. Therefore, this comparison shows the proposed encoder has good picture quality and efficient processing speed.
6 6 Conclusion
In this thesis, optimization techniques employed to reduce the computational complexity of modules are grouped into two categories: platform-independent algorithmic optimizations, platform-based DSP-enhanced optimizations and platform-based memory optimizations.
Algorithms are modified in high level language. Apart from implementing optimal algorithms, optimization techniques like loop unrolling, loop distribution and loop interchange are used.
Algorithmic optimizations are platform independent and can be used on any platform. In system view, a lot of platform-based optimizations are performed for implementation of H.264 encoder. The data is moved in an efficient way. Due to the dual-core feature, much time is saved in parallel processing.
H.264 achieves the best-ever compression efficiency[28] for a broad range of applications, such as broadcast, DVD, video conferencing, video-on-demand, streaming and multimedia messaging. And true to its advanced design, H.264 delivers excellent quality across a wide operating range, from 3G to HD and everything in between. Whether you need high-quality video for your mobile phone, iChat, internet streaming, broadcast or satellite delivery, H.264 provides exceptional performance at impressively low data rates. This thesis summarizes dual-core implementation of H.264 encoder on OMAP5912. The implementation is well suited for videophone, and network streaming applications. The DSP core can perform encoding while other can process network message as well as store the encoded H.264 stream in local host. The optimization techniques presented in the present thesis can be effectively used for other programmable processors with similar architecture and instruction set.
7 7 Bibliography
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