• 沒有找到結果。

Here are some snapshots of running the tools and the graph that the tool will report. The power profiler takes normal SPICE netlist with some additional information including

1. A flag on the input voltage source that indicates it is a primary input.

2. The signal probability and the transition density of each primary input.

3. Option VDD for the definition of logic-1, (logic-0 is default grounded).

Input Statistics

Population

Stratification

Stratum 1 Stratum 2

… …

Stratum n

Profile 1 Profile 2

… …

Profile n SPICE simulation for power consumption

Measure Power Sensitivities No

Get the POST for all inputs

BMC convergence check passed?

5. Option SLEW for the definition of the slew rate of the signal transitions.

6. Option MONTE for turning on and off the Monte Carlo convergence criterion.

7. Option BOOTSTRAP for turning on and off the Bootstrap convergence criterion.

8. Option STRAT for turning on and off the stratification flow.

After setting up the netlist with the additional information, a simple command that evokes the power profiler as:

PowerPro SPICE_NETLIST_FILE

And the messages on the screen are depicted in Figure 18:

Figure 18: Screen log of power profiler

There is also a pop up window that plot the profile of the power consumption distribution shown in Figure 19.

(a)

(b)

Figure 19: Power profile from power profiler

In Figure 19 (a), the stratification flow is not turned on. Therefore, the profile obtained from the profiler contains only one stratum. However, the power consumption distribution looks more like a bimodal distribution as in Figure 19 (b). In Figure 19 (b), the proposed automatic stratification flow has successfully stratified the population into two strata, and captured the bimodal nature of the distribution by showing the distribution with two normal distributions

4.7 Summary

In this chapter, a novel definition POST was proposed for defining the input transitions that tend to induce higher power consumption. Furthermore, the POST is utilized for stratifying the input sequence with unlimited length so that the average power within each stratum can be accurately and efficiently estimated. This new stratification method with POST was also implemented in the most accurate simulator SPICE. A fully automated flow for calculating the profile of the power consumption distribution was also implemented.

Although we have put a lot of effort in implementation, there are still some improvements that can be done to make it more complete and solid. The power profiler at current stage targets combinational circuit only because sequential circuits are not suitable for vector sampling due to the high temporal correlation between the input vectors. Besides, PowerPro is implemented for synchronous circuits because there is no clear definition of the power corresponding to one input vector for asynchronous circuits.

5 Conclusion and Future Work

In this dissertation, the definition of power sensitivities was examined and proposed a method of selecting the nominal points for measuring the power sensitivities to increase the accuracy was prposed. With the knowledge of the meaning of power sensitivities, it is was utilized for the stratification of input vector sampling for simulation based power estimation. The Bootstrap Monte Carlo approached was proposed to improve the reliability of Monte Carlo simulation by calculating the confidence interval more accurately with the Bootstrap resampling technique. Since the power sensitivities measurement can be updated dynamically when simulating the sampled input vectors, the stratification process can be performed repeatedly whenever the power sensitivities are updated. Stratification with power sensitivities sum of each input vector is good for reducing the sample variances, although the calculating and sorting of the power sensitivities sums of the input vectors may be too complex when the input sequence is very long or even infinite. Therefore, a novel definition POST was proposed to define the transitions of inputs that tend to induce higher power consumption of the circuit. A heuristic stratification method based on POST was also proposed to reduce the number of sampled vectors required so that the power consumption distribution can be accurately and efficiently plotted. Both stratification and power estimation flow in this dissertation were implemented in the most accurate SPICE3 simulation engine from Berkeley. Users can get a visual image of the distribution of the power consumptions by specifying the primary input pins and their signal probabilities and transition densities. The theories and algorithms that are used or proposed in this dissertation are all demonstrated in the most practical and useful way through the implementation.

To sum up, power estimation is rather a measurement for further analysis than a number for meeting the specification. Here are some extensions that can be done on the platform of this dissertation.

Worst Case Sequence Generation

The worst case power consumption can be determined by finding one and only one input vector which induces the largest power consumption. However, defining the worst case power consumption with only one input vector could be too pessimistic and lost the generality. After stratifying the population with POST, the sub-population that expected to have the largest power consumption can be easily identified. It can also be used for the identification of the worst case operating mode of the circuit. A worst case input sequence will be able to be generated from the sub-population as well.

Reliability Analysis

Electromigration rules limit the average current densities that are allowed to flow in the metal segments in different layers. With the estimated power consumption, designers can check the electromigration rules for each metal segment. By changing the measurement scheme from power dissipation to sub-circuit port currents, the full chip IR drop analysis can also be implemented on the platform proposed in this dissertation.

Full Chip Temperature Profiling

With the estimated power dissipation of the sub-circuits, the temperature profile can be obtained by analyzing the positions of the heat sources and the efficiencies of the heat conduction paths. The spot that has potential heat problem can be identified for designer to rearrange the placement around hot spot.

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