Stochastic Fine-tuning Stage - 使用敏捷式基因探勘與隨機最佳化來改善類比電路合成的效率

Here we implement overall hierarchical mapping frameworks as follows:

1. Suman et al. in [19], a multi-objective simulated annealing method.

2. Meng et al. in [16], an exhaustive performance exploration method with a basic stochastic circuit simulation.

3. GAP₂₅₆, a master-slave genetic algorithm based performance exploration with total population size of 256 and 8 number of threads plus probabilistic

stochas-(a) Population distribution via GA₂₅₆ (b) Population distribution via GA₂₅₆

(e) Population distribution via PGA256 (f) Population distribution via PGA256

Figure 4.1: Population distribution of the RFDA design instance using UMC65nm after genetic exploration. (a), (c) and (e) are plotted with respect to coordinates of PDC, Pout, and Av. (b), (d) and (f) are plotted with respect to coordinates of PDC, fcent and BW.

(a) Population distribution via GA₂₅₆ (b) Population distribution via GA₂₅₆

(e) Population distribution via PGA256 (f) Population distribution via PGA256

Figure 4.2: Population distribution of the Op-Amp design instance using UMC65nm after genetic exploration. (a), (c) and (e) are plotted with respect to coordinates of PDC, Pout, and Av. (b), (d) and (f) are plotted with respect to coordinates of PDC, fcent and BW.

(a) Population distribution via GA256 (b) Population distribution via GA256

(e) Population distribution via PGA120 (f) Population distribution via PGA256

Figure 4.3: Population distribution of the Op-Amp design instance using UMC90nm after genetic exploration. (a), (c) and (e) are plotted with respect to coordinates of PDC, Pout, and Av. (b), (d) and (f) are plotted with respect to coordinates of PDC, fcent and BW

(a) Population distribution via GA₂₅₆ (b) Population distribution via GA₂₅₆

(e) Population distribution via PGA256 (f) Population distribution via PGA256

Figure 4.4: Population distribution of the Op-Amp design instance using TSMC90nm after genetic exploration. (a), (c) and (e) are plotted with respect to coordinates of PDC, Pout, and Av. (b), (d) and (f) are plotted with respect to coordinates of PDC, fcent and BW

tic circuit simulation framework.

4. PGAP120, a multi-objective parallel genetic algorithm based performance exploration with total population size of 120 and 5 number of threads plus probabilistic stochastic circuit simulation framework.

5. PGANP₁₂₀, a multi-objective parallel genetic algorithm based performance exploration with total population size of 120 and 5 number of threads plus basic stochastic circuit simulation framework.

6. PGAP₂₅₆, a multi-objective parallel genetic algorithm based performance exploration with total population size of 256 and 5 number of threads plus probabilistic stochastic circuit simulation framework.

7. PGANP₂₅₆, a multi-objective parallel genetic algorithm based performance exploration with total population size of 256 and 5 number of threads plus basic stochastic circuit simulation framework.

Table 4.4 shows the comparison among above frameworks for analog circuit syn-thesis. By definition, parallel GA can search the limitation of performance met-rics and also find the performance Pareto-fronts with particular populations. Since genetic algorithm has ability to traverse different combination with crossover and mutation wisely, our approach can collect a bunch of potential spec combinations as a population, and transfer them to re-target back to the desired design vari-ables. Not only obtaining a good initial performance metric population is impor-tant, also a design equation which can precisely sketch out the circuit characteristic is necessary. However, we tend to keep the stochastic simulation for a final search, but also using an evolutionary methodology to reduce the convergent resource. As we can see, GAP₂₅₆ already earns runtime improvement at RFDA, umc65-OPAmp, umc90-OpAmp and tsmc90-Opamp with 398% , 227%, 174% and 224%

than the exhaustive performance exploration method way respectively. Moreover, the PGAP₁₂₀ earns even better quality by simultaneously explore the performance space with 617%, 568%, 427% and 419% than [16] respectively. When increase pop-ulation size and with migration each sub-poppop-ulation in parallel GA based perfor-mance exploration, PGAP₁₂₀ still earns runtime at umc65-RFDA, umc65-OPAmp, umc90-OpAmp and tsmc90-Opamp with 330% , 161%, 190% and 186% than [16].

The runtime report from each GA-based experiment shows the good quality in effi-ciency.

For the target performance result, in umc 65nm RDFA, all performance require-ments have better quality than the exhaustive way and [19]. GAP₁₂₀ explores the unprecedented results on BW and P_out, while PGAP₁₂₀ has obvious improvement on A_vand F_cent. On first umc65 folded cascode Op-Amp, although [16] has good quality on A_v and BW , the P M and P_out are sacrificed. GAP₂₅₆ and PGAP₁₂₀ have good performance than [19] except P M . On the other hands, GAP256 and PGAP120come to the quality on each performance target. We can tell that genetic-algorithm based approach can balance the multi-objective optimization via evolution. For umc90-Opamp case, [16] generated the results far from optimal region with A_v and BW to earn the better output power P_out. Although [19] has better quality on P dc and P out, but Av, BW and P M greater than [19]. As well as the tsmc90-Opamp case, A_v, P_dc and P M are poor while such approach searched into optimal region of P_out and BW . The quality for exhaustive methodology is uncertain and time-consuming.

On the contrary, as the lower part of Table 4.4, GAP₂₅₆ successfully searches the op-timal region of all target performances than [16] and has better performance on BW and P M than [19]. Moreover, PGAP₁₂₀ reaches the better quality on A_v, P_dc and P_out for umc90-Opamp case respectively than [16]. Likewise, PGAP₁₂₀ also explores new limitation for A_v, P_dc and P M at tsmc90-OpAmp as different technology im-plementation. As a result, the exhaustive approach for performance exploration and

MOSA method needs more timing resource to explore the Pareto-fronts but the un-certainty is indispensable. In contrast, the parallel genetic-algorithm based approach for performance exploration with the probabilistic stochastic simulation resolves the problem efficiently and effectively, although the population size of PGAP₁₂₀ is less than the population size of GAP₂₅₆.

For the comparison among non-uniform stochastic simulation and uniform dis-tribution based stochastic simulation, in umc 65nm RFDA, no matter whether PGANP₁₂₀ and PGANP₂₅₆, all performance have worse quality than PGAP₁₂₀ or PGAP₂₅₆. In Op-Amp, all of the non-uniform stochastic simulation have better BW , but the Av, P dc, P M and P_out are sacrificed. In general, the normal distribu-tion based stochastic simuladistribu-tion has better quality than uniform distribudistribu-tion based SA simulation.

Table 4.4 also shows the performance results among different population size with parallel GA implementation. In umc 65nm RFDA, all the performance have obvious improvement except Av. On umc 65nm cascade Amp and umc 90nm cacode Op-Amp, although PGAP₁₂₀ has good quality on A_v, P dc and P M , the P dc and P_out are sacrificed. In tsmc 90nm cascode Op-Amp, PGAP256leads better quality on each performance target except Av. As a while, large size of population shows trade-off between effective on performance exploration and computing efficiency.

Table 4.4: The performance exploration results for RFDA and Op-Amp circuit with umc 65nm, umc 90nm and tsmc 90nm technologies on [16], GAP₂₅₆, PGAP₁₂₀, PGANP₁₂₀,PGAP₂₅₆ and PGANP₂₅₆ framework.

RFDA Algorithm Runtime(s) Improv.(%) Av(^v_v) Pdc(µW ) Pout(mW ) Fcent(GHz) BW (GHz)

[16] 38880 - 6.4322 0.23 2.65 9.85 17.48

GAP256 9756.02 398% 7.38 0.175 23.3 20.9 40.2

umc 65nm PGAP120 6300.15 617% 8.505 0.183 18.8 22.5 40.4

PGANP120 - - 1.1843 3.88 1.74 8.95 5.0

PGAP256 11772 330% 6.1852 0.141 28.9 24 42.8

PGANP256 - - 2.2818 11.83 3.43 5.53 10.54

Op-Amp Algorithm Runtime(s) Improv.(%) Av(^v_v) Pdc(µW ) Pout(µW ) BW (M Hz) Phase Margin

[19] 4699 - 42.96 93.75 0.27 97 76.8

[16] 19432 - 45.73 102 0.21 144 45.7

GAP256 8568 227% 44.88 93.76 0.428 102 67.84

umc 65nm PGAP120 3424 568% 44.17 93.94 0.527 102 67.7

PGANP120 - - 43.641 88.652 0.263 57 87.5

PGAP256 12051 161% 43.107 105.5 1.159 114.3 58.7

PGANP256 - - 44.075 88.779 0.3723 57.7 77.9

[19] 6023 - 40.68 90.96 2.64 56 65.56

[16] 15285 - 33.16 95.6 1.72 78.58 65.872

GAP256 8797 174% 44.247 96.36 0.38 111 74.45

umc 90nm PGAP120 3583.6 427% 44.981 95.11 0.763 110 74.4

PGANP120 - - 44.075 88.779 0.37 57.7 77.9

PGAP256 8054 190% 41.785 104.16 2.40 145.3 87.7

PGANP256 - - 45.715 91.732 0.296 85.3 73.7

[19] 17860 - 41.88 89.584 1.39 58 121.5

[16] 19488 - 38.42 111 1.2 284 50

GAP256 8703 224% 40.46 100.1 0.27 100 82

tsmc 90nm PGAP120 4651 419% 45.734 97.75 0.22 129 87.4

PGANP120 - - 39.282 91.1 0.43 64 86.07

PGAP256 10496 186% 40.365 95.5 0.66 114.4 143.56

PGANP256 - - 28.858 87.21 2.90 28.02 91.17

Chapter 5 Conclusion

In this thesis, we have proposed a performance utmost exploration framework for analog synthesis framework with a parallel genetic algorithm based approach to efficiently explore a potential performance space for optimal solution. Unlike exhaustive search the performance space which is time-consuming, this work first transforms the problem set as chromosome and then implements a parallel evo-lutionary algorithm to resolve multi-objective performance optimization. After a re-targeting transformation between performance and design variables, we also im-plement a probabilistic stochastic simulation with respect to the design variable distribution. Our methodology also minimizes time to converge the global optima with accuracy. As demonstration for our methodology, a RFDA circuit and an Op-Amp are practiced via 3 different technologies to show that our proposed per-formance exploration approach and probabilistic stochastic simulation are effective and efficient for analog circuit synthesis.

Bibliography

[1] E. Alba and J. M. Troya. A Survey of Parallel Distributed Genetic Algorithms.

Transaction on Complexity, 4(4):31–52, Mar. 1999.

[2] G. E. P. Box and M. E. Muller. A Note on the Generation of Random Normal Deviates. The Annals of Mathematical Statistics, 29(2):610–611, 1958.

[3] E. Cant-Paz. A Survey of Parallel Genetic Algorithms. Transaction on ILLI-GAL report 97003, 10, May 1997.

[4] P. Conca, G. Nicosia, G. Stracquadanio, and J. Timmis. Nominal-Yield-Area Tradeoff in Automatic Synthesis of Analog Circuits: A Genetic Programming Approach Using Immune-Inspired Operators. In Adaptive Hardware and Sys-tems, 2009. AHS 2009. NASA/ESA Conference on, pages 399–406, 2009.

[5] W. Daems, G. Gielen, and W. Sansen. An Efficient Optimization-Based Tech-nique to Generate Posynomial Performance Models for Analog Integrated Cir-cuits. In Design Automatic Conference, pages 431–436, 2002.

[6] T. Eeckelaert, W. Daems, G. Gielen, and W. Sansen. Generalized Posynomial Performance Modeling. In Design, Automation and Test in Europe Conference and Exhibition, pages 250–255, 2003.

[7] M. Eick and H. E. Graeb. Mars: Matching-Driven Analog Sizing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(8):1145–158, Aug. 2012.

[8] D. E. Goldberg. Genetic Algorithms in Search, Optimization and Machine Learning. Addison-Wesley Longman Publishing Co., Inc., Boston, MA, USA, 1st edition, 1989.

[9] J. Kim, J. Lee, L. Vandenberghe, and C.-K. K. Yang. Techniques for Im-proving the Accuracy of Geometric-Programming Based Analog Circuit Design Optimization. In International Conference on Computer-Aided Design, pages 863–870, 2004.

[10] L. Labrak, T. Tixier, Y. Fellah, and N. Abouchi. A Hybrid Approach for Analog Design Optimisation. In IEEE Transaction on Midwest Symposium on Circuits and Systems, pages 718–721, 2007.

[11] S.-C. Lin, I. Punch, W.F., and E. Goodman. Coarse-Grain Parallel Genetic Algorithms: Categorization and New Approach. In Sixth IEEE Symposium on Parallel and Distributed Processing, 1994. Proceedings, pages 28–37, 1994.

[12] E. Martens and G. Gielen. Top-Down Heterogeneous Synthesis of Analog and Mixed-Signal Systems. In Proceedings of Design, Automation and Test in Eu-rope, pages 1–6, 2006.

[13] P. Maulik, L. Carley, and R. Rutenbar. Integer Programming Based Topology Selection of Cell-Level Analog Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14(4):401–412, Apr. 1995.

[14] T. McConaghy, T. Eeckelaert, and G. Gielen. Caffeine: Template-Free Sym-bolic Model Generation of Analog Circuits via Canonical form Functions and Genetic Programming. In Design, Automation and Test in Europe, volume 2, pages 1082 – 1087, 2005.

[15] T. McConaghy, P. Palmers, G. Gielen, and M. Steyaert. Automated Extraction of Expert Knowledge in Analog Topology Selection and Sizing. In International Conference on Computer-Aided Design, pages 392–395, 2008.

[16] K.-H. Meng, P.-C. Pan, and H.-M. Chen. Integrated Hierarchical Synthesis of Analog/RF Circuits with Accurate Performance Mapping. In International Symposium on Quality Electronic Design, pages 1–8, 2011.

[17] E. P. A Multi-objective Approach Based on Simulated Annealing and Its Ap-plication to Nuclear Fuel Management. In Internarional Conference on Nuclear Engineering, pages 416–423, 1997.

[18] R. Rutenbar, G. Gielen, and J. Roychowdhury. Hierarchical Modeling, Opti-mization, and Synthesis for System-Level Analog and Rf Designs. IEEE Trans-action on Proceedings, 95(3):640–669, March 2007.

[19] B. Suman. Study of Simulated Annealing Based Algorithms for Multiobjec-tive Optimization of a Constrained Problem. Transaction on Computers and Chemical Engineering, 28(9):1849–1871, 2004.

[20] D. L. Wim Kruiskamp. Darwin: Cmos opamp synthesis by means of a genetic algorithm. In Design Automation Conference, volume 2, pages 433 –438, 1995.

在文檔中使用敏捷式基因探勘與隨機最佳化來改善類比電路合成的效率 (頁 40-52)