Chapter 2 Theory
2.6 Structure design
We can know that hall voltage is proportion to the geometry factor for semiconductor magnetic sensor from equation 2.28 and 2.29 is the induced charge from channel [10], [11].
ch
We add two sensing electrodes on the structure of traditional thin film transistor.
When the device is operated at biased voltage and simultaneously affected by a
magnetic filed simultaneously, the potential will be measured by electrodes. Figure 2-2 shows the profile structure of Hall sensor. The potential will proportion to the applied magnetic filed bias. On the other hand, the potential will arise when we applied higher bias current at constant magnitude of magnetic field. The magnitude of potential will saturate when the bias current up to a degree. At this time the carrier of inversion layer will not change their direction with different applied magnetic field.
The size and location of electrodes will affect the magnitude of potential and sensitivity. Besides, the channel length and width will also have influence on the potential and sensitivity. In our study, we focus our study on the comparison of different channel length and width, the location of the sensing electrodes, and the geometry of structure. Figure 2-3 shows the different electrode designs of structure.
Reference
[1] George Caruntu , Ovidiu Dragomirescu, “ Consideration regarding the offset of the magnetic sensors＂ , IEEE, 2002
[2] G. K. Giust and T. W. Sigmon, “Low-Temperature Polysilicon Thin-Film Transistors Fabricated from Laser-Processed Sputtered-Silicon Films,” IEEE Electron Device Lett., vol. 19, pp. 343-344, Sept. 1998.
[3] N. Kubo, N. Kusumoto, T. Inushima, and S. Yamazaki, “Characterization of polycrystalline-Si thin-film transistors fabricated by excimer laser annealing method,” IEEE Trans. Electron Devices, vol. 40, pp. 1876-1879, Oct. 1994.
[4] G. K. Giust and T. W. Sigmon, “High-Performance Laser-Processed Polysilicon Thin-Film Transistor,” IEEE Electron Device Lett., vol. 20, no. 2, pp. 77-79, Feb. 1999.
[5] G. Radnoczi, A. Robertsson, H. T. G. Hentzell, S. F. Gong, and M. A. Hasan, “Al induced crystallization in of a-Si,” J. Appl. Phys., vol. 69, pp. 6394-6399, 1991.
[6] S. W. Russel, Jian Li, and J. W. Mayer, “In situ observation of fractal growth during a-Si crystallization in a Cu3Si matrix,” J. Appl. Phys., vol. 70, pp.
5153-5155, 1991.
[7] Bo Bian, Jian Yie, Boquan Li, and Ziqin Wu, “Fractal formation in a-Si:H/Ag/a-Si:H films after annealing,” J.Appl.Phys., vol. 73, pp. 7402-7406, 1993.
[8] Yunosuke Kawazu, Hiroshi Kudo, Seinosuke Onari, and Toshihiro Arai,
“Low-temperature crystallization of hydrogenated amorphous silicon induced by nickel silicide formation,” Jpn. J. Appl. Phys. Part1, vol. 29, pp.
2698-2704, 1990.
[9] S. M. Sze, Semiconductor Sensors, Wiley-Interscience, New York, 1994, p.240 [10] S. Middelhoek, Audet S.A., “Physics of silicon sensors”, Academic Press,
London, 1989.
[11] R. Stere, I. Ristea, M. Bodea, Tranzistoare cuefect de camp, Editura Tehnica, Bucuresti, 1972.
Chapter 3
Experimental Procedure
3.1 The Fabrication Process Flow
The devices were fabricated on 4-inch-diameter p-type silicon wafer. Fig. 3-1 shows the process flow of the device. The 100nm undoped amorphous silicon (a-Si) films were initially deposited on 500nm thermally oxidized silicon (100) wafers by low-pressure chemical vapor deposition (LPCVD) system with silane (SiH4) gas at 550。C. The deposition pressure was 100 mtorr and the silane flow rate was 40 sccm.
Amorphous Si thin films anneal in furnace at 600℃ several hours (~24 hr) to convert into polycrystalline form. After defining the device active areas, a 60 nm-thick TEOS oxide film was deposited at 350。C to serve as the gate dielectric by PECVD. Then, a 300 nm thick poly-Si was deposited by LPCVD at 600。C with SiH4 for the gate electrode. Gate areas were patterned and the regions of source, drain, and gate electrode were doped by a self-aligned 5x1015 ions/cm2 phosphorus implantation with a He-diluted PH3 gas, at 50 KeV of acceleration voltage. The dopant were activated at 600。C in N2 ambient for 24 hr. Next, a 500nm TEOS oxide was deposited by PECVD at 350。C as a passivation layer, and contact lithography was carried out. After opening contact holes, a 500 nm Al was deposited by evaporation and the metal layer was patterned. Finally, the samples were sintered at 400。C for 30min in N2 gas ambient.
The conventional Hall sensors which use inversion layer as sensing layer has three disadvantages compared with bulk Hall sensor, including lower channel mobility, surface instability, and larger 1/f noise. In order to improve the performance of the device, we have to lower defects of the channel to add carrier mobility, avoid misalignment of the sense contacts to decrease offset voltage, and decrease contact resistance. The detailed fabrication process flow is listed as follows：
1. (100) orientation Si wafer 2. Initial cleaning
3. Thermal wet oxidation at 1050℃ to grow 5000Å thermal oxide in furnace 4. 1000 Å a-Si was deposited by LPCVD at 550 ℃ in SiH4 gas
5. Amorphous Si thin films anneal in furnace at 600℃ several hours (~24 hr)
to convert into polycrystalline form
6. Mask#1: define active regions (poly-Si dry etch by Poly-RIE system) 7. RCA cleaning
8. 600 Å gate dielectric deposition by PECVD at 350 ℃
9. 3000 Å poly-Si was deposited by LPCVD at 620 ℃ in SiH4 gas 10. Mask#2: Define gate regions (poly-Si dry etch by Poly-RIE system) 11. Ion implantation: P31 , 50KeV, 5x1015 ions/ cm22
12. Dopant activation in N2 ambient at 600℃ for 24hrs in furnace 13. 5000 Å TEOS oxide was deposited by PECVD as passivation layer 14. Mask#3: Open contact holes
15. 5000 Å Al thermal evaporation 16. Mask#4: Al pattern defined
17. Etching Al and removing photoresist
18. Al sintering at 400 ℃ in N2 ambient for 30 min
Only four masking steps and one implant step are required to fabricate our proposed Hall effect magnetic sensors. The proposed devices are entirely controlled low temperature, lower than 600℃.A polycrystalline layer can be considered as monocrystalline grains separated by grain boundaries. Trapped charges in these grain boundaries create an energy barrier. These barriers limit the carrier mobility in the film. In order to decrease grain boundary, the active layers are amorphous and crystallized by a thermal annealing to obtain a polycrystalline film. Besides, we adopt the self-aligned method to avoid misalignment of the device. So we only need the same mask to define source, drain, gate, and Hall probes. Thus, we can accurately control the positions of source, drain, and probes to discuss the relation between the geometrical factor and the performance of the Hall sensor.
In this thesis, our study process flow is listed as follows：
1. assemble information for a experiment 2. design the structure of the proposed devices 3. layout the fabricated process of the device 4. draw the mask
5. the fabrication of the mask
7. measurement of the sensor based on TFT
8. measurement of the magnetic sensor with Hall effect 9. analysis data and information
10. optimize different kinds of the sensing devices
3.2 Measurements
3.2.1 Electronic Bench Equipment
We measured the I-V characteristics by HP4156 semiconductor parameter analyzer with five probe stages at room temperature. And we apply magnet to constant magnetic field. All the Hall effect measurements are made at a magnetic field of 0.2 Tesla and VH is extracted from a mean of three measurements. Fig. 3-3, 3-4 show the schematic of the measurements. We use five probes to contact source, drain, gate, and two pads. The source side is ground while drain and gate side are applied some voltage. Two pads are read pad-source voltage and determine the Hall voltage.
We must consider the offset voltage and we may get the actual Hall voltage [1], [2]. In ideal case, there is no difference between two sensing pad. However, there are some experiment errors, including misalignment of the sense contacts, inhomogeneous in the material of the transducer, nonuniform thickness of the film, nonuniform quantity of the dopant. And they will produce offset voltage between two sensing pads [3].
3.2.2 Magnetic Instrumentation
A gaussmeter measures magnetic flux density (B) at a given point in space.
Most gaussmeters employ Hall effect sensor elements as the magnetic probe [4]. In its simplest form, a gaussmeter is a linear Hall effect sensor with a meter readout. A few of the features to look for in a gaussmeter are：
(1) range – How small, and how large a field can it measure?
(2) accuracy – To what degree does the reading reflect reality?
(3) interface options – In addition to a front-panel display, can it communicate with PCs or other instruments?
Range is important because there are times when you will want to measure fields of a few gauss, and others where you will want to measure fields of several
kilogausses. The need for accuracy needs little, if any, elaboration. Inaccurate instruments can make your life vastly more difficult. Accurate instruments, regularly calibrated, can make development work go more smoothly by reducing one potential source of errors.
We place our devices between two magnets and magnetic field is perpendicular to our devices. We control the distance of the magnets to maintain magnetic field of 0.2 Tesla and use gaussmeter to measure the magnetic flux density (B).
Reference
[1] Yishay Netzer, A Very Linear Noncontact Displancement Measurement with a Hall Element Magnetic Sensor, Proceeding of the IEEE, vol, 69,No. 4, p.491, 1981
[2] Major, R.V. “Current measurement with magnetic sensors” Magnetic Materials for Sensors and Actuators (Digest No. 1994/183), IEE Colloquium on 11 Oct. 1994 Page(s):5/1 - 5/3
[3] R. S. Popovic, "Hall effect devices," Sens. Actuators 17, 39 (1989).
[4] Sensors : a comprehensive survey : magnetic sensors/Gopel, W. & Hesse, J. &
Zemel, J. N. ed. New York/VCH/c1989
Chapter 4
Results and Discussion
In this chapter, we will discuss the device performance of our proposed magnetic sensor. We measured the I-V characteristics by HP4156 semiconductor parameter analyzer. All the Hall effect measurements are made at a magnetic field of 0.5 Tesla and VH is extracted from a mean of three measurements.
4.1 Transistors Characteristics
4.1.1 The output characteristics of our proposed magnetic sensor Fig. 4-1, 4-8, 4-12 show Ids-Vds output characteristics of our proposed magnetic sensor based on TFT structure with varies Vgs following the well square low of a standard thin film transistor under general measuring environment (without magnetic field applied), And we can find that Ids is not obvious until the Vgs arise to 20 V. Obviously, there is no kink effect when Vds arise to 30 V. It is because that the kink current in TFT devices is basically due to the avalanche or impact ionization in the device and is strongly influenced by grain boundary traps. The grain boundary traps can prevent the channel carriers from gaining higher energy, and therefore the impact ionization probability can be reduced as the grain trap density is increased [1].
It is well know that the grain boundary trap density of SPC is usually higher than that of ELA or other recrystallization methods. Therefore, the TFT device with SPC method has higher carrier mobility and less kink effect.
4.1.2 The transfer characteristics of our proposed magnetic sensor Fig. 4-2, 4-9, 4-13 show the transfer characteristics of our proposed magnetic sensors based on TFT structure under general measuring environment (without magnetic field applied). Here we can find that the off leakage current Ids increase with the arising bias voltage Vds. There is less difference on the saturation currents regime on device 1 but much difference on device 3 and device 4. The main reason for lower off-state leakage current of the TFT device with low drain voltage is that the drain electric field is lower and hot carrier effect is less serious [2]. The best on/off current
ratio on device 1 is more than 7 orders in logarithm scale and 6 orders in logarithm on device 3 and device 4. The on-off current ratio is defined as that ratio of the maximum turn-on current to the minimum off-state current. Besides, the four kinds of device have different turn-on current due to different W/L value.
4.2 Sensors Characteristics
4.2.1 The comparison of the Hall voltage versus Vds
Fig. 4-3 shows the comparison of the Hall voltage versus Vds for varies Vgs at 10V to 30 V in steps with W/L = 80µm/150µm and sensing pad is closed to source with the 35µm. In this figure, we find there is a peak value of each characteristic curves. The first peak value happened in the curve of Vgs at 10V, corresponding to the Vds at 1.3V. The peak positions corresponding to the Vds shift to be larger as the Vgs
increasing. The maximum peak value happened at the Vgs with 15V, and then decrease with the Vgs increasing. The peak values appear at some gate and drain voltage. In the linear region, the Hall voltage arises with the Vds increasing and this is because the Hall voltage is dependent of drain current. The Hall voltage decreases with the Vds increasing in the saturation region of the drain current. We think the carrier accumulating pad may be attracted due to electric field between sensing pad and drain. The amount of the attracted carriers is more than that of the accumulated carriers. So the Hall voltage decreases deeply. Due to the sensing pad is closed to source, the voltage gap between sensing pad and drain is larger to absorb carriers accumulating pad easily.
Fig. 4-6 shows comparison of the Hall voltage versus Vds for Vgs = 15V, 20V, 25V, 30V, W/L = 80µm/150µm, and the sensing pad is closed to drain with the 35µm. In this figure, the characteristics are quasi linear for smaller drain voltages and saturate for higher drain voltage. There are smaller peaks in this condition. In other words, when the sensing pad is closed to drain, there are smaller peaks. The peak positions corresponding to the Vds shift to be larger as the Vgs increasing. The smaller peaks may arise from smaller voltage gap between sensing pad and drain due to the sensing pad is closed to drain. In the linear region, VH decrease with gate voltage increasing and drain voltage arriving saturation is higher for higher gate
voltage. The carrier concentration will increase as gate voltage increases. Thus, VH will decrease in this condition. In other words, the carrier concentration is dominate factor influenced VH in this device.
Fig. 4-10 shows comparison of the Hall voltage versus Vds for Vgs =
10V, 15V, 20V, 25V, 30V with W/L = 40µm/100µm and the sensing pad is closed to source with the 20µm. Like Fig. 4-3, it also has peak Hall voltage values when the sensing pad is closed to source. But the peaks are smaller than those in Fig. 4-3. This device is shorter so the voltage gap between sensing pad and grain is smaller. Thus, the attractive ability is smaller than device 1. Besides, we can find the Hall voltage versus Vds presents oscillation. The voltage gap between sensing pad and drain is smaller so the accumulating carrier can compensate the lost attracting carriers. The carrier mobility is proportion to gate voltage and then the current will increase as gate voltage increases. So we can find the Hall voltage is higher as gate voltage increases.
We think the Hall voltage arriving saturation is higher for higher drain voltage and drain current arriving saturation is also higher for higher gate voltage. Drain current arriving saturation shows no more carriers run to sensing pad and directly transport to drain.
Fig. 4-14 shows comparison of the Hall voltage versus Vds for Vgs = 10, 15, 20, 25, 30 V and W/L = 40µm/100µm and the sensing pad is closed to drain with the 20µm. From this figure, there is no peak in lower gate voltage. We think this is related to the channel length of this device. This device is shorter so the voltage gap between sensing pad and drain is smaller to keep the carriers at the sensing pad.
So we can find that there are two kinds of type in Hall voltage variation accompany with the increasing of drain voltage. The first one appears large peak type of Hall voltage when sensing pad is closed to source. The second type of Hall voltage appears rising with the increasing of drain voltage Vds initially, and the following is smaller oscillation after some critical Vds when sensing pad is closed to drain.
4.2.2 The voltage of sensing electrode pad varies with time
Fig.4-4, 4-5 show the voltage of sensing electrode pad varies with time with/without magnetic field bias and Hall voltage versus time for some Vgs and Vds.
We find VH decreases with time increasing and then saturates subsequently. Vsr is voltage with/without magnetic field and VH is Hall voltage. The relation between Vsr and VH is [3]
VH = Vsr (with B) – Vsr (without B) Where B is magnetic field
Fig. 4-5 can demonstrate the Hall voltage decreases with the Vds increasing in the saturation region of the drain current in Fig. 4-3. We apply 100 seconds to observe the change of the Hall voltage and we find the Hall voltage is not constant. The Hall voltage is higher initially and lower eventually due to the accumulating carriers are attracted by electric field between sensing pad and drain. In addition, we also find the time of arriving saturation is longer at higher gate voltage.
Fig.4-7 shows the voltage of sensing electrode pad varies with time with/without magnetic field bias and Hall voltage versus time for Vgs = 25V ,Vds = 15V. This figure also can explain why there are peaks in Fig. 4-6.
Fig. 4-11 shows the voltage of sensing electrode pad varies with time with/without magnetic field bias and Hall voltage versus time for different drain and gate voltage with W/L = 40µm/100µm and the sensing pad is closed to source with the 20µm . We can easily find the Hall voltage increases with the gate and drain voltage increasing in the linear region.
.
4.2.3 The offset voltage Voff
We take Fig. 4-15, 4-16, 4-17, 4-18, and 4-19 examples to explain how we get
the Hall voltage as the offset voltage exists.
Fig. 4-15 shows the voltage difference of sensing electrode pad varies with time with/without magnetic field bias and Hall voltage versus Vds for Vgs = 10,15,20,25,30 V and W/L = 40µm/100µm and sensing pad is closed to drain with the 20µm. There are five groups having different gate voltage in this figure and every group has four curves. Vsensing is the voltage difference of the sensing pad with and without magnetic field and Vsensing is larger with gate voltage increasing.
Fig. 4-16 shows the partial region of the Fig. 4-16 as Vgs = 20V. The black curve is voltage of the first sensing pad without magnetic field and blue curve is that of the second pad without magnetic field. We can find there is voltage gap between the two Hall probes and the gap increases with drain voltage increasing. And we call
this offset voltage Voff [4], [5]. Fig. 4-18 shows comparison of the offset voltage versus Vds for Vgs = 10,15,20,25,30 V. The red curve is voltage of the first contact pad with magnetic field and the green curve is that of the second pad. The red curve shifts upward and the green one does downward. The shift degree increases with drain voltage increasing. From this figure, we know the second pad is accumulated by electron carriers. Thus, the voltage of the second pad with magnetic field is lower than that without magnetic field. Fig. 4-14 shows the voltage difference between the black and red curves and Fig. 4-17 shows the voltage difference between the blue and green curves. Then, the Hall voltage is the mean of the two VH values. If we neglect the offset voltage, we would get wrong Hall voltage as Fig. 4-19.
Reference
[1] Kow Ming Chang, Yuan Hung Chung, Gin Ming Lin, Jian Hong Lin and Chi Gun Deng, “ A novel high-performance poly-silicon thin film transistor with a self-aligned thicker sub-gate oxide near the drain/source regions,” IEEE Electron Device Letters, vol. 22, no. 10, p. 472, 2001.
[2] M. Koyanagi, H. Kurino, T. Hashimoto, H. Mori, K. Hata, Y. Hiruma, T. Fujimori, I-Wei Wu and A. G. Lewis, “Relation between hot-carrier light emission and kink effect in poly-Si thin film transistors” IEEE 1991
[3] R. S. Popovic, "Hall effect devices," Sens. Actuators 17, 39 (1989)
[4] Carvou, E.; Le Bihan, F, “Hall effect magnetic sensors based on polysilicon TFTs”, Sensors Journal, IEEE, Volume: 4, Issue: 5, pp.597 – 602, 2004.
[4] Carvou, E.; Le Bihan, F, “Hall effect magnetic sensors based on polysilicon TFTs”, Sensors Journal, IEEE, Volume: 4, Issue: 5, pp.597 – 602, 2004.