3-1. Interdigit Effect Analysis
Up to this chapter, various kinds of interdigitated methods are investigated via I-V measurement. It is demonstrated from previous chapters that by employing interdigitated methods, standard deviations of △Vth and △Muo decrease as finger number increases, while those almost remain the same in spite of finger distance.
It is entirely fair to say that I-V measurements could reveal the whole channel’s characteristics which would not afford to provide detailed information about the mechanism of devices. Therefore, C-V measurement would become essential for delicate analysis[11-13]. Generally speaking, the C-V measurement is characterized by its ability of revealing characteristics of gate-to-source and gate-to-drain instead of the whole channel. Besides, it is more sensitive to frequency of applied signal, which plays a important role distinguishing the fixed charge from interface states. Based on the features, it would be inspiring to re-examine the mismatch effect with interdigitated methods by employing C-V measurement[14].
In this section, the gate-to-source capacitance Cgs and gate-to-drain capacitance Cgd of n-type and p-type devices are measured with frequencies of 50kHz and 1MHz.
The Cgd curve is measured with a floating source and Cgs curve is measured with a floating drain. Besides, the curves are plotted with normalized value of capacitances, which means the ratio of the measured value to the maximum value of the capacitance.
Taking the n-type Cgs curves with 50kHz for example, as shown in Fig. 3-1(a), we could observe that all curves remain unity as the gate voltage is larger than the flat
band voltage VFB and fall to zero sharply around VFB. When the interdigitated method is employed in Fig. 3-1(b), Cgs curves reveal better uniformity especially in the abrupt region around VFB. In addition, Cgs curves of p-type devices are shown in Fig.
3-2(a)(b), which shows similar properties as n-type devices.
Unlike the I-V measurement, parameters such as Vth and Muo could not be extracted from C-V data. In order to analyze practically, we take the derivatives of capacitance versus gate voltage and observe the maximum value and its corresponding voltage. Derivative curves of Cgs in n-type devices are shown in Fig.
3-3(a), and the maximum occurs between 1.1V and 1.5V of gate voltage. After employing the interdigitated method, maximums in Fig. 3-3(b) appear in a narrower range of 1.1V to 1.3V of gate voltage. When it comes to p-type devices, as shown in Fig. 3-4(a) and (b), minimums of derivatives locate between -2.3V to -2.5V in original devices and -2.4V to -2.45V in interdigitated ones.
3-2. Comparison of I-V and C-V Mismatch Analysis
For the purpose of analyzing mismatch effect, graphs of error bar are used to summarize the results of C-V measurements. Fig. 3-5(a) shows the gate voltage Vg_max’s distribution where the maximum of derivative occurs. In each condition, for example, Cgd at 1MHz, the straight line represents the standard deviation and the center point represents the mean value.
Comparing Cgd on 1MHz and 50kHz, it could be found that mean values are 1.6V and 1.28V individually. If we set the measurement frequency on 1MHz, careers in certain states could not afford to response on time with such high frequency, which means that the derivative of 1MHz would reach its maximum later. As a consequence, the gate voltage Vg_max where the maximum value occurs of 1MHz would larger than that of 50kHz. In addition, no apparent differences could be observed if we
examine Cgd and Cgs with the same frequency. Comparing with initial condition, devices could more tend to reveal asymmetric properties after stress and degradation.
As far as the mismatch effect is concerned, it would be found that standard deviations with interdigitated method are smaller than those of original devices, while the mean values almost have no changes. In Fig. 3-5(b), maximum values with interdigit are lower in mean value and standard deviation. By employing C-V analysis, it could be further confirmed that interdigitated methods are able to suppress the mismatch effect. In addition, error bar analysis of p-type devices are also shown in Fig. 3-6(a) and (b), which shows smaller deviations than n-type devices.
Since the interdigitated method still has better performance in C-V measurement, it would be desired for further investigation with more fingers of interdigit. In Fig. 3-7, the left side shows a straight line representing standard deviations of Vth difference from I-V measurements, and the right side shows scatters representing those of Vg_max difference from C-V measurements. The four symbols of scatter represent Cgs and Cgd in 50kHz and 1MHz. It could be observed that both the straight line and scatters reveal the characteristic of inverse proportionality with finger numbers. P-type devices in Fig. 3-8 show the similar property, but standard deviations are smaller and closer to zero.
3-3. Summary
In this chapter, the mismatch issues are discussed with C-V measurement. We take the derivatives of capacitance versus gate voltage to observe the maximum value and its corresponding voltage. It is observed that the gate voltage where the maximum value occurs of 1MHz would larger than that of 50kHz, but no apparent differences appear between Cgs and Cgd. As far as the mismatch effect is concerned, it is found that standard deviations with interdigitated method are smaller than those of original
devices, which is consistent with the conclusion of I-V measurement in previous chapter.
Fig. 3-1 Normalized curves of gate-to-source capacitance with 50kHz in N-type devices (a) original devices (b) interdigitated with one finger
Fig. 3-2 Derivative curves of gate-to-source capacitance with 50kHz in N-type devices (a) original devices (b) interdigitated with one finger
Fig. 3-3 Normalized curves of gate-to-source capacitance with 50kHz in P-type devices (a) original devices (b) interdigitated with one finger
Fig. 3-4 Derivative curves of gate-to-source capacitance with 50kHz in P-type devices (a) original devices (b) interdigitated with one finger
Fig. 3-5 Error bar analysis of derivative curves of capacitance in n-type devices (a) gate voltages Vg_max of derivative’s maximum (b) values of derivative’s maximum
Fig. 3-6 Error bar analysis of derivative curves of capacitance in p-type devices (a) gate voltages Vg_min of derivative’s minimum (b) values of derivative’s minimum
Fig. 3-7 Standard deviations in n-type devices with finger numbers of Vth difference from I-V measurement (left side) and Vg_max difference from C-V measurement (right side)
Fig. 3-8 Standard deviations in p-type devices with finger numbers of Vth difference from I-V measurement (left side) and Vg_min difference from C-V measurement (right side)
Chapter 4
Conclusion
In this thesis, we investigate the mismatch issue for LTPS TFTs. Firstly we aim at the size and interdigit effects for small area TFTs. It is observed that the mismatching factor decreases rapidly with the increase of the device’s area, and the interdigitated arrangement has better tolerance than the original arrangement in electrical data statistically of matching TFTs. This is because that the device with small dimension contains less grain boundaries, which contributes worse mismatch effect. In particular, the mismatching factor seems to be irrelevant while the device’s area are larger than 100 cm2, which means that the size effect are less obvious than small-size device.
To further investigate the mismatching properties of the interdigitated arrangements, a huge number of devices with the same dimension are utilized. By analyzing standard deviations of parameters’ differences, it is found that the interdigitated method is indeed superior than the original. Besides, Vth and Muo are inversely proportional to the number of fingers, especially the threshold voltage.
Furthermore, a model is proposed to predict the performance of the interdigitated method, which has high accuracy with the real data. As far as distance analysis is concerned, almost no correlations between the distance and mismatch effect could be observed.
Next, the mismatching properties are examined by C-V measurements. We take the derivatives of capacitance versus gate voltage to observe the maximum value and its corresponding voltage. It is observed that the gate voltage where the maximum value occurs of 1MHz would larger than that of 50kHz, but no apparent differences
appear between Cgs and Cgd. As a consequence, standard deviations with interdigitated method are smaller than those of original devices, which is consistent with the conclusion of I-V measurement.
In order to suppress the mismatch effect, the method of interdigit are concerned since the fabrication process is predetermined. From the viewpoints of statistical analysis, contributions of interdigit are demonstrated by parameter distributions of large amount of devices. In addition, we propose a model to evaluate the inverse proportionality of the interdigitated method, which could be used to predict the mismatch property of devices.
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