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Algorithm Flow of Crosstalk-Driven Placement

Crosstalk-Driven Placement

3.5 Algorithm Flow of Crosstalk-Driven Placement

In this section, the whole procedures are integrated and the overall algorithm of our crosstalk-driven placement will be given. Table 3.5 illustrates the full algorithm of our crosstalk-driven placement.

In the first place, we set perturb flag to be false and all the nets to belong to the changed-net, that means, it performs once complete estimation for the congestion and probabilistic RLC noise, which is stated in Table 2.1 and Table 3.3, respectively.

After executing the complete estimation for each two-pin net, the outcome perfor-mance of the placement is judged in the line 8. If it meets the noise constraint or the temperature of SA is cool enough, then exit the placement procedure. Otherwise, the B*-tree perturbation is performed to seek a better solution for placement, and set the per-turb flag to be true. Also, the members of the changed-net are updated by the manner stated in Chapter 3.4.1.

While the perturbation is complete, we execute the partial congestion estimation and

Algorithm of Crosstalk-Driven Placement Input: Netlist of the design

Output: Area, total estimated wirelength, and probabilistic RLC noise of the placement 1 Begin

2 Set perturb flag ← false

3 Set {changed-net} ← {all the nets}

4 For each net of the {changed-net}

5 If perturb flag = false

Perform the complete congestion estimation ;

Perform the complete probabilistic RLC noise estimation ;

6 Else

Perform the partial congestion estimation ;

Perform the partial probabilistic RLC noise estimation ;

7 EndFor

8 If meet the noise constraint or SA cooling enough Exit placement ;

9 Else

Perturb B*-tree ;

Set perturb flag ← true ; Update the {changed-net} ; Goto line 4 ;

10 End.

Table 3.5: Algorithm of the proposed crosstalk-driven placement.

partial probabilistic RLC noise estimation for each changed-net, which are illustrated in Table 3.4 and Chapter 3.4.2, respectively. The above procedures are iteratively proceed until one of the conditions is satisfying, then exit the placement.

Chapter 4

Experimental Results

In order to check the validity of our proposed placement, we test our method on MCNC benchmarks and two additional cases, ckt529 and ckt1681. The number of cells and nets of each test case is shown in Table 4.1. The proposed placement is implemented by C++

language, and run on a Pentium IV 3.2 GHz with 2GB memory.

We compare the results with the area-driven, congestion-driven, RC-driven, and RLC-driven placement. In the area-RLC-driven placement, it only minimizes the placement area. In the congestion-driven placement, we minimize the area, total wirelength, number of over-flowing grids, and overall routing density. In the others, they minimize the area, total wirelength, the overall routing density, and penalize the overflow to prevent from conges-tion, then use the proposed algorithm to minimize the crosstalk noise. The difference of RC-driven and RLC-driven placement is, the former only takes R, L, C, Cx of wires into account, but the latter one extra considers the mutual inductance. After each placement

Benchmark # cells # nets

apte 9 97

hp 11 83

xerox 10 203

ami33 33 123

ami49 49 408

ckt529 529 613

ckt1681 1681 1991

Table 4.1: Number of cells and nets of MCNC and our benchmarks.

Placement flow of area-driven placement 1 Parsering the input netlist

2 Minimize the total area /*cost = α(Area)*/

3 Probabilistic RLC noise verification 4 Maximum routing density analysis

Table 4.2: Placement flow of the area-driven placement.

is complete, its overall average probabilistic RLC noise is verified by eq.(3.14). Here, we calculate the true legal coexisting probability instead of the upper bound of legal coexist-ing probability of two nets to verify the real probabilistic noise of a design.

All of the testcases utilize 0.13µm / 1.2V technology and two metal layers for con-gestion estimation. Furthermore, we set the input signal rising time Tr = 100ps and the resistance of each pin is around 30 to 120Ω which is proportional to its cell area, and a shielding wire is inserted between each 10 wires. Hence, the crosstalk noise is consid-ered ranging over 10 units of space. The experimental results are shown in Table 4.6 ∼ 4.8, where WL, max H, and max V, indicate the total wirelength estimated by the half-perimeter wirelength technique, the maximum estimated horizontal and vertical routing density of the overall global routing grids, respectively. In addition, the P RC, P RLC, and Peak RLC noise denote the overall average probabilistic RC, RLC noise, and the peak probabilistic RLC noise, respectively.

We set up the environment for each placer to compare their experimental results as following, and the sum of cost coefficient for each cost function is equal to 1.

• Area-driven placement:

The placement flow of area-driven placement is exhibited in Table 4.2. For the results of area-driven placement shown in Table 4.6, it only minimizes the total area (cost coefficient α = 1), then it obtains the minimum placement area but sacrifices the total wirelength, routability, and crosstalk immunity. It even may be unroutable in several benchmarks if the maximum estimated density is larger than 1.

Placement flow of congestion-driven placement 1 Parsering the input netlist

2 Minimize the cost fuction

/*cost = α(Area) + β(W L) + γ(avg congestion) + δ(number of overflowing grids)*/

3 Probabilistic RLC noise verification 4 Maximum routing density analysis

Table 4.3: Placement flow of the congestion-driven placement.

Placement flow of RC-driven placement 1 Parsering the input netlist

2 Minimize the cost fuction

/*cost = α(Area) + β(W L) + γ(avg congestion) + δ(P RC)*/

3 Probabilistic RLC noise verification 4 Maximum routing density analysis

Table 4.4: Placement flow of the RC-driven placement.

• Congestion-driven placement:

The placement flow of congestion-driven placement is indicated in Table 4.3. In the congestion-driven placement, it simultaneously minimizes the total area, wire-length, average congestion, and the number of overflowing grids, respectively. That means, it sets α + β + γ + δ = 1.

We instinctively figure that minimizing the congestion is equivalent to mitigate the coupling effects between interconnects, and the overall crosstalk noise can be con-trolled. However, it is negated in the experimental results of congestion-driven placement shown in Table 4.7. It is because the coupling noise is not only domi-nated by Cx and Lx but also by the pin resistances. If the net in a higher coupling region but with a stronger driver, it will have stronger noise immunity and suf-fer smaller noise. That is the reason that only minimizing the congestion cannot achieve the best noise immunity.

• RC-driven placement:

Placement flow of RLC-driven placement 1 Parsering the input netlist

2 Minimize the cost fuction

/*cost = α(Area) + β(W L) + γ(avg congestion) + δ(P RLC)*/

3 Maximum routing density analysis

Table 4.5: Placement flow of the RLC-driven placement.

The placement flow of driven placement is exhibited in Table 4.4. For the RC-driven placement, it simultaneously minimizes the total area, wirelength, average congestion, and the probabilistic RC noise (P RC), respectively. That means, it sets α + β + δ + γ = 1. After placement is complete, we verify its probabilistic RLC noise again to check the signal integrity.

The results shown in Table 4.8 reveals that the RC-driven placement has smaller area, higher congestion but worse noise immunity on average than the RLC-driven placement. We speculate that it is due to without the mutual inductance considera-tion, the probabilistic RC noise may be still slight enough in the higher congested region. Moreover, for the comparison of P RC and P RLC indicated in Table 4.8, the RC model indeed underestimates the crosstalk noise about 3X against that of RLC model in our testcases.

• RLC-driven placement:

The placement flow of area-driven placement is exhibited in Table 4.5. Similar to RC-driven placement, the difference between the RC and RLC-driven placement is:

RLC-driven considers the probabilistic RLC noise (P RLC) instead of P RC.

In RLC-driven placement, it achieves the best performance in the total wirelength and crosstalk noise against the other placers. Because considering the effect of the mutual inductance, its placement area is a little larger than that of the others.

From the experimental results shown in Table 4.9, RLC-driven placement averagely improves 8.9%, and 15.9% in the probabilistic RLC noise than that of the

RC-Area-driven

Benchmark Area WL max H / P RLC noise

(mm2) (mm) max V (×10−3)

apte 49.801 781.102 0.512 / 0.624 2.977 hp 10.158 436.200 0.844 / 0.931 1.898 xerox 20.774 710.513 1.534 / 1.816 3.601 ami33 1.320 211.006 0.913 / 1.044 2.219 ami49 38.369 1420.180 2.209 / 1.955 6.107 ckt529 46.996 4012.700 2.969 / 2.084 26.512 ckt1681 101.710 16058.4 3.018 / 2.966 133.518 Comparison 0.916 1.301 2.312 / 2.458 1.441

Table 4.6: Results of area-driven placement.

Congestion-driven

Benchmark Area WL max H / P RLC noise

(mm2) (mm) max V (×10−3)

apte 50.174 521.280 0.205 / 0.326 2.469 hp 10.742 339.157 0.485 / 0.437 1.211 xerox 21.168 679.828 0.544 / 0.681 1.633 ami33 1.411 149.247 0.537 / 0.610 1.485 ami49 40.012 1251.050 0.725 / 0.688 4.016 ckt529 50.098 3019.761 0.802 / 0.691 15.749 ckt1681 109.424 14903.5 0.908 / 0.811 115.680 Comparison 0.963 1.149 0.810 / 0.914 1.159

Table 4.7:Results of congestion-driven placement.

driven and congestion-driven placement, respectively. And it also improves 6.8%

and 14.9% in the total wirelength on average than that of the above two placers, and merely sacrifices 8.4% in the area averagely compared to the area-driven placement, but it may be unroutable in the most benchmarks.

In addition, Table 4.10 shows the comparison of the peak probabilistic RLC noise.

We can see that the peak noise of the area-driven placement is still the largest, and our algorithm can mitigate more RLC peak noise than that of the other placers.

Further showing our experimental results, the results of RLC-driven placement con-figuration of all the benchmarks are exhibited in Fig. 4.1 ∼ 4.7.

RC-driven

Benchmark Area WL max H / P RC noise P RLC noise

(mm2) (mm) max V (×10−3) (×10−3)

apte 50.002 651.330 0.425 / 0.468 0.608 2.191

hp 10.721 304.021 0.796 / 0.531 0.398 1.358

xerox 22.084 655.243 0.788 / 0.841 0.526 1.542

ami33 1.439 120.771 0.743 / 0.759 0.411 1.364

ami49 41.008 1206.030 0.835 /0.687 0.796 3.852

ckt529 51.712 2877.640 0.896 / 0.782 1.327 13.658 ckt1681 111.238 13759.700 0.929 / 0.878 13.923 109.65

Comparison 0.980 1.068 1.043 / 1.065 - 1.089

Table 4.8: Results of RC-driven placement.

RLC-driven

Benchmark Area WL max H / P RLC noise

(mm2) (mm) max V (×10−3)

apte 50.019 516.074 0.368 / 0.433 1.799 hp 11.005 281.698 0.731 / 0.535 1.162 xerox 22.301 640.531 0.796 / 0.822 1.447 ami33 1.470 102.305 0.711 / 0.638 1.196 ami49 41.522 1126.352 0.799 / 0.657 3.529 ckt529 53.883 2635.692 0.873 / 0.717 10.064 ckt1681 113.767 12862.05 0.912 / 0.841 103.550

Comparison 1.0 1.0 1.0 / 1.0 1.0

Table 4.9: Results of RLC-driven placement.

Area-driven Congestion-driven RC-driven RLC-driven Benchmark Peak RLC noise Peak RLC noise Peak RLC noise Peak RLC noise

(×10−3) (×10−3) (×10−3) (×10−3)

apte 31.279 33.517 20.031 15.714

hp 15.891 17.729 11.507 9.916

xerox 94.112 48.025 46.331 45.092

ami33 105.741 98.552 95.997 89.120

ami49 77.510 58.124 43.716 42.005

ckt529 172.013 153.440 134.199 117.245

ckt1681 482.600 421.192 393.352 376.264

Comparison 1.408 1.194 1.072 1.0

Table 4.10: Peak probabilistic RLC noise of each benchmark.

Fig. 4.1:The RLC-driven placement configuration of apte.

Fig. 4.2: The RLC-driven placement configuration of hp.

Fig. 4.3: The RLC-driven placement configuration of xerox.

Fig. 4.4: The RLC-driven placement configuration of ami33.

Fig. 4.5: The RLC-driven placement configuration of ami49.

Fig. 4.6: The RLC-driven placement configuration of ckt529.

Fig. 4.7: The RLC-driven placement configuration of ckt1681.

Chapter 5 Conclusion

This thesis proposes a novel algorithm to handle the on-chip RLC noise during placement.

Results show that our algorithm can indeed estimate the RLC noise and deal with the mutual inductance effectively. In the research, there are several conclusions given as follows:

• Ignoring the interferences of the mutual inductance will significantly underestimate the noise effects during placement. Due to advance of the technology, the circuit complexity of our design is much more than before. More and more interconnects parallel to each other makes the crosstalk noise become seriously. Experimental results show that only considering the RC noise during placement will averagely underestimate 3X probabilistic noise than using RLC model. Therefore, only per-forming the RC-driven placement is not enough for today’s VLSI physical design.

Be excessively optimistic in the on-chip noise of the circuit will malfunction our design, even make it fail.

• Minimizing the congestion cannot truly mitigate the crosstalk noise. The results exhibit that the congestion-driven placement obtains an inferior performance in the probabilistic RLC noise than that of the RC and RLC-driven placement. This is due to the coupling noise is not only dominated by Lx and Cx, but also by the pin resistances. Consequently, only minimize the routing congestion cannot entirely solve the noise problems during placement.

To our best knowledge, we are the first one to consider the on-chip noise due to the mutual inductance during placement, and results show the proposed algorithm achieve excellent performance in the placement stage. In order to perfect the research, our future works will focus on the following objects:

• Runtime reduction: Since the computation complexity in crosstalk-driven place-ment is much more than other objective placeplace-ment (ex: congestion-driven, low power driven placement, etc.), especially in considering the effects of mutual induc-tance. Multilevel is a good structure for large scale placement, it efficiently reduces data size to be handled at a time more than that of the flat placement. Therefore, it is a good choice for our future going.

• Algorithm modification: Our proposed algorithm for probabilistic RLC noise es-timation can work well and achieve great results in the placement stage. However, it still limits to the long coupling range due to the mutual inductance, and have to handle a huge computation complexity. Our another future work is to keep on mod-ifying the algorithm of RLC noise estimation, then speed up the overall placement procedure.

• Extend to crosstalk-driven routing: In the thesis, the transmission line based RLC model has worked well in RLC noise estimation, and it is also capable to handle the case of non-identical wires. Since the noise effects of a circuit is more obvious in the route stage, the model can be applied to the procedure of the crosstalk-driven routing, and will achieve a good performance.

Bibliography

[1] D. A. Kirkpatrick, “The Deep-Submicron Signal Integrity Challenge,” International Symposium on Physical Design, 1999.

[2] K. L. Shepard, V. Narayanan, and R. Rose, “Harmony: Static Noise Analysis of Deep Submicron Digital Integrated Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, August. 1999.

[3] D. A. Kirkpatrick, “Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk,” Design Automation Conference, pp. 804-809, June, 2001.

[4] Howard H. Chen and L. K. Wang, “Design for Signal Integrity: The New Paradigm for Deep-Submicron VLSI Design,” International Symposium on Physical Design, pp. 329-333, 1997.

[5] C. K. Cheng, J. Lillis, S. Lin, and N. H. Chang, “Interconnect Analysis and Synthe-sis,” John-Wiley, 2000.

[6] G. Servel, F. Huret, E. Paleczny, J. F. Legier, and D. Deschacht, “Effective On-Chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Inser-tion,” International Symposium on Quality Electronic Design, pp. 185-190, 2001.

[7] Jun Chen and Lei He, “Determination of Worst-Case crosstalk Noise for Non-Switching Victims in GHz+ Interconnects,” Asia and South Pacific Design Automa-tion Conference, 2003.

[8] T. H. Cormen, C. E. Leiserson, and R. L. Rivest, “Introduction to Algorithms,” Cam-bridge, MA: MIT Press, 1992.

[9] Yu Cao, X. D. Yang, X. Huang, and D. Sylvester, “Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysisw,” International Conference on Computer-Aided Design, Sep. 2003.

[10] J. Cong, D. Z. Pan, and P. V. Srinivas, “Improved Crosstalk Modeling for Noise Constrained Interconnect Optimization,” Asia and South Pacific Design Automation Conference, Jan. 2001.

[11] K. Agarwal, D. Sylvester, and D. Blaauw, “A Simplified Transmission-Line Based Crosstalk Noise Model for On-Chip RLC Wiring,” Asia and South Pacific Design Automation Conference, pp. 859-865, 2004.

[12] J. Lou and W. Chen, “Crosstalk-Aware Placement,” IEEE Design and Test of Com-puters, pp. 24-32, Jan. 2004.

[13] J. Lou, S. Thakur, S. Krishnamoorthy, and H. S. Sheng “Estimating Routing Conges-tion Using Probabilistic Analysis,” IEEE TransacConges-tions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, Jan. 2002.

[14] H. Ren, D. Z. Pan, and P. G. Villarrubia, “ True Crosstalk Aware Incremental Place-ment with Noise Map,” International Conference on Computer-Aided Design, Sep.

2004.

[15] M. Yoshikawa and H. Terai, “Crosstalk-Driven Placement Based on Genetic Al-gorithms,” IEEE International Conference on Computational Intelligence for Mea-surement Systems and Applications, July. 2004.

[16] G. M. Wu, Y. C. Chang, and Y. W. Chang, “Rectilinear Block Placement using B*-Trees,” TODAES, Vol. 8, pp. 188-202, 2003.

[17] P. N. Guo, C. K. Cheng, abd T. Yoshimura, “An O-Tree Representation of Non-Slicing Flooplans and Its Applications,” Design Automation Conference, pp. 268-273, 1999.

[18] S. Kang, “Linear Ordering and Application to Placement,” Design Automation Con-ference, pp. 457-464, 1983.

[19] S. C. Wang, G. Y. Lee, and D. J. Ma, “Modeling of Interconnect Capacitance, Delay, and Crosstalk in VLSI,” IEEE Transactions on Semiconductor Manufacturing, Vol.

13, Feb. 2000.

[20] F. W. Grover, “Inductance Calculations: Working Formulas and Tables,” Dover, New York 1962.

[21] H. Kim and C. C.-P. Chen, “Be Careful of Self and Mutual Inductance Formulae,”

Reports, 2001.

[22] Naveed A. Sherwani, “Algorithms for VLSI Physical Design Automation, 3rd Edi-tion,” Kluwer Academic Publishers, 1999.

[23] S. M. Sait and H. Youssef, “VLSI Physical Design Automation: Theory and Prac-tice,” World Scientific Publishing, 1999.

[24] B. Young, “Digital Signal Integrity,” Prentice Hall, 2001.

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