Programming instructions 6
6.1 Basic instructions
6.1.1 Bit logic
LAD contacts
You can connect contacts to other contacts and create your own combination logic. If the input bit you specify uses memory identifier I (input) or Q (output), then the bit value is read from the process-image register. The physical contact signals in your control process are wired to I terminals on the PLC. The PLC system scans the wired input signals and continuously updates the corresponding state values in the process-image input register.
You can specify an immediate read of a physical input using ":P" following the I offset (example: "%I3.4:P"). For an immediate read, the bit data values are read directly from the physical input instead of the process image. An immediate read does not update the process image.
Normally Open Normally Closed
Parameter Data type Description
IN BOOL Assigned bit
● The Normally Open contact is closed (ON) when the assigned bit value is equal to 1.
● The Normally Closed contact is closed (ON) when the assigned bit value is equal to 0.
● Contacts connected in series create AND logic networks.
● Contacts connected in parallel create OR logic networks.
FBD, AND, OR, and XOR boxes
In FBD programming, LAD contact networks are transformed into AND (&), OR (>=1), and exclusive OR (x) box networks where you can specify bit values for the box inputs and outputs. You may also connect to other logic boxes and create your own logic combinations.
After the box is placed in your network, you can drag the "Insert binary input" tool from the
"Favorites" toolbar or instruction tree and then drop it onto the input side of the box to add more inputs. You can also right-click on the box input connector and select "Insert input".
Box inputs and output can be connected to another logic box, or you can enter a bit address or bit symbol name for an unconnected input. When the box instruction is executed, the current input states are applied to the binary box logic and, if true, the box output will be true.
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Programming instructions 6.1 Basic instructions
AND logic OR logic XOR logic
Parameter Data type Description
IN1, IN2 BOOL Input bit
● All inputs of an AND box must be TRUE for the output to be TRUE.
● Any input of an OR box must be TRUE for the output to be TRUE.
● An odd number of the inputs of an XOR box must be TRUE for the output to be TRUE.
NOT logic inverter
For FBD programming, you can drag the "Negate binary input" tool from the "Favorites"
toolbar or instruction tree and then drop it on an input or output to create a logic inverter on that box connector.
LAD: NOT contact inverter FBD: AND box with one
inverted logic input FBD: AND box with inverted logic input and output The LAD NOT contact inverts the logical state of power flow input.
● If there is no power flow into the NOT contact, then there is power flow out.
● If there is power flow into the NOT contact, then there is no power flow out.
LAD output coil
The coil output instruction writes a value for an output bit. If the output bit you specify uses memory identifier Q, then the CPU turns the output bit in the process-image register on or off, setting the specified bit equal to power flow status. The output signals for your control actuators are wired to the Q terminals of the S7-1200. In RUN mode, the CPU system continuously scans your input signals, processes the input states according to your program logic, and then reacts by setting new output state values in the process-image output register. After each program execution cycle, the CPU system transfers the new output state reaction stored in the process-image register to the wired output terminals.
You can specify an immediate write of a physical output using ":P" following the Q offset (example: "%Q3.4:P"). For an immediate write, the bit data values are written to the process image output and directly to physical output.
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Programming instructions 6.1 Basic instructions
Output coil Inverted output coil
Parameter Data type Description
OUT BOOL Assigned bit
● If there is power flow through an output coil, then the output bit is set to 1.
● If there is no power flow through an output coil, then the output coil bit is set to 0.
● If there is power flow through an inverted output coil, then the output bit is set to 0.
● If there is no power flow through an inverted output coil, then the output bit is set to 1.
FBD output assignment box
In FBD programming, LAD coils are transformed into assignment (= and /=) boxes where you specify a bit address for the box output. Box inputs and outputs can be connected to other box logic or you can enter a bit address.
Output assignment Inverted output
assignment Output assignment with inverted output
Parameter Data type Description
OUT BOOL Assigned bit
● If the output box input is 1, then the OUT bit is set to 1.
● If the output box input is 0, then the OUT bit is set to 0.
● If the inverted output box input is 1, then the OUT bit is set to 0.
● If the inverted output box input is 0, then the OUT bit is set to 1.
6.1.1.1 Set and reset instructions
S and R: Set and Reset 1 bit
● When S (Set) is activated, then the data value at the OUT address is set to 1. When S is not activated, OUT is not changed.
● When R (Reset) is activated, then the data value at the OUT address is set to 0. When R is not activated, OUT is not changed.
● These instructions can be placed anywhere in the network.
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Programming instructions 6.1 Basic instructions
LAD: Set LAD: Reset FBD: Set FBD: Reset
Parameter Data type Description
IN (or connect to contact/gate logic) BOOL Bit location to be monitored
OUT BOOL Bit location to be set or reset
SET_BF and RESET_BF: Set and Reset Bit Field
LAD: SET_BF LAD: RESET_BF FBD: SET_BF FBD: RESET_BF
Parameter Data type Description
n Constant Number of bits to write
OUT BOOL Starting address of bit field
● When SET_BF is activated, a data value of 1 is assigned to "n" bits starting at address OUT. When SET_BF is not activated, OUT is not changed.
● RESET_BF writes a data value of 0 to "n" bits starting at address OUT. When RESET_BF is not activated, OUT is not changed.
● These instructions must be the right-most instruction in a branch.
RS and SR: Set-dominant and Reset-dominant bit latches LAD/FBD: RS LAD/FBD: SR
Parameter Data type Description
S, S1 BOOL Set input; 1 indicates dominance
R, R1 BOOL Reset input; 1 indicates dominance
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Programming instructions 6.1 Basic instructions
Parameter Data type Description
OUT BOOL Assigned bit output "OUT"
Q BOOL Follows state of "OUT" bit
● RS is a set dominant latch where the set dominates. If the set (S1) and reset (R) signals are both true, the output address OUT will be 1.
● SR is a reset dominant latch where the reset dominates. If the set (S) and reset (R1) signals are both true, the output address OUT will be 0.
● The OUT parameter specifies the bit address that is set or reset. The optional OUT output Q reflects the signal state of the "OUT" address.
Instruction S1 R "OUT" bit
RS 0 0 Previous state
0 1 0
1 0 1
1 1 1
S R1
SR 0 0 Previous state
0 1 0
1 0 1
1 1 0
6.1.1.2 Positive and negative edge instructions
Positive and Negative transition detectors
P contact: LAD N contact: LAD P box: FBD N box: FBD
P coil: LAD N coil: LAD P= box: FBD N= box: FBD
P_TRIG: LAD\FBD N_TRIG: LAD\FBD
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Programming instructions 6.1 Basic instructions
Parameter Data type Description
M_BIT BOOL Memory bit in which the previous state of the input is saved IN BOOL Input bit whose transition edge is to be detected
OUT BOOL Output bit which indicates a transition edge was detected CLK BOOL Power flow or input bit whose transition edge is to be detected Q BOOL Output which indicates an edge was detected
P contact:
LAD The state of this contact is TRUE when a positive transition (OFF-to-ON) is detected on the assigned "IN" bit. The contact logic state is then combined with the power flow in state to set the power flow out state. The P contact can be located anywhere in the network except the end of a branch.
N contact:
LAD The state of this contact is TRUE when a negative transition (ON-to-OFF) is detected on the assigned input bit. The contact logic state is then combined with the power flow in state to set the power flow out state. The N contact can be located anywhere in the network except the end of a branch.
P box:
FBD The output logic state is TRUE when a positive transition (OFF-to-ON) is detected on the assigned input bit. The P box can only be located at the beginning of a branch.
N box:
FBD The output logic state is TRUE when a negative transition (ON-to-OFF) is detected on the assigned input bit. The N box can only be located at the beginning of a branch.
P coil:
LAD The assigned bit "OUT" is TRUE when a positive transition (OFF-to-ON) is detected on the power flow entering the coil. The power flow in state always passes through the coil as the power flow out state. The P coil can be located anywhere in the network.
N coil:
LAD The assigned bit "OUT" is TRUE when a negative transition (ON-to-OFF) is detected on the power flow entering the coil. The power flow in state always passes through the coil as the power flow out state. The N coil can be located anywhere in the network.
P= box:
FBD The assigned bit "OUT" is TRUE when a negative transition (OFF-to-ON) is detected on the logic state at the box input connection or on the input bit assignment if the box is located at the start of a branch. The input logic state always passes through the box as the output logic state. The P= box can be located anywhere in the branch.
N= box:
FBD The assigned bit "OUT" is TRUE when a negative transition (ON-to-OFF) is detected on the logic state at the box input connection or on the input bit assignment if the box is located at the start of a branch. The input logic state always passes through the box as the output logic state. The N= box can be located anywhere in the branch.
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Programming instructions 6.1 Basic instructions
P_TRIG:
LAD/FBD The Q output power flow or logic state is TRUE when a positive transition (OFF-to-ON) is detected on the CLK input state (FBD) or CLK power flow in (LAD). In LAD, the P_TRIG instruction cannot be located at the beginning or end of a network. In FBD, the P_TRIG instruction can be located anywhere except the end of a branch.
N_TRIG
(LAD/FBD) The Q output power flow or logic state is TRUE when a negative transition (ON-to-OFF) is detected on the CLK input state (FBD) or CLK power flow in (LAD). In LAD, the N_TRIG instruction cannot be located at the beginning or end of a network. In FBD, the P_TRIG instruction can be located anywhere except the end of a branch.
All edge instructions use a memory bit (M_BIT) to store the previous state of the input signal being monitored. An edge is detected by comparing the state of the input with the state of the memory bit. If the states indicate a change of the input in the direction of interest, then an edge is reported by writing the output TRUE. Otherwise, the output is written FALSE.
Note
Edge instructions evaluate the input and memory-bit values each time they are executed, including the first execution. You must account for the initial states of the input and memory bit in your program design either to allow or to avoid edge detection on the first scan.
Because the memory bit must be maintained from one execution to the next, you should use a unique bit for each edge instruction, and you should not use this bit any other place in your program. You should also avoid temporary memory and memory that can be affected by other system functions, such as an I/O update. Use only M, global DB, or Static memory for the M_BIT.
6.1.2 Timers
You use the timer instructions to create programmed time delays:
● TP: The Pulse timer generates a pulse with a preset width time.
● TON: The ON-delay timer output Q is set to ON after a preset time delay.
● TOF: The OFF-delay timer output Q is reset to OFF after a preset time delay.
● TONR: The ON-delay Retentive timer output is set to ON after a preset time delay.
Elapsed time is accumulated over multiple timing periods until the R input is used to reset the elapsed time.
● RT: Reset a timer by clearing the time data stored in the specified timer instance data block.
Each timer uses a structure stored in a data block to maintain timer data. You assign the data block when the timer instruction is placed in the editor.
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Programming instructions 6.1 Basic instructions
When you place timer instructions in a function block, you can select the Multi-instance data block option, the timer structure names can be different with separate data structures, but the timer data is contained in a single data block and does not require a separate data block for each timer. This reduces the processing time and data storage necessary for handling the timers. There is no interaction between the timer data structures in the shared Multi-instance data block.
Note
Although not typical, you can assign the same Single-instance timer structure name to multiple timer instructions, thus sharing the structure data among the multiple timer instructions. You must account for any interaction resulting from a shared structure in your program design.
LAD
TP, TON, and TOF timers have the same input and output parameters.
The TONR timer has the additional reset input parameter R.
Create you own "Timer name" that names the timer Data Block and describes the purpose of this timer in your process.
"Timer name"
----[ RT ]----
The RT instruction resets the timer data for the specified timer.
Parameter Data type Description
IN BOOL Enable timer input
R BOOL Reset TONR elapsed time to zero
PT TIME Preset time value input
Q BOOL Timer output
ET TIME Elapsed time value output
Timer data block DB Specify which timer to reset with the RT instruction
Parameter IN starts and stops the timers:
● The 0 to 1 transition of parameter IN starts timers TP, TON, and TONR.
● The 1 to 0 transition of parameter IN starts timer TOF.
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Programming instructions 6.1 Basic instructions
Effect of value changes in the PT and IN parameters:
● TP:
– Changing PT has no effect while the timer runs – Changing IN has no effect while the timer runs
● TON:
– Changing PT has no effect while the timer runs
– Changing IN to FALSE, while the timer runs, resets and stops the timer
● TOF:
– Changing PT has no effect while the timer runs
– Changing IN to TRUE, while the timer runs, resets and stops the timer
● TONR:
– Changing PT has no effect while the timer runs, but has an effect when the timer resumes.
– Changing IN to FALSE, while the timer runs, stops the timer but does not reset the timer. Changing IN back to TRUE will cause the timer to start timing from the accumulated time value.
TIME values
PT (preset time) and ET (elapsed time) values are stored in memory as signed double integers that represent milliseconds of time. TIME data uses the T# identifier and can be entered as a simple time unit "T#200ms" or as compound time units "T#2s_200ms".
Data type Size Valid number ranges TIME 32 bits
Stored as
T#-24d_20h_31m_23s_648ms to T#24d_20h_31m_23s_647ms
-2,147,483,648 ms to +2,147,483,647 ms
TP: Pulse timing diagram
,1
4
(7 37
37 37 37
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Programming instructions 6.1 Basic instructions
TON: ON-delay timing diagram
,1
4
(7
37
37
37
TOF: OFF-delay timing diagram
,1
4
(7
37
37
37
TONR: ON-delay Retentive timing diagram
,1
4 5
(7
37
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Programming instructions 6.1 Basic instructions
6.1.3 Counters
6.1.3.1 Counters
You use the counter instructions to count internal program events and external process events:
● CTU is a count up counter.
● CTD is a count down counter.
● CTUD is a count up and down counter.
Each counter uses a structure stored in a data block to maintain counter data. You assign the data block when the counter instruction is placed in the editor. These instructions use software counters whose maximum counting rate is limited by the execution rate of the OB they are placed in. For faster external counting operations, see the CTRL_HSC instruction.
When you place counter instructions in a function block, you can select the Multi-instance data block option, the counter structure names can be different with separate data structures, but the counter data is contained in a single data block and does not require a separate data block for each counter. This reduces the processing time and data storage necessary for the counters. There is no interaction between the counter data structures in the shared Multi-instance data block.
Note
Although not typical, you can assign the same Single-instance counter structure name to multiple counter instructions of the same size, thus sharing the structure data among the multiple counter instructions. You must account for any interaction resulting from a shared structure in your program design.
LAD/FBD
Select the count value data type from the drop-down list under the box name.
Create your own "Counter name" that names the counter Data Block and describes the purpose of this counter in your process.
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Programming instructions 6.1 Basic instructions
Parameter Data type Description
CU, CD BOOL Count up or count down, by one count
R (CTU, CTUD) BOOL Reset count value to zero
LOAD (CTD, CTUD) BOOL Load control for preset value
PV SINT, INT, DINT, USINT,
UINT, UDINT Preset count value
Q, QU BOOL True if CV >= PV
QD BOOL True if CV <= 0
CV SINT, INT, DINT, USINT,
UINT, UDINT Current count value
The numerical range of count values depends on the data type you select. If the count value is an unsigned integer type, you can count down to zero or count up to the range limit. If the
The numerical range of count values depends on the data type you select. If the count value is an unsigned integer type, you can count down to zero or count up to the range limit. If the