Correlation between defect structures and electrical properties

Figure 4-8(a) and (b) show the AFM topography and the SCM images simultaneously acquired while the tip was applied with a Vtip of 0.664 V plus a 2 V ac modulation at 23 kHz. Viewing the topographic image, we observed small grains of 80 ~ 110 nm in diameter, which is comparable to the grain size obtained by XRD and TEM. As discussed above, the structure of the ZnO layer is described as a columnar-grain structure consisting of epitaxial cores and small-angle grain

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boundaries (annular regions) with edge TDs at a large density. The bright and dark regions in the topographic AFM image are associated with the epitaxial cores and the boundaries, respectively.

The correlation between the AFM and the SCM images is obvious. It is worth noting that we exclude that the correlation is due to topographic effect on the capacitance signals since the root-mean-square surface roughness is only 1.2 nm and the SCM contrast vanishes as a negative Vtip is applied. The dC/dV-Vtip curves shown in Fig. 4-8(c) were extracted from the grain region (cross marked A) and from the boundary region (cross marked B) in Fig. 4-8(b), respectively. The curves were obtained after averaging forward and reverse sweeps to exclude the piezoelectricity of ZnO. It was found that the peak value of dC/dV signal at point A is lower than that at point B, implying that the grain region has the capacitance with less dependence on the dc bias and its local free carrier concentration in the grain region is higher than that at the boundary. The flatband voltage, defined as the voltage at the dC/dV peak, shifts about +0.57 V between the two regions; this accounts for the SCM contrast at the optimum Vtip (0.664 V). Furthermore, the coincidence of the curves as the Vtip

set below −0.7 V suggests that the response of charge carriers to ac modulation is similar between the post-depletion and the inversion realms.

The shift of flatband voltage can be attributed to two factors: interface trap density

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(Dit) and fixed charge density (Nf) [18]. Nf only causes a shift of dC/dV curve, but Dit can introduce not only a shift but also a stretch. Hong et al. [19] reported that the ratio of FWHM of dC/dV curve to ∆V is fixed if only Dit is present, where ∆V represents the deviation in bias from the dC/dV peak with a given change in dC/dV value (and hence a change in surface potential). The ratios of FWHM to ∆V in the grain and boundary regions estimated from Fig. 4-8(c) are 0.85 and 0.91, respectively.

Consequently, we believe that the shift of flatband voltage is mainly caused by the effect of Dit, which is higher in boundary regions than in the grain regions.

Accordingly, the local carrier concentration should be lower at the boundary region, which agrees with the inference from the peak value of dC/dV above. The TDs would increase the Dit in the annular region and consequently introduce deep acceptor-like trap states in ZnO films.

This SCM result agrees with the reported charge density distribution around the dislocation cores by Müller et al., who measured the electrostatic potential in the vicinity of charged dislocations by employing electron holography in a TEM and derived the charge density accordingly [20]. Since wurtzite ZnO has a high piezoelectric constant, it is possible that part of charges observed by SCM could be piezoelectric (bound) charges at the surface, generated by the strain field of the dislocations [21]. However, Müller et al. estimated the magnitude of piezoelectric

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charges in the dislocations is insignificant as compared with that of charges filled in the dislocations. Therefore, we suggest that Dit is the major component of dislocation charges in ZnO.

Fig. 4-9(a) and (b) show the AFM topography and current images simultaneously extracted under Vtip = 3 V, with the current image shown at reverse contrast. To manifest the correlation between topography and conductivity, these two images are overlaid as shown in Fig. 4-9(c). The current spots, indicative of the more conductive regions, occur only in the grains but not at the boundaries. The I-V curves taken in the grain (cross marked A) and at the boundaries (cross marked B) are both shown in Fig. 4-9 (d). The observed shift of forward bias between grain and boundary indicates the possibility of charge trapping. The current apparently diminishes at the reverse bias because of the rectification of the nonideal Pt/ZnO Schoktty contact, as there exists a native insulator at the tip-sample junction. In addition, the emission current at the boundary is lower than that at the grain, reflecting that the boundary has a potential barrier higher than the grain. Tivarus et al. [22] has demonstrated that the negative charge states related to the TDs close to the surface increased the local potential barrier at the dislocation, and that the emission current was suppressed at the boundary due to the increase in potential barrier associated with the negative-charged Dit.

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Recently, we further investigated the potential barrier height by fitting the local I-V curve of CAFM in the negatively charged edge TDs region using the model

proposed by Müller et al. [20]. The result indicates the potential barrier height of larger than 0.4 eV below the conduction band minimum (ECBM) of ZnO between edges TDs region and epitaxial core, implying the dislocation states of ~0.4 eV below ECBM. Collating the defect energy level of ZnO with dislocation state, we suggest the negatively trapped charges are associated with the point defects formed by the Zinc vacancy (VZn), which is ~0.4 - 0.5 eV below ECBM [23, 24]. The observation indicates the edge dislocation core is formed by Zn vacancies and electrically active.

The increase in the potential barrier and the charge scattering related to Dit would lead to the reduction of the carrier mobility, thereby degrading the performance of electro-optic devices. Therefore, the reduction of TDs is an important issue for the future application of ZnO thin films. On the other hand, because the distribution of the screw TDs is much less than that of the edge TDs, we cannot confirm the location of the screw TDs and their electrical properties.