First, the CPU determines the number of DP and PA master systems at which you want to add/remove slaves/modules or modify assignments in the existing process image partition. If the CPU finds a maximum of four affected master systems it continues the check. If more than four are found, the CPU will reject the modified configuration.
In the next test the CPU calculates the CiR synchronization time as follows:
• If you only want to change the parameters of existing modules, then the following applies regardless of the type of CPU:
CiR synchronization time for the CPU = 100 ms In all other cases the following applies:
The CiR synchronization time of the CPU is proportional to the cumulative CiR synchronization times of all relevant master systems.
Relevant master systems the systems at which you add/remove slaves or modules or modify the process image partition assignment.
• CiR synchronization time of a relevant master system = basic master system load + the total I/O volume of the master system in bytes * time per byte. The total I/O volume of the master system in bytes is composed of the sum of physically existing I/O bytes and the I/O bytes of the CiR elements at this master system. The system load for the each CPU type used to calculate the required load for the master system and the time per byte can be found in the technical data for your CPU.
Note
• In this case the calculation of the CiR synchronization time is based on a worst-case scenario. This means that during a CiR operation the actually incurred CiR synchronization time is always lower or equal.
• The CiR synchronization time for a master system is shown in HW Config in the properties window for the associated CiR object.
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How a Reconfiguration in RUN Mode Affects the Process
The following illustration shows the relationship between the CiR synchronization time for a master system and its overall I/O volume. This example is based on a CPU 417-4.
200 400 1000
* corresponds, for example, to the maximum MPI-S-interface address area (2 K inputs+ 2 K outputs) 8 K**
4 K*
Total I/O-volume in bytes CiR synchronization time in ms
** corresponds, for example, to the maximum address area of an external DP interface module (4 K inputs + 4 K outputs) 1 K
Using this diagram, you can use the maximum CiR synchronization time as a basis for easily determining the maximum extent of the master system if you are only making changes to one DP master system. This will be explained using an example (see below).
The CPU now compares the calculated CiR synchronization time with the actual valid high limit of the CiR synchronization time. You can call SFC104 "CiR" to modify the default high limit value of 1 second up or down as you see fit.
If the calculated value is smaller than or equal to the actual high limit, the CPU will accept the modified configuration. Otherwise, it will reject it.
The formula specified above shows that you can influence the CiR synchronization time as follows:
• The lower the volume of I/O bytes for a master system you select,
• the lower the number of guaranteed slaves you select at the master systems to be changed (The number of guaranteed slaves has an immediate effect on the volume of I/O bytes.),
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How a Reconfiguration in RUN Mode Affects the Process
• the less master systems you want to change in a CiR process,
the shorter the CiR synchronization time is. This effect is highly significant especially for F systems, since in this case the F-monitoring time must include the CiR synchronization time. Be sure to use the largest value for all DP master systems with the CiR object (if only one DP master system is being changed per CiR operation) or the total for all the master systems that are to be changed simultaneously.
The table below shows an example of a CPU 417-4 with 6 DP master systems.
Assume that the maximum permitted CiR synchronization time amounts to 550 ms.
This means that changes can be carried out on several master systems as long as the total CiR synchronization time for these master systems does not exceed 550 ms. The last column shows which DP master systems you may change in a single CiR operation.
CiR synchronization time for the master system
Distribution of changes on DP master systems
1 1500 100 ms + 1500 bytes * 0.12 ms/byte = 280 ms Either 1 (280 ms) or
Example of determining the extent of a DP master system
Assume a maximum CiR synchronization time of 400 ms. In this case, the diagram shows you a maximum of 2500 I/O bytes total volume for the DP master system (dashed line). If, for future use, you intend have 250 input and 250 output bytes in the CiR object, then there are 2000 bytes available for the first configuration operation on the DP master system.
This example discusses the following two configurations:
• When using ET 200M stations in maximum expansion (128 byte inputs, 128 byte outputs, with some of this in CiR modules, if necessary) you can thus operate a total of 2000/(128 + 128), which yields approx. 8 ET 200M stations.
• If you typically need 48 bytes per ET 200M station (i.e. 6 analog modules, each with 4 channels at 2 bytes or a smaller expansion with a CiR module), you can thus operate a total of 2000/48, which yields approx. 24 ET 200M stations.
If the expansions who here are not sufficient for your needs, you can manage this situation as follows:
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How a Reconfiguration in RUN Mode Affects the Process
• Install a more powerful CPU (CPU with less time per byte; for further information see the technical data).
• Select several smaller master systems instead of one large master system.
• Select one or more master systems with a very large expansion and a CiR object with no guaranteed slaves. For these master systems, you can use CiR only to change the parameters of already existing modules. In addition, select small master systems when you want to add or remove slaves or modules or make a change in the existing process image partition (part process image) assignment.