• 沒有找到結果。

Chapter 2 Hardware Architecture

2.1 Development board

Chapter 2 Hardware Architecture

2.1 Development board

To develop the embedded system, it’s inevitable to choose the target board.

It must be careful to choose the target board, because it catches up in the development environment and the technical support.

2.1.1 CISC V.S. RISC [7]

In the development of the embedded system microprocessor, it can be divided into two kinds of architecture according to the characteristic of the instruction: CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer).

RISC architecture makes use of a small set of simplified instructions in attempt to improve performance. These instructions consist mostly of register-to-register operations. Only load and store instructions access memory.

Since almost all instructions make use of register addressing, there are only a few addressing modes in a reduced instruction set computer and there are a large number of general-purpose registers. Another way in which reduced instruction set computers sought to improve performance was to have most instructions complete execution in one machine cycle. Pipelining was a key technique in

achieving this. Pipelining allows the next instruction to enter the execution cycle while the previous instruction is still processing.

The advantages of a reduced instruction set computer:

Faster.

Simpler hardware.

Shorter design cycle due to simpler hardware.

Lower cost since more parts can be placed on a single chip.

The disadvantages of a reduced instruction set computer include:

Programmer must pay close attention to instruction scheduling so that the processor does not spend a large amount of time waiting for an instruction to execute.

Debugging can be difficult due to the instruction scheduling.

Require very fast memory systems to feed them instructions.

CISC used microcode to simplify the computer's architecture. In a micro programmed system, the ROM contains a group of microcode instructions that correspond with each machine-language instruction. When a machine language instruction arrives at the processor, it executes the corresponding series of microcode instructions. Microcode acts as a transition layer between the instructions and the electronics of the computer. This also improved performance, since instructions could be retrieved up to ten times faster from ROM than from main memory. Other advantages of using microcode included fewer transistors, easier implementation of new chips, and a micro programmed design can be easily modified to handle new instructions sets.

Another characteristic of complex instructions set is their variable-length instruction format.

Advantages of CISC include:

Less expensive due to the use of microcode.

Upwardly compatible because a new computer would contain a superset of the instructions of the earlier computers.

Fewer instructions could be used to implement a given task, allowing for more efficient use of memory.

Simplified compiler, because the microprogram instruction sets could be written to match the constructs of high-level languages.

More instructions can fit into the cache, since the instructions are not a fixed size.

Disadvantages of CISC:

Instruction sets and chip hardware became more complex with each generation of computers, since earlier generations of a processor family were contained as a subset in every new version.

Different instructions take different amount of time to execute due to their variable-length.

Many instructions are not used frequently; approximately 20% of the available instructions are used in a typical program

2.1.2 Common microprocessors

From the above discussion, we can divide the microprocessors into two kinds: RISC and CISC. The following are the common microprocessors in the market.

(1) RISC architecture

ARM

Each product family consists of high-performance, energy efficient designs built to handle the performance demands of today’s increasingly complex electronics applications. ARM offers the industry’s broadest range of 16/32-bit embedded RISC cores that are grouped into a range of families: the ARM7, the ARM9, the ARM10, and ARM11 of microprocessor cores.

OMAP

Produced by TI (Texas Instrument), from smart phones to high-end, multimedia-rich 3G wireless handsets and PDAs, the scalable family of OMAP processors delivers the best combination of high-performance and ultra-low power consumption.

XScale

The Intel XScale microarchitecture is based on a new core which is compliant with ARM-5TE. The microarchitecture surrounds the core with instruction and data memory management units;

instruction, data, and mini-data caches; write, fill, pend, and branch target buffers; power management, performance monitoring, debug, and JTAG units; coprocessor interface; 32K caches, MMUs.

MIPS

MIPS is a RISC microprocessor architecture developed by MIPS Computer Systems Inc. MIPS designs have found broad application in embedded systems, Windows CE devices, and Cisco routers. The Nintendo 64 console, Sony PlayStation console, Sony PlayStation 2 console, and Sony PSP handheld system use MIPS processors. By the late 1990s it was estimated that one in three of all

RISC chips produced were MIPS-based designs.

(2) CISC architecture

Mainly the x86 instruction, such as AMD-K6E, and Advantech’s x86 products.

2.1.3 Trade off

When choosing the development board to the control system of the treadmill, we should consider the following points:

CPU: The speed of the CPU is an important point that we should notice; we use the programming language C# to develop the application, and it may need the high-speed CPU to prevent the occurrence of latency, and the most important thing of the treadmill is safety, and we should prevent the injury owing to latency. Compared with the CISC architecture’s CPU, the fastest CPU of the RISC architecture is XScale, and it only reaches 400 MHz. It’s better to choose CISC architecture’s CPU to have the high speed CPU.

Cache: some CISC architecture has larger cache than RISC architecture.

Heat dissipation: The RISC architecture has the better performance of heat dissipation.

Display chipset: We try to make the user interface more friendly by use of graphical images, so it’s better to have display chipset; some CISC architecture has the

display chipset.

From the above discussion, we need the high speed CPU, and it’s better to have cache, and display chipset, so CISC architecture is the better choice, but in the aspect of heat dissipation, the CISC architecture has the worse performance, so CISC architecture usually has the fan to improve the heat dissipation problem.

In our treadmill system, we want no fan in the development board, and there are some x86 based development boards that support fanless corresponding to our requirement. The table 2.1 is the comparison between some Advantech’s products. (○: good, △: acceptable, X: bad)

Under the comparison, we choose PCM-9575 to be the development board;

The CPU is 667 MHz, and there are L1, L2 cache, and it can operate without fan under the temperature 60°c. The specification of the PCM-9575 is shown in table 2.2 and the picture is shown in figure 2.1.

相關文件