Event Maskable Drum (DRUM): FB85

The Event Maskable Drum (DRUM) function block drives the programmed output bits (OUT1 to OUT16) and the word output (OUT_WORD) with the programmed values (OUT_VAL) of the appropriate step conditioned by the enabling masks (S_MASK) for that step while the DRUM remains on that step. The DRUM will advance to the next step when either the event for the step is true and the programmed time for the current step has expired, or the jog input transitions from 0 to 1. When the signal state of RESET is 1, the DRUM is reset, which sets the current step equal to the preset step (DSP).

The amount of time spent on a step is determined by the product of the DRUM time base preset (DTBP) and the count preset/step values (S_PRESET) corresponding to each step. At the start of a new step, this calculated value is loaded into DCC which contains the time remaining for the current step. For example, if DTBP is equal to 2, and the preset value for step 1 is equal to 100 (100 msec), then DCC equals 200 (200 msec).

A step may be programmed with a time value, or an event, or both. Steps with an event bit and a time value of zero, advance to the next step as soon as the signal state of the event bit is 1. Steps with only a time start timing immediately. Steps with an event bit and a time value greater than 0 begin timing when the signal state of the event bit is 1. The event bits are initialized with a signal state of 1.

When the step pointer is on the last programmed step (LST_STEP) and the time for that step has expired, the signal state of output (Q) is set to 1, otherwise it is set to 0. Once Q is set, the DRUM remains on that step until reset.

The configurable mask (S_MASK) allows selection of the individual bits in the output word (OUT_WORD) and the output bits (OUT1 to OUT16) to be set/reset by the output values (OUT_VAL). When a bit of the configurable mask has a signal state of 1, the OUT_VAL value sets/resets the

corresponding bit. When a bit of the configurable mask has a signal state of 0, the corresponding bit is left unchanged. Each of the bits of the

configurable mask for all 16 steps is initialized with a signal state of 1.

The output bit OUT1 corresponds with the least-significant bit of the word output OUT_WORD. The output bit OUT16 corresponds with the

most-significant bit of the word output OUT_WORD.

Description

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Table 5-5describesthe Event Maskable Drum (DRUM) parameters.

Table 5-5 Event Maskable Drum (FB85) Parameters

Parameter Declaration Data Type Memory Area Description

EN Input BOOL I, Q, M, D, L Enable input with signal state of 1 activates the box ENO Output BOOL I, Q, M, D, L Enable output has a signal state of 1 if the function

is executed without error

RESET Input BOOL I, Q, M, D, L A signal state of 1 indicates a reset condition JOG Input BOOL I, Q, M, D, L A transition of a signal state of 0 to 1 advances

DRUM to the next step

DRUM_EN Input BOOL I, Q, M, D, L A signal state of 1 enables the drum to advance based on the event and timing criteria

LST_STEP Input BYTE I, Q, M, D, L,

or constant

Step number of the last step programmed

EVENT1 Input BOOL I, Q, M, D, L Event bit 1; initial signal state is 1 EVENT2 Input BOOL I, Q, M, D, L Event bit 2; initial signal state is 1 EVENT3 Input BOOL I, Q, M, D, L Event bit 3; initial signal state is 1 EVENT4 Input BOOL I, Q, M, D, L Event bit 4; initial signal state is 1 EVENT5 Input BOOL I, Q, M, D, L Event bit 5; initial signal state is 1 EVENT6 Input BOOL I, Q, M, D, L Event bit 6; initial signal state is 1 EVENT7 Input BOOL I, Q, M, D, L Event bit 7; initial signal state is 1 EVENT8 Input BOOL I, Q, M, D, L Event bit 8; initial signal state is 1 EVENT9 Input BOOL I, Q, M, D, L Event bit 9; initial signal state is 1 EVENT10 Input BOOL I, Q, M, D, L Event bit 10; initial signal state is 1 EVENT11 Input BOOL I, Q, M, D, L Event bit 11; initial signal state is 1 EVENT12 Input BOOL I, Q, M, D, L Event bit 12; initial signal state is 1 EVENT13 Input BOOL I, Q, M, D, L Event bit 13; initial signal state is 1 EVENT14 Input BOOL I, Q, M, D, L Event bit 14; initial signal state is 1 EVENT15 Input BOOL I, Q, M, D, L Event bit 15; initial signal state is 1 EVENT16 Input BOOL I, Q, M, D, L Event bit 16; initial signal state is 1

OUT1 Output BOOL I, Q, M, D, L Output bit 1

OUT2 Output BOOL I, Q, M, D, L Output bit 2

OUT3 Output BOOL I, Q, M, D, L Output bit 3

OUT4 Output BOOL I, Q, M, D, L Output bit 4

OUT5 Output BOOL I, Q, M, D, L Output bit 5

OUT6 Output BOOL I, Q, M, D, L Output bit 6

OUT7 Output BOOL I, Q, M, D, L Output bit 7

Parameters

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Table 5-5 Event Maskable Drum (FB85) Parameters

Parameter Declaration Data Type Memory Area Description

OUT11 Output BOOL I, Q, M, D, L Output bit 11

OUT12 Output BOOL I, Q, M, D, L Output bit 12

OUT13 Output BOOL I, Q, M, D, L Output bit 13

OUT14 Output BOOL I, Q, M, D, L Output bit 14

OUT15 Output BOOL I, Q, M, D, L Output bit 15

OUT16 Output BOOL I, Q, M, D, L Output bit 16

Q Output BOOL I, Q, M, D, L A signal state of 1 indicates the last step timed out OUT_WORD Output WORD I, Q, M, D, L, P Word location to which the drum writes the output

values

ERR_CODE Output WORD I, Q, M, D, L, P Returns a value of W#16#0000 if the instruction executes without error; see Error Information for values other than W#16#0000

JOG_HIS Static BOOL I, Q, M, D, L Jog history bit

EOD Static BOOL I, Q, M, D, L A signal state of 1 indicates the last step timed out

DSP Static BYTE I, Q, M, D, L, P Drum step preset

DSC Static BYTE I, Q, M, D, L, P Drum step current

DCC Static DWORD I, Q, M, D, L, P Drum count current DTBP Static WORD I, Q, M, D, L, P Drum time base preset PREV_TIME Static DWORD I, Q, M, D, L Previous system time

S_PRESET Static ARRAY of

WORD

I, Q, M, D, L Count preset for each step [1 to 16], where 1 count = 1 msec

OUT_VAL Static ARRAY of

BOOL

I, Q, M, D, L Output values for each step [1 to 16, 0 to 15]

S_MASK Static ARRAY of

BOOL

I, Q, M, D, L Configurable mask for each step [1 to 16, 0 to 15]

Initial signal states are 1

If any of the conditions shown in Table 5-6 occur, the DRUM will remain on the current step. The signal state of ENO is set to 0 and ERR_CODE is set appropriately.

Table 5-6 Error Conditions for FB85

ERR_CODE Explanation

W#16#000B LST_STEP value is less than 1 or greater than 16 Error Information

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Figure 5-4 shows how the DRUM instruction works. If the signal state of input I0.0 is 1 (activated), the DRUM function block is executed. In this example, the DRUM advances from step 1 to step 2. The output bits (OUT1, etc.) and OUT_WORD are set based upon the configured mask for step 2 and the OUT_VAL bits for step 2.

If the function block is executed without error, the signal states of ENO and Q4.0 are set to 1 and ERR_CODE is set equal to W#16#0000.

Note

Initialization of static parameters may be accomplished by using the Data Block Editor.

Before execution: Before execution (continued):

Inputs

RESET M0.0 = FALSE

JOG M0.1 = FALSE

DRUM_EN M0.2 = TRUE LST_STEP MB1 = B#16#08

EVENT2 M20.0 = FALSE

JOG_HIS DBX12.0 = FALSE

EOD DBX12.1 = FALSE

DSP DBB13 = W#16#0001

DSC DBB14 = W#16#0001

DCC DBD16 = DW#16#0000000A

DTBP DBW20 = W#16#0001

S_PRESET [1] DBW26 = W#16#0064 S_PRESET [2] DBW28 = W#16#00C8 OUT_VAL [1,0] DBX58.0 = TRUE

OUTWORD MW8 = W#16#4321 ERR_CODE MW10 = W#16#0000

After execution:

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