F UTURE W ORK

The proposed motion compensation for dual-video standard only supports P frame decoding. If we want to H.264@Main Profile, the subjects such as B-frame, weighted prediction, and direct mode should be taken into account. Because B-frame may contains double motion vectors, it requires read reference data from forward and backward frames and then write reconstructed data to display buffer. These operations are more complicated than P frame; thus, the scheduling of the read/write accesses efficiently to meet our decoder specification is a challenge.

Considering memory organization topic on this dissertation, a dual-channel SDRAM controller for ping-pong structured frame memories has been presented in this thesis.

However, there are still some important issues should be considered in order to provide more complete system integration. For example, if display buffer shares the data bus with frame memories, a smarter bus arbitration and memory controller should be designed. As for merging structured frame memory organization based on H.264/AVC decoder, we give the analysis for 4 x 4 block based perfect match. However, there are still many issues have to be analyzed if we want to exploit this idea on ASIC design. The related work only targets on search range [-16, +15] since this size is identical to one MB size. Based on this search range,

the design of in-place FIFO and dirty table becomes easier. If we want to target on large search range, the size of in-place FIFO becomes very large and design of the address generator becomes more complicated. Another problem is that the proportion of perfect match block must be larger than the backup of the content of in-place FIFO; otherwise, the update and backup between background memory and in-place FIFO will degrades the throughput of the entire video decoder. In brief, the feasibility of the merging structured memory organization on ASIC design still has to be evaluated.

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作 者 簡 歷

姓名 ：王勝仁

出生地 ：台灣省台南市 出生日期：1980. 12. 11

學歷： 1987. 9 ~ 1993. 6 台南市立大橋國民小學 1993. 9 ~ 1996. 6 台南私立瀛海中學 1996. 9 ~ 1999. 6 台南市立第一高級中學

1999. 9 ~ 2003. 6 國立交通大學 電子工程系 學士

2003. 9 ~ 2005. 6 國立交通大學 電子研究所 系統組 碩士

得 獎 事 績

2002 春 第二學期電子研究所書卷獎 2002 秋 殷之同專題計畫獎學金 2003 春 殷之同專題成果獎學金

發 表 論 文

S. Z. Wang, T. A. Lin, T. M. Liu, and C. Y. Lee, “A new motion compensation design for H.264/AVC decoder,” in Proc. IEEE Int. Symp.Circuits and Systems, 2005, pp.

4558-4561.

T. A. Lin, S. Z. Wang, T. M. Liu, and C. Y. Lee, “An H.264/AVC decoder with 4x4 level pipeline,” in Proc. IEEE Int. Symp.Circuits and Systems, vol. ?,2005 , pp. 1806-1809.

T. M. Liu, S. Z. Wang, W. H. Peng, and C. Y. Lee, “Memory efficient and low complexity scalable soft VLC decoding for the video transmission,” in Proc. IEEE Asia-Pacific Conf. Circuits and Systems, 2004. Proceedings, vol. 2, 2004, pp. 673-676.