Chapter 3 Variable and Overlapped Cluster-based MIMO Detection
3.2.6 Detail Matching
The technique Detail Matching used here is one of the well-known SD algorithms named K-best algorithm. It is a breadth-first algorithm based on a tree decoding structure only searching in the forward direction, but the best K candidates are kept at each level. We make a distinct change in the origin K-best algorithm by eliminating the search space of the extending child nodes remarkably, and the principle of Detail Matching is outlined as below.
1) At the root node, initialize all paths with PED (Partial Euclidean Distance) zero.
2) Apply Variable and Overlapped Cluster-based Algorithm to prune the search space of the extending child nodes.
3) Extend each survivor path, retained from the previous node, to contender paths, and then update the accumulated PEDs for each path.
4) Sort the contender paths according to their accumulated PEDs, and select the shortest K-best paths.
5) Update the path history for each retained path, and discard the other paths.
6) If the iteration arrives at the end node, stop the algorithm. Otherwise, go to 2).
The best path at the final iteration is the hard decision output of the decoder. The advantage of the K-best algorithm over the sequential algorithm is its fixed decoding throughput, since it is easily implemented in a parallel and a pipelined fashion.
Meanwhile, a strict K-best algorithm should keep as large as possible without compromising on the optimality, compared with the exhaustive-search ML algorithm.
However, limitation can reduce the complexity of the breadth-first algorithm.
Therefore, there is a tradeoff between complexity and performance in to select a proper K value.
Figure 3.8 Illustration of Detail Matching in 64QAM
Chapter 4
Simulation Results
This section compares performance and complexity between K-best SD and the Variable and Overlapped Cluster-based Algorithm in MIMO detection. Note that the performance comparison is considered under packet error rate (PER) 0.08 and normalizes to the ML detection methods.
A typical MIMO-OFDM system is based on IEEE 802.11n Wireless LANs, TGn Sync Proposal Technical Specification [10] which is used as the reference design platform. The simulation model is mainly based on TGn multipath specification of mode E, which is the multipath fast-fading channel model of 15-taps and 100ns Root Mean Square (RMS) delay. The major simulation parameters are shown in Table 4.1.
Environment Description
Parameter Value
Simulation Platform IEEE 802.11n
Signal Bandwidth 40 MHz
Number of subcarries 108 subcarriers
FFT size 128 points
Number of antenna 4 Tx 4 Rx / 8 Tx 8 Rx Forward Error Correction Convolution and Viterbi
(Coding Rate 2/3) Packet size 1024 Bytes per Tx antenna
Channel Model TGN-E with AWGN
RMS delay spread 100 ns
Subcarrier modulation 64QAM/256QAM
Preprocessing Block SQRD、ZFD
Signal Detection K-best SD Algorithm
Variable and Overlapped Cluster-based Table 4.1 Simulation parameters
4.1 Performance Evaluation
Since K-best sphere decoder was accepted in practical implementation, the goal of our Variable and Overlapped Cluster-based algorithm is complexity reduction and remains performance at the same time. To compare with the K-best sphere decoder, we tune K-best parameter: k and cluster parameter: Spanning Cluster Candidate &
Boundary to have nearly the same performance in different methods.
For the purpose of performance comparison, Fig. 4.1 and Fig. 4.2 present the PER with ML, the Variable and Overlapped Cluster-based algorithm as well as K-best sphere decoders for 4 x 4 and 8 x 8 MIMO-OFDM systems. The methods such as the proposed Variable and Overlapped Cluster-based method and K-best sphere decoder maintain SNR degradation within 0.57dB in the Fig. 4.2 and 0.58dB to 1.02dB in the Fig. 4.3.
The table 4.2 summarizes the performance of Fig. 4.1 normalized to ML detection method and the complexity compared with the K-best SD algorithm. The proposed Variable and Overlapped Cluster-based algorithm can maintain performance within 0.57dB such that the method is suitable for practical system. And the algorithm complexity can reduce to 27.29% ~ 56.25% in average case and 39.06% ~ 57.25% in worst case which means the hardware cost in practical implementation.
For 8 x 8 MIMO-OFDM systems in the table 4.3, the proposed method maintains performance within 1.02dB. Still, the algorithm complexity can reduce to 35% ~ 56.25% in average case and 57.25% in worst case .
It‟s clear to see that, there is better performance in 4 x 4 MIMO-OFDM system rather than 8 x 8 one. However, while it comes to higher antenna number, it becomes a critical issue that the complexity grows remarkably. Hence, Variable and Overlapped
Figure 4.1 Performance in the VACO, 4T4R 64QAM
Figure 4.2 Performance in the VACO, 8T8R 256QAM
4 x 4 MIMO-OFDM system 64 QAM
Method ML K-best SD
MMSE-SQRD Variable and Overlapped Cluster-based
╳ K=12 K=12
Spanning Cluster Candidate
8 8 6 6,4 6,4,2 5,4,3,2
Boundary ╳ ╳ 0 0,3.5 0,4.5,6.5 0,3.5,5.5,7.5
SNR in PER
0.08 28.55 28.62 28.74 28.70 28.77 29.13
SNR-Loss 0 0.07 0.19 0.15 0.22 0.57
Average Case Candidate
Number Reduction
╳ 100% 56.25% 38.25% 38.17% 27.29%
Multiplication ╳ 36864 20736 14100 14071 10059
Addition ╳ 35008 19692 13390 13362 9553
Worst Case Candidate
Number Reduction
╳ 100% 56.25% 56.25% 56.25% 39.06%
Multiplication ╳ 36864 20736 20736 20736 14400
Addition ╳ 35008 19692 19692 19692 13675
Table 4.2 Performance & complexity reduction table, 4T4R 64QAM
8 x 8 MIMO-OFDM system 256 QAM
Method ML K-best SD
MMSE-SQRD Variable and Overlapped Cluster-based
╳ K=12 K=12
Spanning Cluster Candidate
16 16 12 12,10,8 12,10,8,6
Boundary ╳ ╳ 0 0,7,10 0,5,10,14
SNR in PER
0.08 35.23 35.81 36.25 36.15 36.15
SNR-Loss 0 0.58 1.02 0.92 0.92
Average Case Candidate
Number Reduction
╳ 100% 56.25% 39.94% 35%
Multiplication ╳ 294,912 165,888 117,798 102,407
Addition ╳ 289,536 162,864 115,651 100,540
Worst Case Candidate
Number Reduction
╳ 100% 56.25% 56.25% 56.25%
Multiplication ╳ 36,864 165,888 165,888 165,888
Addition ╳ 35,008 162,864 162,864 162,864
Table 4.3 Performance & complexity reduction table, 8T8R 256QAM
4.2 Complexity Evaluation
Discussed in the section 4.1 previously, we compare the complexity between the Variable and Overlapped Cluster-based algorithm and K-best SD with nearly the same performance. Differently in this section, we do a comparison of the performance between them with nearly the same complexity.
By observing the Fig. 4.3, it‟s very clearly to see that the Variable and Overlapped Cluster-based algorithm has better performance than K-best SD.
Meanwhile, it also maintains performance within 0.5dB that the method is suitable for practical system.
While it comes to the same complexity in both methods above, detail statistics are shown in table 4.4. Our proposal method is 0.25dB better compared to K-best SD.
Figure 4.3 Performance in the VACO with the same complexity, 4T4R 64QAM
4 x 4 MIMO-OFDM system 64 QAM
Method ML K-best SD
MMSE-SQRD Variable and Overlapped Cluster-based
╳ K=4 K=8
Table 4.4 Performance & complexity table, 4T4R 64QAM
Chapter 5
Hardware Implementation and Measurement
5.1 Introduction
The Variable and Overlapped Cluster-based algorithm is a modified method of K-best SD, thus it inherits the K-best SD advantage so that it is very suitable to parallel and design in pipeline. In this chapter, our proposed hardware architecture is presented.
5.2 Design Flow
Figure 5.1 The design flow
In the Fig. 5.1 shows the design flow of the hardware architecture for the Gate-Level Simulation
Synthesis RTL Model
Algorithm Model (Fixed Point) Algorithm Model (Float Point)
Dsign Specification
Variable and Overlapped Cluster-based algorithm. In the step of algorithm design, Matlab is used to build up and experiment the detecting algorithm. After the algorithm model is determined, the measurement of the bit length and accuracy is applied so that we need to convert the variable from float point to fixed point. Meanwhile, the performance loss is taken carefully and the golden pattern is generated for logic design. After the algorithm simulations, the hardware design is implemented by Register Transfer Level (RTL) with the Verilog. The Verilog tool helps us code in behavior language and confirm the correctness of hardware design. Then, the RTL code will be synthesized by Design Compiler to gate-level netlist. Finally, the gate-level simulation helps us to verify whether the behavior of gate-level is fit in with our requirements.
5.3 Proposed Architecture
Table 5.1 gives the detail specification of the Variable and Overlapped Cluster-based algorithm, where achieving GigaLAN is our goal here.
The Fig. 5.2 illustrates overviews of the VACO. In the top architecture diagram, there is a preprocessing block including common sorted QR decomposition (SQRD).
And the MIMO Detection is implemented with the Variable and Overlapped Cluster-based algorithm.
The Fig. 5.3 shows the parallel architecture of the proposed architecture. Due to the reason that there‟s not enough time to process the input I/Qs while using only one set of MIMO Detector. (Roughly 4 clock cycle time to process one level I/Qs which is absolutely impossible). With 14 sets of MIMO detector in parallel architecture, there‟s is enough time to finish this work. (Up to 56 clock cycle time)
As shown in block diagram of Fig. 5.2, the architecture consists of twelve pipeline stages. Each stage has a processing element (PE), which implements the
operations corresponding to step 2)–step 5) of Detail Matching in section 3.2.6. Stage 1 to stage 12 corresponds to the twelfth to the first level of computation in the algorithm.The buffers R, Z, D, U and E between adjacent PEs are correspond to the upper triangular matrix, updated received signal, K-best PEDs, K-best paths and estimated signal in the algorithm, respectively.
Design Specification
Parameter Value
Simulation Platform IEEE 802.11n
Signal Bandwidth 50 MHz
Number of subcarriers 108 subcarriers
FFT size 128 points
Number of antenna 6 Tx 6 Rx
Forward Error Correction Convolution and Viterbi (Coding Rate 3/4) Packet size 1024 Bytes per Tx antenna
Subcarrier modulation 256QAM
Preprocessing Block ZFD
Signal Detection Variable and Overlapped Cluster-based
Table 5.1 The proposed design specification
Figure 5.2VLSI architecture of the VACO for 6T6R 256-QAM MIMO system
Proprocessing Variable and Overlapped Cluster-based MIMO Detector
Preprocessing SQRD
MIMO Detection
FFT OutputChannel Frequency Responses (CFR) Hard Decision
Diagonal Matrix (R)Receive Signal (Z)Estimated Signal (E)
Control Unit
Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56) MUX Buffer(15) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56) MUX
Buffer(15) Buffer(15)Buffer(15) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56) MUX
Buffer(20)
Shift <<2 Shift <<3 Shift <<4 MUX
MUX
Buffer(19) Buffer(19)
Add Signed Bit Add Signed Bit Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56) MUX
Buffer(15)
Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(15) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(20) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(3) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(3x2) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(3) MUX
Detection Signal (U) DEMUX Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(20) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(15)
DEMUX
The Left Receive Signal (Z) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(15x11) Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(15x11) Calculate the left Z Buffer(56)Buffer(56)Buffer(56)Buffer(12)Buffer(56)Buffer(56)Buffer(56)Buffer(15x10)
DEMUXDEMUX
MIMO Detecion #1
MIMO Detecion #1 Processing Buffer Time
14x6
The parallel Architecture of the VCOMD
Figure 5.3The parallel architecture of the VACO
5.3.1 Word-Length Determination
In the mathematical model, all the variable and computations use the floating point number. On the other hand, the practical hardware computations use the fixed point number. To translate the float point model to fixed point model, the simulations of measurement are required. The measurement includes the length (width) and depth (accuracy). The longer word length it has, the higher performance it has. Hence, the tradeoff between the hardware cost and performance is needed. Fig. 5.4 illustrates the signal distribution of variable R, and the word length and the depth of variable R are roughly 15 and 2-10. The value is a rough estimate, and the detail simulations will be taken to get the proper parameter.
Table 5.2 a) gives the number of all buffer needed while table 5.2 b) collates the word-length information of all buffer. In the end, the performance comparison between floating point and fixed point is showed in Fig. 5.5 with 256-QAM 6 x 6 MIMO system. The SNR degradation in word-length determination is less than 0.2 dB.
Figure 5.4 The signal distribution of variable R.
Buffer Stage
1 2 3 4 5 6 7 8 9 10 11 12
R 1x12 1x11 1x10 1x9 1x8 1x7 1x6 1x5 1x4 1x3 1x2 1x1
D 8 8 8 8 8 8 8 8 8 8 8 1
Z 8 8 8 8 8 8 8 8 8 8 8 1
U 8x1 8x2 8x3 8x4 8x5 8x6 8x7 8x8 8x9 8x10 8x11 8x12
E 1 1 1 1 1 1 1 1 1 1 1 1
Table 5.2 (a) Buffer number needed in each stage
Word-Length
R 15
D 20
Z 15
U 3
E 15
Table 5.2 (b) Word-length needed in each buffers
Figure 5.5Performance comparisons between float point and fixed point
5.3.2 Sorting Design
In each PEs, there are 16 PEDs to sort or 96 PEDs at most. Sorting PEDs is the most time-cost part in the MIMO Detection. This is a critical issue in our VSLI implementation. To overcome the problem of sorting, we deliver 3 sorting designs, which are combined with different number of sorting unit.
The sorting unit shown in Fig. 5.4 employ insertion sort algorithm so that it is able to sort one input data in one cycle time. The first design with one sorting unit in Fig. 5.5 (a), it costs 16 to 96 clock cycles to finish the ordering procedure. And the second one with three sorting units in Fig 5.5 (b), it costs 24 to 64 clock cycles. For the last updated design with two sorting units Fig 5.5 (c), it costs 16 to 56 clock cycles.
1 cycle
Figure 5.6VLSI structure of the sorting unit.
Sorting Unit (8 elements)
IN
Figure 5.7(a) The original design of sorting
Sorting Unit #2
Figure 5.7(b) The alternative sorting design
Sorting Unit #2 (8 elements) Sorting Unit #1
(8 elements)
IN_1
IN_2
Figure 5.7(c) The updated sorting design
5.4 Complexity Analysis
In this section, the proposed design is written in Verilog code and sythesised with the library (TSMC 65 nm).
Due to the reason that we want to deliver a RF receiver in 802.11n with GigaLAN spec, there are several critical issues we must face to. The most critical one is that in worst case the tatal cycles taken by a MIMO detection set is 56 cycles (roughly 140 ns), and the Processing Data Rate we have is only 10 ns. To archieve the goal, we have 12 parallel MIMO Detection sets to slow the Processing Data Rate down to 120 ns. Meanwhile with some tricky techniques, I steal some cycles (about 20 ns) in the first and last stages to fit the requirement. On the other hand, the bit length of sorting block is also a key point to reduce the cell area. We remove the LSB of the sorting bit length from 24 bit to 16 bit.
Finally, we deliver a ASIC with roughly 4M gate counts in 6x6 MIMO Detection in 802.11n with GigaLAN criteria.
GigaLAN Spec.
Signal Bandwidth 50 MHz(256QAM)
Processing Data Rate (Ⅰ) 20 ns /per IQ
Processing Data Rate (Ⅱ) 10 ns
Implementation Issue
Sorting Type 2 sets
Sorting Bit Length 16 bits
Clock Frequency
('tcbn65gpluswcl„) 400 MHz (600MHz)
Cycle Period 2.5 ns
Cycles Taken
(Worst case) 56 cycles
Processing Data Period
(Worst case) ~140 ns
Parallel MIMO Detection Sets Needed
(Worst case) 12 sets (120 ns)
Gate Counts of 6x6 256QAM MIMO Detection
Technology 65 nm
Max. feq 400 Mhz
Parallel MIMO Detection Sets Needed
(Worst case) 12
Cell Area 4,303 k
Total Gate Counts (k) 3,984 k
Table 5.3 The summary of systhesis results.
Chapter 6 Future Works and Conclusion
The Variable and Overlapped Cluster-based algorithm presents a near ML performance, low-complexity MIMO detection design, which uses a pre-estimate signal and channel gain information to reduce hardware cost of MIMO-OFDM wireless system. Simulations and measurements indicate that the proposed method can reduce complexity to 27.29% ~56.25% (where the K-best SD is regard as 100%) while still achieving 8% PER with 0.57 dB (4T4R) and 1.02 dB (8T8R) SNR loss compared with MLD in frequency-selective fading of TGN-E channel [10].
Without any specific preamble, pilot format and STBC coding skills, the Variable and Overlapped Cluster-based detection algorithm can provide near ML performance with relatively low complexity especially in higher antenna scheme.
This study is now working in both 802.11n and TGac MIMO-OFDM systems.
Nevertheless, this study does not only deliver an efficient solution for OFDM-based MIMO receivers, but is also well-suited method for next-generation wireless LAN discussed in IEEE 802.11 VHT study group.
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