3. A NOVEL TRANSMISSION LINE DE-EMBEDDING TECHNIQUES FOR RF
3.1 THE PROPOSED DE-EMBEDDING TECHNIQUE
3.2.3 Optimized simulation for slot-type floating shields in transmission lines
The optimization of slot-type floating shields to reduce simultaneously attenuation loss and wavelength is performed. Optimization analyses on SL, SS,
results. The density, R, of the slot-type floating shields is defined as follows:
SS SL
SL +
Fig. 3-19(a) indicates that a higher effective relative permittivity is achieved with a smaller SL, higher density R, and smaller dielectric thickness between the signal line a
R=
nd the floating shields. When the attenuation loss is taken into consideration, a m
permittivity and attenuation loss performance. The optimization index of the slot-type floating shields is defined as εr．α in mm/dB, and Fig. 3-19(b) shows that an optimized performance is achieved when the density R is equal to 0.33 (SL=1 um and SS=2 um) on M7. The optimized floating shields include a minimized SL, medium density R, and high metal layer position. After the specification
inimized SL is the best choice for both effective relative
-1
requirements for the attenuation loss is determined, the density of the slot-type floating shields can be calculated. Consequently, the effective relative permittivity can be predicted from the minimized SL and the density of the slot-type floating shields. Since both SL and the SS can be adjusted in accordance with technology scaling, a scaled slow-wave CPW can continue to offer lower attenuation loss and higher effective relative permittivity.
Conventional de-embedding methods suffer from an over de-embedding problem to which the proposed method offers a solution. In addition to the substrate coupling and contact effects provided by existing four-step de-embedding methods, the proposed method also accounts for the discontinuity between the pad
and intercon ia stack
paras
3.3 Conclusion
nect. Current de-embedding techniques do not de-embed v
itic and the contribution of the proposed method becomes more important as frequency increases. As [PLEFT],[PRIGHT], [ ]
l1
M and [ ]
l2
M can be extracted, more flexible de-embedding dummy structures can be created. Therefore, an additional through structure can be designed to perform via stack de-embedding. The proposed de-embedding method can be extended to other RF devices and, this will allow for more accurate RF device characterization. Intrinsic slow-wave CPW transmission line structures are placed on the inter-level metallization layers as they are the most appropriate RF device for cascade-based de-embedding methods involving the via stack de-embedding technique. The proposed floating slow-wave
CPW transmission line where slot-type floating shields are located periodically both above and below the CPW structure has a better quality factor of 15 at 50 GHz and a shorter wavelength, which results in a reduction of silicon area of more than 66% when compared to that of conventional CPW transmission lines. In short, a significant advantage for future technology scaling and RF circuit designing is made available through the use of more suitable SL and SS dimensions.
Name Transmission Line Type Metal Shield Layer Strip Length (SL) Strip Space (SS) Shield Type
CPW CPW
FSCPW1 Floating slow-wave CPW M9, M7 0.1um 0.1um floating FSCPW2 Floating slow-wave CPW M9, M7 0.1um 0.9um floating FSCPW3 Floating slow-wave CPW M9, M2 0.1um 0.1um floating
No strip shields
Table 3-1. CPW-type transmission line structures
G
Fig. 3-2. An equivalent representation of a symmetrical structure.
G
Fig. 3-3. The matrix manipulation for a transmission line of length L1 in conjunction with two ds.
Fig. 3-4. The matrix manipulation for a transmission line of length L2 in conjunction with two L2 (b) A transmission ne of length L2 (c) Two GSG pads.
GSG pads, [PLEFT] and [PRIGHT] (a) An intrinsic transmission line of length li
TM
igh-level metallization layer. (a) The top view of the BCD matrix of the DUT structure, and (b) The cross-section along the A- E cut.
(a) (b) D-E cut : without via stack de-embedding
TM
D-E cut : without via stack de-embedding
TM
ig. 3-6. The connection using the low- and high-level metallization layers. (a) The top view of e ABCD matrix of the DUT structure, and (b) The cross-section along the A- E cut.
F
] [A' th
0 0% ig. 3-8. The connection using high-level metallization layers. (a) The
F
through structure, and (b) The cross-sectional view along the A- E cut.
TM
Fig. 3-9. The connection between the low- and high-level metallization layers. (a) The top view of the DUT structure, and (b) The cross-sectional view along the A- E cut.
RIGHT with
, , and . (a) The cascade of , (b) One additional
rough structure (c) The left-side transmission line of length L2 , and(d) .
Fig. 3-10. The matrix manipulation for the series cascade of [ThruLEFT][Thru ] ]
[THRU [TLLEFT] [PRIGHT] [ThruLEFT][ThruRIGHT] th
The right-side GSG pad ]
[THRU , [TLLEFT]
] [PRIGHT
G
S
G
capacitor
A
B C D
E
G
S
G G
S
G
capacitor
A
B C D
E
(a)
B-E cut : with via stack de-embedding D-E cut : without via stack de-embedding
Thick metal Thick metal
A B C D E
capacitor
B-E cut : with via stack de-embedding D-E cut : without via stack de-embedding
Thick metal Thick metal
A B C D E
capacitor
(b)
Fig. 3-11. The connection between the low- and high-level metallization layers. (a) The schematic view of the a capacitor structure, and (b) The cross-sectional view along the A- E cut.
1.E+00 1.E+01 1.E+02 1.E+03
0 10 20 30 40 5
Frequency (GHz)
Quality Factor
0 with via stack
without via stack Ideal
capacitor capacitor
capacitor
(a)
80
0 10 20 30 40 50
90 100 110 120
Frequency (GHz)
Capacitance (fF/mm)
with via stack without via stack Ideal
(b)
ig. 3-12. A comparison of the simulated capacitor performances for via stack de-embedding ith and without via stack de-embedding (a) Quality factor versus frequency, and (b)
Capacitance versus frequency.
F w
55 60 65 70 75
0 10 20 30 40
Frequency (GHz)
Resistance (Ω/mm)
50 De-embedding_L2L
De-embedding_LS De-embedding_OS EM_simulation
(a)
0.4 0.5 0.6
0 10 20 30 40 50
Frequency (GHz)
Inductance (nH/mm)
De-embedding_L2L De-embedding_LS De-embedding_OS EM_simulation
(b)
Fig. 3-13. A comparison of the measured transmission line performances for
De-embedding_L2L, De-embedding_LS [14], De-embedding_OS, and EM simulation with(a) Resistance versus frequency, and (b) Inductance versus frequency.
G an extra grounded metal strip
x
an extra grounded metal stripx
an extra grounded metal strip
x
an extra grounded metal strip
x y
(a) (b)
Fig. 3-15. A long and thin structure in the y direction. (a) The RF DUT structure. (b) The conventional short structure.
G
S
G G
S
G
Fig. 3-16: A schematic view of a slow-wave CPW transmission line with above and below slot-type floating shields.
Signal
Ground Width Space Ground
Silicon Substrate
Dielectric Floating strip shields
SLSS
Signal Signal Ground
Ground Width Space Ground Ground
Silicon Substrate
Dielectric Floating strip shields
SLSS
Fig. 3-17: A schematic view of a slow-wave CPW transmission line with above and below slot-type floating shields.
0
0 5 10 15 20
0 10 20 30 40
Frequency (GHz)
Quality Factor
50 CPW (w/o shields)
FSCPW1 (SL/SS=0.1/0.1, M7) FSCPW2 (SL/SS=0.1/0.9, M7) FSCPW3 (SL/SS=0.1/0.1, M2)
Fig. 3-18: A comparison of the measured transmission line performances for different floating shields. (a) Attenuation loss versus frequency, (b) Characteristic impedance versus frequency, (c) Wavelength versus frequency, and (d) Quality factor versus frequency.
(d)
0 10 20 30 40
0 0.2 0.4 0.6 0.8 1
R=SL/(SS+SL)
Effective relative Permittivity
0 2 4 6 8
Attenuation loss (dB/mm)
SL=1um (M7) SL=1um (M2) SL=2um (M7) SL=2um (M2) SL 1 (M7)
(a)
0 10 20
0 0.2 0.4 0.6 0.8 1
R=SL/(SS+SL)
εr．
30
-1 (mm/dB)
SL=1um (M7) SL=1um (M2) SL=2um (M7) SL=2um (M2)
(b)
Fig. 3-19: The simulated slow-wave CPW transmission line performance versus parameter R with different SL and metal layer positions at a signal frequency of 50 GHz. (a) Effective relative permittivity and attenuation loss, and (b) Optimization index value of εr．α-1.