Simulation result
6.3 Power allocation and channel mapping
In this section we use the result from Fig 6.7 and Fig 6.8, and allot 0.85/0.7 times original power to those bits with higher 1/sqrt(V ar) in Fig 6.7 and the remaining power to other bits with worse performance.
Fig 6.13 shows the performance of power allocation and we can see that at 10−6 we
have nearly 0.15dB gain at I=5, so power allocation indeed improves the performance at high SNR. But now we face several questions about power allocation: First, the gain seems not large and performance with power allocation algorithm is better than original case at high SNR. Second, at transmitter the amplifier must change the amplitude frequently and it is almost impossible in current system. As we mentioned before, performance which can be improved is conjectured that every bits suffer different Eb/N0. So we extend the concept to channel mapping for frequency selective channel.
Because the channel response is not flat for frequency selective channel, different subcarrier would achieve different channel gain and suffers different Eb/N0 equivalently.
Assuming that we know the channel response of k−th subcarrier, we can write Yk = Hk× Xk+ Nk and estimate transmitting signal as Xk+ Nk/Hk. Although transmitting power is equal in every bits, the term Nk/Hk will affect the relative Eb/N0. Large Hk will compress Nkand forms relative high Eb/N0, vice versa. By this idea we can achieve the same result of power allocation. The following shows three simple examples about channel mapping.
Fig 6.14 shows one channel response with small magnitude difference, the corre-sponding performance is in Fig 6.15. We can find that performance could be enhanced at high SNR when using channel mappings,. Then we discuss that why there is better performance at high SNR but worse performance at low SNR? Our explanation is that those bits with better performance always has good performance at high SNR if we put them in the subcarrier with small Hk. Compare to the case: we put bits in the subcarrier with large Hk, the numbers of error may be increased. Those bits with worse perfor-mance may have meliorative perforperfor-mance at high SNR and then reduce the number of error if we put them in the subcarrier with large Hk . Assuming that the error which is reduced is larger than the error which is increased and total error number is lower than Hamming distance, we could get correct codewords after several iterations. Fig 6.16 ∼ Fig 6.19 show other frequency selective channels and performance cases. The three cases
0 10 20 30 40 50 60 70
Figure 6.14: magnitude response for frequency selective channel with small difference of magnitude.
Figure 6.15: 802.11n specification performance for frequency selective channel with small difference of magnitude.
0 10 20 30 40 50 60 70 0.4
0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4
subcarrier
|H|: channel gain
Figure 6.16: magnitude response for frequency selective channel with large difference of magnitude.
reveal that channel mapping can improve the performance of channel at high SNR and usually there are better improvements to those channels which have large difference of magnitude in frequency selective channels. Because LDPC codes created from 802.11n and 802.16e specification all have apparent bits with different noise resisting ability, we can use this skill to implement power allocation and channel mapping.
0 1 2 3 4 5 6
Figure 6.17: performance for frequency selective channel with large difference of magni-tude.
Figure 6.18: magnitude response for frequency selective channel with difference of mag-nitude between Fig 6.14 and Fig 6.16.
0 1 2 3 4 5 10−7
10−6 10−5 10−4 10−3 10−2 10−1 100
Eb/No
BER
802.11n Original OFDM I=5
802.11n channel mapping OFDM I=5 802.16e Original OFDM I=5
802.16e channel mapping OFDM I=5
Figure 6.19: performance for frequency selective channel with difference of magnitude between Fig 6.14 and Fig 6.16.
Chapter 7 Conclusion
We provide two nodes partition approaches for BP decoding of LDPC codes. The first partition is related to the partition of the corresponding parity check matrix H and is based on the amount of uncorrelated information a node received to update its reliability per sub-iteration. The resulting shuffled BP decoding algorithms are shown to yield enhanced convergence and error rate performance when compared with conventional HSBP or VSBP algorithms. The second method is based on a parameter which measures the error protection a bit node received. We take advantage of the UEP nature of the irregular LDPC code and proposed a subcarrier and power allocation method that offers performance improvement.
We do not claim any optimality about the proposed partition and believe that an optimal partition and the corresponding decoding schedule do exist. A near-optimal partition based on our first criterion is one which results in submatrices with no all-zero rows or columns. An efficient algorithm to find such a partition remains unavailable.
The proposed subcarrier mapping and power allocation are based on the degrees of error protection. Since the ratio between the number of higher error protection bits and that of less-protected bits is not an integer, it is difficult to design a shuffled BP algorithm. We believe that by suitably combining the first partition approach, a shuffled BP algorithm that takes into account resource allocation strategy can be designed and further improved performance can be obtained.
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