Simulations Result

As shown in Table 5.3, SRAM size, system frequency, supply voltage, read and

write power are given by the system speculation. The proposed robust low power SRAM is simulated in UMC 90nm CMOS technology. According to simulation results, this 32-Kb SRAM can operate at 1GHz when V_DD = 1.0V. It also can operate at 200MHz when V_DD = 0.5V. When this SRAM works at 1GHz, it takes 7.73mW and 9.22mW power consumption during read and write operations respectively. When it works at 200MHz, it takes 754uW and 826uW power consumption during read and write operations respectively. When supply voltage is 1.0V, WWL rising edge is 0.3ns and its voltage swing is 850mV. When supply voltage is 0.5V, WWL rising edge is 1.18ns and its voltage swing is 330mV.

Table 5.3: Summary of the SRAM features.

Process, voltage, and temperature variations are simulated. The proposed design is fully functional within +/-% voltage variation, 0ºC to 100ºC temperature variation, and all process corner. Simulations results are summarized in Table 5.4, Table 5.5, Table 5.6.

Table 5.4: Process corner simulation (@500mV ; 25 ºC).

Table 5.5: Voltage variation simulation (@TT corner ; 25 ºC).

Table 5.6: Temperature variation simulation (@TT corner ; 500mV).

Chapter 6 Conclusions

6.1 Conclusions

A novel 200MHz - 1GHz low power 8T SRAM is proposed. A low power write assist scheme is also proposed to resolve the serious write half-select disturb problem, and the simulation results show that the proposed write scheme can work well in more advanced technology nodes, such as 65nm and 45nm. Furthermore, read/write replica circuits are designed to control access timing. Moreover, a 32-Kb 8T SRAM is implemented in UMC 90nm CMOS technology. According to simulation results, the proposed 8T SRAM shows its benefits on low power access operations and wide-operating voltage range, and it is suitable to be adopted in portable devices.

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Vita

PERSONAL INFORMATION Birth Date: Augst. 12, 1982

Birth Place: Chiayi, Taiwan, R.O.C.

Address: Department of Electronics Engineering National Chiao Tung University 1001 Ta-Hsueh Road

Hsin-chu, Taiwan 30010, R.O.C.

E-Mail Address: [email protected]

EDUCATION

B.S. [2005] Department of Electronical Engineering, Fu-Jen University.

M.A. [2008] Institute of Electronics, National Chiao-Tung University.