Summary

In this chapter, we first introduce two channel models: the first is SUI channel model which is used to form a set of channel models suitable for IEEE 802.16 fixed wireless applications and the second is ITU channel model which is used for mobile wireless applications. After that, we introduce the requirement tasks at the receiver.

Synchronization is first introduced and we propose a joint design of timing and frequency synchronization algorithm to lower the computational complexity. Then, channel estimation, phase estimation and residual frequency offset estimation are introduced in the rest part of the receiver. Furthermore, we compare the MSE of the frequency offset estimates after performing residual frequency offset estimation.

Computer simulations of the overall system will be showed in Chapter 4 and the proposed algorithms can work as expected.

The receiver functional blocks that are introduced in this chapter are basic blocks.

In order to adapt to different modes, some receiver functional blocks require to be modified. All the modification and more detailed experimental results will be given in Chapter 4.

Chapter 4

SC-OFDM-OFDMA SDR Architecture

Wireless communication standards are evolving rapidly. WiMAX now is an emerging suite of air interface standards for combined fixed, portable and mobile broadband wireless access. To meet the requirements of different standards, SDR technologies enable dynamic reconfiguration on the same platform and minimize the hardware variants. In this chapter, we propose a SC-OFDM-OFDMA SDR system to support the various air-interface standards specified by IEEE 802.16-2005 in a single SDR system. In this way, the system possesses as many common components as possible for these three modes, and the transmitter and receiver can be switched among the three modes via SDR operation. The rest of this chapter is organized as follows.

Concept of SDR will be described in Section 4.1. The transmitter architecture of the proposed SC-OFDM-OFDMA SDR system will be introduced in Section 4.2. The receiver architecture of the proposed SC-OFDM-OFDMA SDR system will be introduced in Section 4.3. Finally, computer simulations for different modes and different transmit techniques are shown in Section 4.4.

4.1 Concept of Software Defined Radio

A lot of standards of communication systems have been proposed due to an exponential growing of demands for communications since early 1980. Commercial wireless communication industry is currently facing problems due to constant evolution of link-layer protocol standards (2.5G, 3G, WiMAX, and 4G), existence of incompatible wireless network technologies in different countries inhibiting deployment of global roaming facilities and problems in rolling-out new services/features due to wide-spread presence of legacy subscriber handsets. Therefore this prompts the development of the SDR concept as a potential practical solution. There are several differing definitions of SDR technology. Most commonly it defines a software implementation of the user terminal that is able to dynamically adapt to the radio environment in which it is located time by time.

Over the last few years, analog radio systems are being replaced by digital radio systems for various radio applications in commercial and military spaces. In addition to those, programmable hardware is increasingly being used in many digital radio systems at different level. SDR technology can take these advantages to build an open-architecture software and hardware platform [17], [18], [19].

SDR technology facilitates implementation of some of the functional modules by software in the MAC and PHY layers. This helps in building reconfigurable software radio systems where dynamic selection of parameters for some software-defined functional modules is possible. Also, the software-defined functional modules can be easily updated or upgraded as enhancements to deal with various multi-standard and multi-band architectures.

Although the exact and strict definitions of SDR technology do not yet exist, the following are the key features of SDR technology found in some literature [20], [21]:

z Reconfigurability: SDR allows co-existence of multiple software-defined functional modules implementing different standards on the same platform allowing dynamic configuration by just selecting the appropriate parameters for software- defined modules to accommodate new functions and algorithms. The wireless network infrastructure can reconfigure itself to subscriber's handset type or the subscriber's handset can reconfigure itself to network type. SDR technology facilitates implementation of future-proof, multi-service, multi-mode, multi-band, multi-standard terminals and infrastructure equipment.

z Ubiquitous Connectivity: SDR enables implementation of air interface standards as software modules and multiple instances of such modules that implement different standards can co-exist in infrastructure equipment and handsets. If the terminal is incompatible with the network technology in a particular region, an appropriate software-defined functional module requires to be installed onto the handset (possibly over-the-air) resulting in seamless network access across various geographies.

Software-defined radio is a future-proof solution to making wireless communication systems highly flexible. The flexibility offered by SDR systems helps in cutting the R&D cost and shortening the time-to-market. Fewer variants mean much lower maintenance and module improvement efforts.

Development of a complete SDR system requires many skill-sets in areas such as RF design, firmware, DSP software, Operating systems, data communication protocols and more. The compatibility of an SDR system is guaranteed by its reconfigurability by DSP engine re-programmability, which implements radio interface and upper layer protocols in real time. It is important to note that DSP is really intended the concept of digital signal processing, and not only DSP chipsets in strict sense, but also field programmable gate arrays (FPGA).

At present, the SDR technology is being actively researched due to its potential to help realize reconfigurable radio systems while retaining common hardware platforms.

In this thesis, we will adopt the concept of SDR technology to develop a reconfigurable transceiver architecture for SC-OFDM-OFDMA system based on IEEE 802.16-2005 standard.

4.2 SC-OFDM-OFDMA SDR System:

Transmitter Architecture

The block diagram shown in Figure 4.1 represents the transmitter architecture of the proposed SC-OFDM-OFDMA SDR system. In the following section, we will introduce some functional blocks of the transmitter architecture that are modified to be reconfigurable. Here, we will not introduce some functional blocks in detail that have been described in Chapter 2.

• Segmentation

Figure 4.1: Proposed SC-OFDM-OFDMA SDR transmitter architecture

As shown in Figure 4.1, the uncoded data is generated from a random source, consists of a series of zeros and ones. First, the uncoded data shall be passed to a

randomizer. Randomization is performed on each allocation, which means that for each allocation of a data block. After performing randomization, the randomized data shall be passed through the FEC block. The FEC block is performed by first passing the data in block format through the RS encoder and then passing it through the zero-terminating convolutional encoder. It is worthy of mention that the randomized data needs not first pass to the RS encoder in OFDMA transmission mode. After encoding, all encode data shall be interleaved by a block interleaver. After bit interleaving, the data bits are entered serially to the modulator and then mapped to form symbols. Modulation schemes used here are BPSK, QPSK, 16QAM, and 64QAM with gray coding in the constellation map. After constellation mapping, the modulated data will be processed by different transmit techniques such as SISO, STC, and AAS. But the different transmit techniques do not affect the data block size. The data block size is determined by the FEC block, modulator, and the number of subchannels allocated. In the following paragraphs, we will introduce the procedures to determine the uncoded data block size for different modes.

Single Carrier

In SC transmission mode, the receiver will perform frequency domain equalizer by utilizing the N-point FFT and IFFT. In order to adapt to the input size of FFT, the transmitter requires performing uncoded data block segmentation. In addition to the FFT size, we still require considering the FEC block and modulator. Under the whole consideration, the uncoded data block size per symbol can be written as

Uncoded data block size = (N m c p× × − ) 2− × (4.1) t where N denotes the FFT size, m is modulation order (QPSK: m=2, 16QAM: m=4), c is the code rate of CC encoder, p is the number of zero tail bits before CC encoder, and t is the number of data bits which can be corrected after RS encoder. As shown in Table 4.1, the FFT size is specified by 256 and each frame contains 10 symbols. The uncoded

data block size can be easily obtained by equation (4.1) in SC transmission mode.

Table 4.1: Uncoded data block size for SC mode

1024x10

CC code rate 1/2

(496,432,32)

CC code rate 1/2

(496,432,32)

In OFDM transmission mode, the mandatory FEC block consists of the concatenation of a Reed-Solomon outer code and a rate-compatible Convolutional inner code. The RS-CC coding rate 1/2 shall always be used as the coding mode when requesting access to the network and in the FCH burst. The FFT size is fixed to be 256 in OFDM transmission mode, consisting of 192 data subcarriers and 8 pilot subcarriers per symbol. In order to achieve the desired overall code rate, the RS encoder and CC code rate require adjustments. The uncoded data block size per symbol can be computed as

Uncoded data block size (192= × × −m c p) 2− × (4.2) t where m is modulation order (BPSK: m=1, QPSK: m=2, 16QAM: m=4), c is the code rate of CC encoder, p is the number of zero tail bits before CC encoder, and t is the number of data bits which can be corrected after RS encoder. ‘192’ represents the total number of data subcarriers. Table 4.2 gives the uncoded block sizes used for different modulations to achieve overall coding rate 1/2. In the case of BPSK modulation, the RS

encoder should be bypassed. When subchannelization is applied in the uplink, the FEC will bypass the RS encoder and the uncoded data block size can be computed by the number of allocated subchannels divided by 16 (total number of subchannels).

Table 4.2: Uncoded data block size for OFDM-256 mode

768x10

CC code rate 1/2

(480,352,64)

CC code rate 1/2

(480,352,64)

In OFDMA transmission mode, the mandatory coding scheme is convolution encoder. The encoding block size will depend on the modulation order and the number of subchannels allocated for the current transmission. As mentioned in Chapter 2, each subchannel is composed of 24 data subcarriers and 4 pilot subcarriers for PUSC permutation. According to the number of subchannels allocated and code rate, the uncoded data block size per symbol can be derived as

Uncoded data block size=N_sc×24 2× × × − (4.3) m c p where N denotes the number of subchannels allocated, m is modulation order _sc (QPSK: m=2, 16QAM: m=4, 64QAM: m=6), c is the code rate of CC encoder, p is the number of zero tail bits before CC encoder, and ‘2’ represents the number of spanned symbols for a slot in downlink PUSC. Although the FFT size can be scaled to adapt to different channel bandwidths in OFDMA mode, different FFT sizes still use the same equation (4.3) to determine the uncoded data block size. The uncoded data block sizes

for different FFT sizes are shown in Tables 4.3, 4.4, 4.5 and 4.6. The four tables provide the overall coding rate 1/2 in the case with the whole subchannels allocated in Major Group 0. The total number of subchannels in Major Group 0 is specified in Table 4.7 for different FFT sizes.

Table 4.3: Uncoded data block size for OFDMA-2048 mode

3456x5

CC code rate 1/2

1712x5 (bits)

CC code rate 1/2

1712x5 (bits)

CC code rate 1/2

848x5 (bits)

CC code rate 1/2

848x5 (bits)

Table 4.4: Uncoded data block size for OFDMA-1024 mode

Table 4.5: Uncoded data block size for OFDMA-512 mode

1440x5

CC code rate 1/2

704x5 (bits)

CC code rate 1/2

704x5 (bits)

Table 4.6: Uncoded data block size for OFDMA-128 mode

288x5 192x5

CC encoded data 96x5

48x5 48x5

Modulated data 48x5

1/2 1/2

CC code rate 1/2

128x5 (bits)

CC encoded data 96x5

48x5 48x5

Modulated data 48x5

1/2 1/2

CC code rate 1/2

128x5 (bits)

Table 4.7: Number of subchannels in Major Group 0 for different FFT sizes

PUSC Downlink

Once the uncoded data block size is decided and the uncoded data is encoded and modulated, the pilot subcarriers shall be inserted into each data block in order to constitute a symbol and they shall be modulated according to their locations within a symbol. The first symbol of the downlink transmission is the preamble. In OFDM and OFDMA transmission mode, each symbol will be fed into IFFT and transmitted in different formats by using various transmit techniques such as STC and AAS. SC transmission mode will bypass the IFFT block. Here, we omit the detail descriptions of other blocks that have been introduced in Chapter 2.

4.3 SC-OFDM-OFDMA SDR System: Receiver Architecture

System scalability is a key design consideration in the development of the SDR system. The proposed SC-OFDM-OFDMA system requires modification of algorithms in order to accommodate various air interfaces. The proposed SDR receiver involves many blocks shown in Figure 4.2. Here, we focus on three blocks, such as timing and frequency synchronization block, channel estimation block, and phase estimation block.

These three common algorithms will be designed to match the functionality of the prescribed air interfaces by setting suitable parameters.

Time/Frequency

• De-interleaver DecoderDecoder

Source data Joint design of

timing &

OFDM & OFDMA mode

• De-interleaver DecoderDecoder

Source data Joint design of

timing &

OFDM & OFDMA mode Residual frequency compensation

Figure 4.2: Proposed SC-OFDM-OFDMA SDR receiver architecture

4.3.1 Timing and Frequency Synchronization Block

As mentioned in Section 3.2, we have introduced the proposed joint design algorithm of timing and frequency synchronization by utilizing the short preamble [26], [27]. Unfortunately, the short preamble is not always transmitted in any mode. Based on the IEEE 802.16-2005 standards, we can find that only OFDM and SC mode transmit the short preamble preceding the long preamble. In other modes such as

OFDMA mode or modes in which AAS or STC is employed, the preamble structure only consists of a long preamble. In order to adapt to different modes in the SDR system, the jointly designed algorithm of timing and frequency synchronization should be modified in order to obtain the reliable timing and frequency offset estimates.

The operation of timing and frequency synchronization by using the short preamble is the same as Section 3.2. The preamble structures can be classified into two cases:

case Ⅰ: the case with short preambles; case Ⅱ: the case without short preambles Here, we modify the metrics slightly to perform timing and frequency synchronization correctly in case Ⅱ. The preamble structure of a long preamble with CP is shown in Figure 4.3. Unlike the four repetitions of short preamble, we can find that CP is the only repetition part of the preamble structure as seen in Figure 4.3. So we can use CP to perform timing and frequency synchronization.

N_LP samples

CP

^{NLP samples}

CP

Tc p _b

Figure 4.3: Long preamble with CP structure T

In the following paragraphs, we will explain how to adjust the parameters to accommodate the two schemes step by step.

z Step 1: Adjust the window size and shift width and compute the delay correlation outputs

The delay correlation outputs can be obtained by correlating the received signal and the known preamble over a window of v samples. The delay correlation outputs ψ and _L ψ of the ith received samples can be written as _R

( )

1

*

, (

0

( )

v

L n L i n f k

k

i s r ₁₎

ψ ⁻ _{+ − ⋅ +}

=

=

∑

⋅

( )

length is configured to be 1/4 of the FFT length for simplicity. v represents the window size for summing up the correlation outputs. It is set to be 32 in case Ⅰ, and set to be half of the CP length in case Ⅱ. f represents the shift width for the next delay correlation output starting point. It is set to be 64 in case Ⅰ. In case Ⅱ, the spacing of CP and its replica equal FFT length. n is the index of delay correlation outputs for the ith received samples. n equals 1,2,3, and 4 in case Ⅰ, and equals 1 and 2 in case Ⅱ. There are

sL s_R s_L

sR s_L s_R

2 max( )⋅ n delay correlation outputs that will be stored for each received samples. The operations of computing delay correlation outputs in case Ⅰand case Ⅱ are shown in Figures 4.4 and 4.5 respectively.

Figure 4.4: Operation of computing delay correlation outputs in the case with short preamble

N

_LP

Samples

N

_cp

samples N

_LP

Samples

N

_cp

samples

Figure 4.5: Operation of computing delay correlation outputs in the case without short preamble

z Step 2: Use the delay correlation outputs to perform timing synchronization After collecting groups of 2n delay correlation outputs obtained in Equation (4.4), the best timing instant can be detected by choosing the peak value of Ψ ( )i where represents the timing acquisition metric, and z is the number of delay correlation outputs for the ith received samples and equals 8 in case Ⅰ and equals 4 in case Ⅱ. Once the best starting position of the received signal is detected, frequency synchronization can then be performed.

( )i Ψ

z Step 3: Use the corresponding delay correlation outputs to perform frequency synchronization

The frequency offset is estimated by choosing the delay correlation outputs that produce a peak value in Ψ . Hence a frequency offset estimate can be ( )i found based on the phase of the delay correlation outputs as follows:

^{Δ =f} _2π¹_T ^∠

{ }

^φdopt where is the duration of the short preamble in case Ⅰ and the symbol time in case Ⅱ. d

T

opt is the optimum timing acquisition instant, and z is the number of delay correlation outputs for the ith received samples.

According to the aforementioned parameter adjustments, the SDR receiver architecture can be easily synchronized with received signal over different air interfaces without making changes to the hardware platform.

4.3.2 Channel Estimation Block

In section 3.3, we have described two channel estimation schemes to deal with different environments. Preamble-aided channel estimation is suited for low-speed applications. For vehicular speed applications, retraining the channel estimate by periodically inserting a midamble seems to resist the time varying channel. However, this scheme will require significant overhead to achieve the pilot-aided scheme performance. All in all, pilot-aided channel estimation scheme performs considerably better than preamble-aided channel estimation for vehicular speed applications and with no additional overhead.

In the case with the pilot-aided channel estimation scheme, the pilot tones are not always in the same location at each symbol for different modes. For OFDM mode, the pilot tones are in the same location at each symbol. For OFDMA mode, the pilot tones are allocated in different location at odd and even symbols. The pilot arrangements have been introduced in Chapter 2. So when performing the pilot-aided channel estimation scheme, the SDR receiver architecture needs to be adapted to different pilot arrangements.

4.3.3 Phase Estimation Block

As mentioned in Section 3.4, there is always some residual frequency error because the frequency estimation is not accurate. The residual frequency offset results in constellation rotation. This is the reason why the receiver has to track the carrier phase after performing frequency synchronization [28].

The pilot subcarriers embedded in the data symbol can be used to estimate the rotating phase due to the residual frequency offset. The phase estimator can be expressed as

^ *

2

_ _

( ) ( ) ^{j f sTr b}

s k k

k pilot subcarrier index

q H P s R s ^πΔ

=

⎛ ⎞

=

∑

⎜⎝ ⋅ ⎟⎠ =^{Y es} (4.7) where represents the known pilot data at the kth subcarrier in the sth OFDM symbol,

k( ) P s

H ˆ

is the channel estimate of preamble in the frequency domain, R s _k( ) represents the received data at the kth subcarriers in the sth OFDM symbol, and and

Tb

fr

Δ denote one symbol time and the residual frequency offset respectively. If there is any residual frequency offset, it is reflected in the phase estimator and we can obtain the rotating phase as φ^ˆs =^arg

{ }

qs = Δ²π frsT_b. Therefore, we may have the information for phase tracking on a symbol-by-symbol basis. Furthermore, the residual

Δ denote one symbol time and the residual frequency offset respectively. If there is any residual frequency offset, it is reflected in the phase estimator and we can obtain the rotating phase as φ^ˆs =^arg

{ }

qs = Δ²π frsT_b. Therefore, we may have the information for phase tracking on a symbol-by-symbol basis. Furthermore, the residual

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