The remainder of this thesis is organized as follows. Chapter 2 presents the background of time synchronization for wireless ad-hoc networks. Chapter 3 describes the protocol mechanisms of TPSN and TSS, and develops analytical models of their accuracy and overheads. Chapter 4 explains the simulation setup and shows the simulation results.
Chapter 5 describes the real sensor experimental setup and shows the experimental results.
Chapter 6 discusses the selection guideline derived from the simulation results and NTU Taroko results, and draws our conclusion.
Chapter 2
Related Work
Time synchronization mechanisms for wireless sensor network can be categorized into two general classes - clock synchronization and event synchronization. In the clock syn-chronization, several promising algorithms were recently proposed. For examples, Elson et al. proposed the Reference-Broadcast Synchronization (RBS) [7]. For RBS, within a one-hop neighborhood, a beacon node is selected to periodically broadcast a reference beacon to all its one-hop neighbor nodes. When the neighbor nodes receive this beacon, they exchange their beacon arrival timestamps according to their local clocks. Since all one-hop neighbor nodes are likely to receive the same beacon around the same time, each neighbor node can then estimate the clock offset between its local clock and any one of its one-hop neighbor node's local clocks, by simply taking the difference between its bea-con arrival timestamp and its neighbor node's beabea-con arrival timestamp. To extend this protocol to a multi-hop network, consider a network divided into multiple one-hop clus-ters. Some nodes bridge adjacent clusters i.e., they are within the intersection regions of two or more adjacent clusters. These bridge nodes are used to estimate the clock offsets among nodes residing in adjacent clusters. Based on experiments with Berkeley Motes, the RBS authors reported an average synchronization error of 11 µs (using 30 reference
5
6 CHAPTER 2. RELATED WORK
broadcasts) between one-hop neighbors, and the error grows O(√
n) between nodes that are n hops away.
Maroti et al. proposed the Flooding Time-Synchronization Protocol (FTSP) [13].
Basically in FTSP a leader node is selected in the sensor network. The leader node's clock is used as the global reference clock. To synchronize other nodes' clocks to the reference clock, the leader node periodically oods the entire sensor network with a sync message containing its current time. When a node receives a sync message, it records the leader's reference time and the arrival time. Then it oods this sync message to its one-hop neighbors. Since a node can receive the same sync message multiple times, i.e., one from each of its one-hop neighbors, it can estimate its clock offset and rate difference from the leader node. Based on experiments with the 8x8 grid of Berkeley Motes, the FTSP authors reported an average synchronization error of 11.7 µs over 10 minutes.
Ganeriwal et al. proposed the Timing-sync Protocol for Sensor Networks (TPSN) [10]. TPSN is based on a spanning tree structure that connects all the nodes in the net-work. TPSN rst selects a node to be the root of this spanning tree. This root node peri-odically broadcasts a sync-request message to its immediate child nodes in the spanning tree (rst level nodes). After the root node completes pair-wise synchronization with the
rst level nodes, the second round of pair-wise synchronization begins between the rst level nodes and their immediate child nodes (level nodes). The round of pair-wise syn-chronization continues down the spanning tree until all nodes are synchronized. Based on experiments with two adjacent Berkeley Motes, the TPSN authors have reported an average synchronization error of 16.9 µs.
These three clock-sync methods all show a low average synchronization error. We choose TPSN as the representative of the clock-sync class for two reasons: (1) TPSN is more recent, and (2) the authors of TPSN claim that TPSN can achieve double the precision of RBS. We did not choose FTSP because of its ooding mechanism. In a
7
large sensor network, ooding generates heavy overhead. In addition, given the similarity between FTSP and TPSN in adjusting the clock, we believe they have similar accuracy.
Time-stamp synchronization (TSS) [14] by R¨omer suggests that instead of synchro-nizing every node's clock to a global time, one could obtain the event generation time by estimating and accumulating its hop-by-hop delay. This mechanism determines the event timing relative to the sink's clock, a function that a clock synchronization mechanism can also provide. We choose R¨omer's mechanism for comparison because it is the only event synchronization mechanism identied in the literature.
8 CHAPTER 2. RELATED WORK
Chapter 3
Mechanisms and Analytical Models
We describe protocol mechanisms of TPSN and TSS, and develop their analytical models on performances.
3.1 TPSN (clock-sync) Protocol
3.1.1 TPSN Protocol Mechanism
TPSN [10] has two phases in its process: Level Discovery Phase and Synchronization Phase. A hierarchical structure with a root node is rst created in level discovery phase.
Then in synchronization phase, nodes synchronize their clocks to the root node's clock using the hierarchical structure constructed earlier.
1. Level Discovery Phase: This phase of TPSN happens at the beginning, after the net-work has been setup. To start, the root node assigns itself a level 0 and broadcasts a level discovery packet. This packet holds the node identity and the level number of the root node. When its neighbors receive this packet, they assign themselves a greater level number than received in the packet, say level 1. Then they continue
9
10 CHAPTER 3. MECHANISMS AND ANALYTICAL MODELS
to broadcast level discovery packets with their own node identity and level number.
This process lasts until every node in the network is assigned a level number. Once a node is assigned a level, it ignores any other level discovery packets that are re-ceived afterwards. This ensures that ooding does not congest the network. At the end of this phase, a hierarchical structure with a root node is created for use in the next phase.
2. Synchronization Phase:The root node starts this phase by broadcasting a time sync packet. Upon its reception, the nodes on level 1 wait for a random time then send a synchronization pulse packet to the root node. The randomized waiting prevents collisions caused by contention for media access. The root node replies accordingly with acknowledgement packets. Therefore, all nodes belonging to level 1 can cor-rect their clocks according to the clock of the root node. In addition, the nodes on level 2 will overhear the two-way message exchange because they have at least a neighbor on level 1. Consequently, the nodes on level 2 will each send a synchro-nization pulse packet to their level-1 neighbors for synchrosynchro-nization. This is applied recursively with nodes on level i synchronizing their clocks to nodes on level i − 1.
Eventually, every node in the network has its clock synchronized to the reference clock of the root node, thus, the global clock synchronization is achieved.
But, exactly how are these synchronization of levels completed? In this phase, pair-wise synchronization is achieved across the edges of the hierarchical structure built in the pre-vious phase. We rst consider how to synchronize a pair of nodes through a two-way message exchange. As depicted in Figure 3.1, there are two nodes called Ni and Ni−1. t1 and t4 are the times measured according to node Ni's local clock; t2 and t3 are the times measured according to node Ni−1's clock. At time t1, node Nisends a synchroniza-tion pulse packet to node Ni−1. The synchronization pulse packet holds the level number
3.1. TPSN (CLOCK-SYNC) PROTOCOL 11
of node Niand the value of t1. Node Ni−1 receives this packet at t2, where t2is equal to (t1+ ∆ +D). ∆ represents the clock drift between the two nodes, and D represents the sending delay (including the time to send, propagate, and receive the packet). At time t3, node Ni−1 sends back an acknowledgement packet to node Ni. This acknowledgement packet holds the level number of node Ni−1 and the values of t1, t2, and t3, and node Ni
receives the packet at t4. TPSN assumes the delays of synchronization pulse packet and acknowledgement packet are the same, so t4 is equal to (t3− ∆ +D). Assuming that the clock drift and the propagation delay do not change in this small period of time, node Ni
can calculate the clock drift and propagation delay using the following formula:
∆ = (t2−t1) − (t4−t3)
2 ;D = (t2−t1) + (t4−t3)
2 (3.1)
Node Nican therefore synchronize its local clock to Ni−1's since it has information about the clock drift between them.
Figure 3.1: Pair-wise synchronization of TPSN. t2 and t3 are measured in node Ni−1's clock, and t1and t4are measured in node Ni's clock
3.1.2 TPSN Analytical Model
We analyze the synchronization error in TPSN, and develop its analytical model. As shown in Figure 3.2, the TPSN synchronization error is composed of three error com-ponents: pair-wise synchronization error (Esync) caused by the delay estimation when a
12 CHAPTER 3. MECHANISMS AND ANALYTICAL MODELS Esync: one-way delay estimation error
during pair-wise synchronization
Eext: clock drifts due to clock skews in intermediate nodes’ clocks
Eint: clock drift in target’s local clock
Time
Figure 3.2: TPSN synchronization error decomposed into three error components parent node is exchanging the global clock value with its one-hop child nodes, external clock skew error (Eext) caused by clock skews of intermediate nodes on the transmission path while they are forwarding the synchronization message from the root node and the target node, and internal clock drift error (Eint) caused by clock skew of the target node as its local clock drifts away from the most recent synchronization time point:
Et psn=Esync+Eext+Eint (3.2)
The pair-wise synchronization error (Esync) comes from TPSN's assumption that sending delay of synchronization pulse packet and that of acknowledgement packet are the same.
However, in real deployment, the forward and reverse link delays can be asymmetric.
This leads to incorrect calculation of the clock drift value, i.e., ∆ in Equation 3.1. Denote the average time difference between the forward link delay and reverse link delay as u. At the end of each pair-wise synchronization (i.e., t4 in Figure 3.1), the asymmetric link delay will cause the clocks between the parent and child nodes to be off by u2 (on average). Consider a target node at level l, since there are l number of such pair-wise synchronization occurred between pairs of intermediate nodes on the path between the root node and the target node, the total synchronization error is the sum of all pair-wise
3.1. TPSN (CLOCK-SYNC) PROTOCOL 13
synchronization errors on that path. It can be written as follows.
Esync= l · u
2 (3.3)
The external clock skew error (Eext) is caused by clock skews of intermediate nodes as the sync message (containing the global clock) is pushed from the root node down the hierarchy to target nodes. Since each pair-wise synchronization takes some amount of processing and transmission time, this hop latency needs to be accounted for by each intermediate node using its local clock, added to the global clock, and then passed it down the hierarchy. This clock skew error is external in the sense that the error is not contributed by the target node, but rather clock skews from these external intermediate nodes. Denote the average clock skew (i.e., clock drift rate) on any non-root nodes as r.
Denote the average hop latency time for a pair-wise synchronization as d. At the end of each pair-wise synchronization (i.e., t4 in Equation 3.1), clock skew will cause the clock on an intermediate node to drift apart on average by (d ·r) from the global clock. Consider a node on level l, since there are l number of pair-wise synchronization occurred on the path between the root node and the target node, the external clock skew error is the sum of clock skews on that path.
Eext =l · d · r (3.4)
The internal clock drift error (Eint) is caused by the drift of the clock on the target node between the current time and the most recent synchronization time point. This clock drift error is called internal in the sense that the error is contributed solely by the target node's local clock. Denote this synchronization time interval as T. If the data generation time occurs uniformly over this time interval, the average amount of clock drift away from the global clock (since the last synchronization time point) can be derived as follows.
Eint= r · T
2 (3.5)
14 CHAPTER 3. MECHANISMS AND ANALYTICAL MODELS
The aggregate synchronization error for TPSN (Et psn) is the sum of these three error components. Combining Equations 3.3, 3.4, and 3.5 gives the following equation for Et psn.
Figure 3.3: Event-synchronization of TSS. ACK1 departs at t1 and arrives at t2. Data2 arrives at the sender at t3, and arrives at the receiver at t4. d is the hop latency of Data2 at the sender.
Rather than synchronizing every node's clock to a global clock, TSS [14] estimates and accumulates the hop-by-hop latency. When a data packet arrives at the sink, the packet generation time relative to the sink's clock can be traced back from the accumu-lated end-to-end latency. TSS then determines the relative data generation time to the sink's clock. Wireless links among the nodes are assumed to employ a CSMA/CA-like MAC-layer mechanism where an acknowledgement is sent for each data to assure the reception of the data packet. The hop latency, d, can be estimated using the following
3.2. TSS (EVENT-SYNC) PROTOCOL 15
formula.
d = (t4−t1) − (t3−t2) −EstDACK1 (3.7) As depicted in Figure 3.3, (t4−t1) can be obtained using the receiver's clock and (t3− t2) from the sender's clock. The value of (t3−t2) can be piggybacked on the Data2 packet to the receiver. EstDACK1 is the estimation of the delay of ACK1. We can use the transmission delay to estimate this value, as in Equation 3.8. This estimation ignores some CPU processing time and the propagation delay.
EstDACK1= ACK1 packet size
bandwidth (3.8)
With the above information, the hop latency d of Data2 at the receiver node can be cal-culated. Immediately, the latency can be accumulated and carried along with the data packet. To estimate the hop latency, each node needs to keep two extra states: the ACK departure time and the ACK arrival time of the latest data packet. When a data packet is ready to be sent but cannot nd the state information to be piggybacked, e.g. the rst ow of packets, an additional overhead will be sent in order to set up the state information.
3.2.2 TSS Analytical Models
We analyze the synchronization error in TSS and develop its analytical model. The ana-lytical model is similar to that of TPSN, composing of three components shown in Figure 3.4: pair-wise synchronization error (Esync) caused by the delay estimation on its trans-mission path, external clock skew error (Eext) caused by clock skews of intermediate nodes while they are forwarding data packets from the source node and the sink node, and internal clock drift error (Eint) caused by the clock skew of the target node as its local clock drifts between the arrival time of a packet and the arrival time of its subsequent packet carrying its end-to-end delay.
Etss=Esync+Eext+Eint (3.9)
16 CHAPTER 3. MECHANISMS AND ANALYTICAL MODELS
Esync: one-way delay estimation error
Time Eint: clock drifts due to data packet inter-arrival time at the target node
P
Figure 3.4: TSS synchronization error decomposed into three error components.
The pair-wise synchronization error (Esync) comes from hop delay estimation in TSS. TSS assumes that the ACK packet transmission time ((t3−t2) in Figure 3.3) can be estimated according to Equation 3.8. However, in real deployment, other small delay factors such as the protocol processing time are not considered. As a result, TSS has the delay estimation error. Denote the average delay estimation error as u. Consider a data packet with a path-length of l between a source node and a sink node. Since there are l numbers of such forwarding hops, the total pair-wise synchronization error is the sum of all pair-wise synchronization errors on that path. It can be written as follows.
Esync=l · u (3.10)
The external clock skew error (Eext) is caused by clock skews of intermediate nodes as the data packet is forwarded from a source node to a sink node, and its per-hop delays are accumulated in the subsequent data packet. Denote the average per-hop delay time as d.
At the end of each hop transmission, clock skew will cause the clock of an intermediate node to drift apart on average by (d · r) from the global clock. Consider a data path of length l. The total external clock skew error is the sum of individual clock skew error over these l intermediate nodes. It can be written as follows.
Eext =l · d · r (3.11)
3.3. COMPARISON OF ANALYTICAL MODELS OF TPSN AND TSS 17
The internal clock drift error (Eint) is caused by the clock drift of the sink node between the arrival time of a data packet (e.g., Data2 packet) and the arrival time of the previous data packet (e.g., Data1 packet) carrying the accumulative hop-by-hop delay of the previous packet (e.g., Data1 packet). This clock drift error is internal in the sense that the error is contributed solely by the sink node's local clock. Denote the average inter-arrival time of a packet stream as P. The amount of clock drift from the packet inter-arrival times can be derived as follows.
Eint =r · P (3.12)
The aggregate synchronization error for TSS (Etss) is the sum of these three error compo-nents. Combining Equations 3.10, 3.11, and 3.12 gives the following equation for Etsss.
Etss=l(u + r · d) + r · P (3.13)
3.3 Comparison of Analytical Models of TPSN and TSS
In the analytical models of TPSN and TSS, we have found that they both have three identical error components. The rst one is the protocol-specic hop delay estimation error (Esync). In TPSN, this comes from the asymmetry of packet exchange between two nodes. In TSS, this is the propagation delay of an acknowledgement packet.
The second component is the clock skews (Eext) over the end-to-end delay. When the sync message propagates through the network, the time that this information stays on each intermediate node would contribute some errors from the clock skews. In TSS, this is the end-to-end delay of each data packet from a source node to a sink node. In TPSN, it is the end-to-end delay of each sync message from the root node to a target node.
The third component is the amount of local clock drift (Eint) over the last synchro-nization point. In TPSN, synchrosynchro-nization is done periodically, so the amount of local
18 CHAPTER 3. MECHANISMS AND ANALYTICAL MODELS
clock drift is proportional to how fast the network is re-synchronized. Interestingly, this error also shows up in TSS. Because the clocks in TSS are synchronized by the acknowl-edgement packets, there are also time intervals between the times when the clocks are synchronized and when the local clocks are being used. If the source nodes send data packets in a constant rate, this time interval will basically be the interval of sending data.
Chapter 4 Simulation
TPSN and TSS were implemented on the ns-2 simulator [5]. We describe the details for the simulation setup, evaluation metrics (error and overhead), and evaluation variables (network size, node mobility level, and trafc volume). Based on the analytical models derived in Chapter 3, we analyze the impacts of changing these evaluation variables on the evaluation metrics. We also veried the analytical model by the simulation results.
4.1 Simulation Setup
In all simulations, the sensor nodes are placed on a predened grid in a uniformly random fashion. The data sink is xed in one corner of the grid, while other nodes are randomly chosen as data sources. The communication range of all nodes is set to be 40 meters. Each
In all simulations, the sensor nodes are placed on a predened grid in a uniformly random fashion. The data sink is xed in one corner of the grid, while other nodes are randomly chosen as data sources. The communication range of all nodes is set to be 40 meters. Each