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IEEE JOURNAL OF QUANTUM ELECTRONICS, VOL. 46, NO. 9, SEPTEMBER 2010 1301

CMOS-MEMS Based Optical Electrostatic Phase

Shifter Array With Low Driving Voltage and High

Fill Factor

Jin-Chern Chiou, Chen-Chun Hung, and Li-Jung Shieh

Abstract—This work develops a novel 4 4 optical phase shifting micromirror array that achieves a 4 vertical displace-ment and makes the mirror peak-to-valley deformation within 10 (514 nm light source). Each individual micromirror pixel is controllable and driven by an electrostatic parallel plate actuator. The mirror reflective surface is an aluminum layer with a high optical reflectivity exceeding 90%. This device achieves a high fill factor of more than 90% without an additional flip-chip bonding process due to the parallel plate actuator and the hidden suspen-sion beam structures. The phase shifter array is fabricated using the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 m 2p4m CMOS process and post-CMOS process. An in-house post-process is utilized to reserve a 40 m thick bulk-sil-icon under the 200 m 200 m mirror. This eliminates mirror deformation from residual stress after the device is released. The micromirror demonstrates a vertical displacement of 4 at only 3 V and the resonant frequency is 3.6 kHz. Industry can use this phase-shifting micromirror array as a spatial light modulator in holographic data storage systems in the future.

Index Terms—CMOS MEMS, MEMS, micromirror, MOEMS, phase shifter.

I. INTRODUCTION

O

PTICAL MEMS have flourished over the last decade by leveraging IC micro-fabrication technology [1]. Their ap-plications include projection displays [2], optical scanners [3] and imaging systems [4]. Among these devices, optical phase shifter plays an important role in the light-diffraction interfer-ence. If a phase shifter can be operated in in-phase mode (0 phase difference) and out-of-phase mode (180 phase differ-ence) respectively, the capacity of a holographic data storage system can be increased in double. Furthermore, this capacity

Manuscript received November 09, 2009; revised January 04, 2010. Current version published September 29, 2010. This work was supported in part by Ministry of Economic Affairs, Taiwan, R.O.C., under contract 97-EC-17-A-07-S1-011, in part by the National Science Council, Taiwan, R.O.C., under contracts NSC-98-2220-E-009-014, NSC-98-2220-E-009-032, and NSC-98-2218-E-039-001, and in part by Taiwan Department of Health Clinical Trial and Research Center of Excellence under contract DOH99-TD-B-111-004.

J.-C. Chiou is with the Department of Electrical Engineering, National Chiao Tung University, HsinChu 30010, Taiwan, and also with the School of Medicine, China Medical University, TaiChung 40402, Taiwan (e-mail: [email protected]. edu.tw).

C.-C. Hung and L.-J. Shieh are with the Institute of Electrical and Control Engineering, National Chiao Tung University, HsinChu 30010, Taiwan (e-mail: [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/JQE.2010.2043502

will be increased by times when phase shifters are in the system [5], [6].

Among the existing actuation methods for MEMS mirrors that were previously proposed are included electrostatic, piezo-electric and thermal. Electrostatic actuation is the most widely used method in micromachined mirrors [7]–[10]. The main benefit of electrostatic actuation is its low power consumption and capability for sub-micrometer displacement in optical devices. Furthermore, unlike piezoelectric devices, electrostatic devices are compatible with the CMOS process [11], [12]. Interferometry using an electrostatic driven microactuator can precisely control displacements in the nanometer range, and the required actuation force is usually low [13]. Recently, many electrostatic actuation methods have been developed, such as the parallel plate, lateral comb drive and vertical comb drive structures. Vertical out-of-plane motion micromirrors with a parallel plate electrostatic actuator have a nonlinear phenom-enon, called pull-in, which severely constrains the stable region at one-third the length of the gap [14], [15]. Electrostatic comb drive actuators were developed to avoid pull-in. However, a drawback of electrostatic actuators is its high driving voltage which is not suitable for portable devices.

In general, surface flatness is an important issue when de-signing MEMS mirrors. Micromirrors made of thin film mate-rials usually have a curved surface due to residual stress once the structure is released [16], [17]. Stress-induced out-of-plane de-formation must be small compared to the optical wavelength to avoid adversely affecting device performance. Thus, a number of methods have been proposed to eliminate curvature or re-duce residual stress of the micromirrors. For example, a thick bulk-silicon micromirror fabricated via DRIE process can over-come the nonplanarity of thin film CMOS microstructures [18]. Moreover, bombarding the microstructure surface with ions is also a method of modifying the residue stress gradient [19], [20]. In addition to mirror flatness, fill factor also plays an important role in optical applications. Previously reported micromirror arrays with a low fill factor resulted in low optical efficiency [21], [22]. In order to achieve an effectively high fill factor, driving and suspension mechanisms usually must be placed under the mirror plate. The most famous example is the Texas Instruments Digital Light Processor (TI DLPTM) mirror system that has a complicated superstructure to obtain a high fill factor in projection display application [23]. Besides, ad-ditional assembly process such as flip-chip bonding technique is also utilized to place the mirror plate on top of the actuator stage [24]–[27].

In order to overcome the above-mentioned drawbacks in fabricating micromirror, this work develops an optical phase

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Fig. 1. The cross-section view of the TSMC CMOS MEMS process.

shifting micromirror array that can achieve a vertical displacement and a mirror peak-to-valley deformation within . The fill factor is about 90% without additional flip-chip bonding process. Electrostatic actuators are employed to drive each individual mirror pixel. The standard CMOS process and in-house post-CMOS process are utilized to fabricate the device. The following sections describe device design, present theoretical analysis and simulation results, and provide fabrication details. Experimental results demonstrate that the micromirror had a vertical displacement of at only 3 V and resonant frequency of 3.6 kHz.

II. DESIGNCONCEPT

The optical phase-shifting micromirror array is fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) standard 0.35 2p4m (double polysilicon quadruple metal) CMOS process [28]. Fig. 1 depicts the cross-section view of the TSMC CMOS MEMS process. The micromirror is designed to achieve a vertical displacement for a 514 nm wavelength light source. Fig. 2 illustrates the schematic drawings of an individual electrostatic driven mirror pixel. It consists of a 200 200 micromirror surface structure, suspension beams, net electrode, pillar-shape joiners, and proof mass. The micromirror is supported by two suspension beams and formed by metal 4 (M4), as shown in Fig. 2(a). The mirror reflective surface is an aluminum metal layer with high optical reflectivity exceeding 90%. The suspended beams are designed to be under the mirror plate. One end of the beam is fixed to an anchor and the other end is attached to the micromirror.

An electrostatic parallel plate actuator drives the mirror. The top electrode is the mirror plate and the bottom electrode is a net electrode. The net electrode is a clamped-clamped suspen-sion structure, which acts as a stator. It is composed of M2, M3, and a tungsten layer between M2 and M3. The gap between mirror plate and net electrode is 1 , and one-third of the gap is larger than the desired micromirror motion displacement (128 nm). Therefore, the pull-in phenomenon can be avoided

by applying a proper driving voltage. A 40 -thick bulk-sil-icon under the micromirror is reserved for reducing mirror de-formation due to residual stress after the structure is released [29]. In order to connect the mirror plate and silicon proof mass, pillar-shape structures are designed for connectors, as shown in Fig. 2(b). The pillar-shape structure comprises all metal layers and tungsten via layers besides M4. The mirror and pillars act as a rotor. Fig. 2(c) shows stereo drawing of the whole mi-cromirror structure. The pillars pass through the net electrode; thus, the rotor does not touch the stator. When voltage is applied between the stator and rotor, the electrostatic force pulls the mi-cromirror downward. Thus, the multilayer structure provides vertical motion capability. The micromirror array achieves a high fill factor of more than 90% without an additional flip-chip bonding process because of the parallel plate actuator and the hidden suspension beams.

III. THEORETICALANALYSIS ANDFEM SIMULATION A. Static Behavior

Vertical motion of an electrostatic parallel plate actuator oc-curs when a driving voltage is applied between the top and bottom electrodes. The electrostatic force is given by

(1) where is the capacitance between the electrodes, is the ver-tical displacement along the actuation direction, and is the applied DC bias voltage. For a parallel plate actuator, the ca-pacitance varies with vertical displacement. Thus can be ex-pressed as

(2) where is the dielectric constant in the air, is the overlap area of top and bottom electrodes, and is the gap between

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CHIOU et al.: CMOS-MEMS BASED OPTICAL ELECTROSTATIC PHASE SHIFTER ARRAY WITH LOW DRIVING VOLTAGE AND HIGH FILL FACTOR 1303

Fig. 2. The schematic of an individual mirror pixel: (a) top view; (b) cross-section view; (c) stereopicture of the micromirror.

electrodes. By summarizing (2) and (1), electrostatic force can be rewritten as a function of applied voltage and shown in (3)

(3) According to spring design of the proposed device, the mi-cromirror is considered to follow Hooke’s law. While assuming the micromorror is driven by an electrostatic force along the

driving direction, the relationship between displacement and the reaction force in the driving direction can be expressed as

(4) where represents the equivalent spring stiffness of the mi-cromirror in the driving direction and represents the ment caused by the electrostatic force. In our case, the displace-ment is equal to , and the equivalent stiffness is the sum-mary of stiffness of two cantilever springs. Since (3) equals to (4) which yields (5) that specifies the relationship between moved displacement and driving voltage in the direction

(5) In the present case, is a constant value of 1 (distance be-tween M3 and M4), is square measure of net electrodes, is spring constant of cantilever springs, and is the dielectric con-stant in the air. Based on (5), when the displacement is achieved 128 nm ( ), the relative driving voltage is about 2.6 V.

To understand the static behaviors of the device, a FEM simulator, IntelliSuite, is utilized to simulate micromirror deformation and displacement. Fig. 3 displays the simulation result of the actual dimension micromirror model with a driving voltage of 3 V. Micromirror displacement is clearly of the same with the free end of the suspension beams. That is, deformation of the suspension beams induced by the electrostatic force can fully pass to the micromirror and lead to a vertical levitation of the micromirror. Fig. 4 plots micromirror displacement versus driving voltage. The simulation result demonstrates that the micromirror can achieve a 128 nm ( ) vertical displacement when applied voltage is about 2.7 V. Moreover, the pull-in voltage is about 4.5 V according to the simulation result. B. Resonant Frequency

A simplified theoretical model is utilized to calculate the res-onant frequency of the proposed micromirror device. Deforma-tion of the suspension beams which induced by an electrostatic force lead to a vertical levitation of the micromirror. Thus, the device model is similar to that of a clamped-clamped beam with a center mass, as illustrated in Fig. 5. The fundamental resonant frequency of the equivalent model is expressed as [30]

(6) where is the number of layers in the suspension beam; and are the Young’s modulus and the moment of inertia of each layer, respectively; and are the length and the mass of the equivalent clamped-clamped beam, respectively; and is micromirror mass. The theoretical resonant frequency derived by (6) is 3.94 kHz. Moreover, resonant frequency is also simu-lated using IntelliSuite. Notably the FEM simulations only re-quire suspension beams and micromirror to calculate the res-onant frequency. The simulation result indicates that the fun-damental resonant frequency is about 4.14 kHz and the mode

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Fig. 3. The deformation of the actual micromirror model with 3 V DC bias voltage.

Fig. 4. The simulation result ofZ-axis displacement versus driving voltage.

Fig. 5. The diagram of clamped-clamped beam with a center mass.

shape is vertical motion. These results can be used as the refer-ence data in actual experimental measurements.

IV. FABRICATION

The designed phase shifter device was manufactured using the TSMC 0.35 2p4m CMOS process that was provided by the National Chip Implementation Center (CIC) [28] and a self-designed post-CMOS process. The CMOS process consists of two polysilicon layers, four metal layers, three via layers, and

several dielectric layers. All metal layers are made of aluminum and the contact/via holes are filled with tungsten plugs. The di-electric layers are silicon dioxide and the passivation layer in-cludes silicon dioxide and silicon nitride. The etched holes are filled with silicon dioxide. In order to fabricate a flat plane sur-face, chemical mechanical polishing (CMP) is employed after each deposition layer is completed.

A notable device releasing issue is that the passivation window of the MEMS structure must be opened in advance of the post-process. The self-designed post-CMOS process is applied to reserve a bulk silicon mass for reducing mi-cromirror deformation and release the suspended structures. The post-process includes one grinding process, one backside alignment lithography process, a 2-step backside inductively coupled plasma (ICP) etching process, and an HF vapor re-leasing process. Fig. 6 illustrates the post-process flow. The post-process is implemented using the following steps:

a) The post-process starts with the device fabricated after the CMOS foundry process with the passivation window already open as shown in Fig. 6(a). The open-window step is implemented during the foundry process.

b) A backside grinding process is utilized to grind down the silicon substrate thickness, reserving only 100 for economic considerations to save expense and time for the ICP etching process, as shown in Fig. 6(b).

c) After that, a backside lithography process is applied to define the proof mass area, and then PI tape is used to protect the peripheral area of the chip from ICP etching, as illustrated in Fig. 6(c).

d) Then the first anisotropic ICP etching step is conducted to etch the silicon substrate for proof mass reservation, in which PR and PI tape are used as the hard mask, as illustrated in Fig. 6(d).

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CHIOU et al.: CMOS-MEMS BASED OPTICAL ELECTROSTATIC PHASE SHIFTER ARRAY WITH LOW DRIVING VOLTAGE AND HIGH FILL FACTOR 1305

Fig. 6. Post-CMOS fabrication process flow: (a) completion of the CMOS process; (b) reserving only 100m of silicon by grinding process; (c) defining proof mass area by backside lithography process; (d) first backside ICP etching step; (e) second backside ICP etching step; (f) HF vapor etching process to release suspended microstructures.

Fig. 7. SEM pictures of the proposed micromirror phase shifter: (a) 42 4 mirror array; (b) an individual mirror pixel; (c) the silicon proof mass under the mirror plate; (d) the etching holes and hollows on the mirror; (e) the pillar structure; (f) the net electrode under the mirror plate.

e) Fig. 6(e) depicts the second step of the ICP etching process. In this step, PR is removed by PR stripper but the PI tape is reserved for the second mask instead of PR. Although the ICP process etches the PI tape, the tape extends the etching time to form the proof mass. In this etching step, silicon dioxide is utilized as the etching stop layer since the etching selectivity of silicon dioxide is significantly higher than that of PI tape.

f) To prevent the micromirror from sticking problem during wet etching release process, as shown in Fig. 6(f), an HF vapor etching process is used to release the micromirror

structure in the final step. The dry etching process is per-formed by heating 49% HF liquid to produce HF vapor which is utilized to etch SiO . Since the device was fab-ricated by CMOS process, the compositions of the four metal layers are not pure Al, but the alloy of Al, Cu, and Si. The etching selectivity between and Al is very large that we can use HF vapor process to release our de-vice [31]. At first, the dede-vice chip is placed in a sealed limpid space. In the space there is a vessel with 49% HF liquid. A tungsten lamp is placed upon the sealed limpid space with 10 cm height. When the HF liquid is heated

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Fig. 8. X-direction surface flatness of the micromirror device.

to 45 by tungsten lamp irradiation, the sealed space is full of HF vapor. Finally, the silicon dioxide is etched by HF vapor and device structures are released. The experi-mental release time in this case is about 12 minutes. Fig. 7 displays SEM images of the device fabricated using the CMOS process and post-CMOS processes. Fig. 7(a) shows the 4 4 mirror array combined phase shifter device and an individual pixel is shown in Fig. 7(b). The proof mass design is clearly displayed in Fig. 7(c) and it can effectively reduce the residual stress from the CMOS surface process. The etching holes, pillars and net electrode of the micromirror are shown in Fig. 7(d) to (f), respectively. The hollows in Fig. 7(d) are due to violations of the CMOS design rule.

V. EXPERIMENTALRESULTS A. Flatness of the Micromirror

Micromirror phase shifter flatness is a very important decisive factor for diffraction quality and its applications. In the surface MEMS fabrication process, the bending phenomenon of mirror is common seen due to the residual stress. In this experiment, the micromirror surface is scanned at a 200 range in the - and -directions, respectively. Fig. 8 shows the -direction roughness scanned at a 200 distance from one side, passing through the mirror center to the other side. The regular cavity profiles shown in Fig. 8 are due to the pillar structures which

are formed by stacks of four metal layers and three via struc-tures. The measurement shows that only slight deformation oc-curs in the edge of micromirror because there are no pillar con-nections in the edge of micromirror. Excepting the pillar cavi-ties, the mirror deformation is only about 48 nm and within (51 nm). Deformation induced by the residual stress from the CMOS process is effectively decreased due to reserving proper silicon proof mass. A similar scanning result is obtained for the -direction. Thus, mirror peak-to-valley deformation totally fits design specifications. Note that after completed the released process, each mirror pixel is positioned at different elevation due to the different stiffness of the suspension beams. Considering with whole flatness of the micromirror array, each micromirror is designed to be driven by individual driving voltage so that we can balance each mirror elevation to achieve flatness purpose by individual offset voltage.

B. Static Characteristic Measurement

Fig. 9 shows the experiment setup for static characteristic measurement. In this experiment, the WYKO interferometer is used again to measure the vertical distance moved by cor-responding driving voltage. A DC bias voltage provided by the power amplifier is utilized to actuate the micromirror. Fig. 10 compares simulation and measurement results of a single mirror for vertical displacement versus driving voltage.

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CHIOU et al.: CMOS-MEMS BASED OPTICAL ELECTROSTATIC PHASE SHIFTER ARRAY WITH LOW DRIVING VOLTAGE AND HIGH FILL FACTOR 1307

Fig. 9. The experimental diagram of static characteristic measurement.

Fig. 10. The static characteristic of the micromirror.

Fig. 11. The frequency response of the micromirror.

The experimental results demonstrate that vertical motion of the micromirror can achieve a 128 nm displacement ( of the 514 nm light source) when a 3 V driving voltage is applied to the actuator. The vertical displacement of the micromirror of 0~128 is obtained by increasing the driving voltage from 0 to 3 V. Thus, the requirement of displacement can be easily reached with less than 5 V driving voltage. The low driving voltage characteristic gives the device potential to integrate with a CMOS circuit on one chip.

C. Frequency Response Measurement

Fig. 11 shows the frequency response of the micromirror de-vice measured using a MEMS Motion Analyzer (MMA). The micromirror is biased by a sinusoidal wave with voltage ampli-tude of 0.5 V, and the frequency ranges between 1.5 and 5.5 kHz. The first resonant frequency mode is measured at 3.60 kHz, which closely matches the calculation (3.94 kHz) and simu-lation (4.14 kHz) results. The error is due to variations in the CMOS fabrication process and post-process. The quality factor of the mirrors is calculated at 24 in air.

VI. CONCLUSIONS

This study presents a 4 4 electrostatic phase shifter mi-cromirror array fabricated by TSMC 0.35 2p4m CMOS process and the self-designed post-CMOS process. By means of the special net electrode design under the mirror, the mi-cromirror array has a fill factor of more than 90%. Individual mirror pixels are 200 200 . Mirror deformation re-sulting from residual stress of the CMOS process is effectively decreased via a proof mass reservation design. To prevent the device from the side sticking phenomenon in a wet etching re-lease process, this device is rere-leased by HF vapor etching tech-nique. The design, modeling, simulation and measurements are presented. Preliminary measurement results demonstrate that the micromirror can achieve a 128 nm ( ) vertical displace-ment with a driving voltage of 3 V and the resonant frequency is 3.6 kHz. With the advantages of a high fill factor and low driving voltage, the phase-shifting micromirror array has potential as a spatial light modulator in holographic data storage systems in the future.

ACKNOWLEDGEMENTS

The authors would like to thank the Taiwan National Chip Implementation Center (CIC) for technical supports.

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Jin-Chern Chiou received the M.S. and Ph.D.

de-grees in aerospace engineering science from the Uni-versity of Colorado at Boulder, in 1986 and 1990, respectively.

Before joining the Department of Electrical Engi-neering, National Chiao Tung University, HsinChu, Taiwan, in 1992, he worked at the Center for Space Structure and Control, University of Colorado, as a Research Associate. His research interests include micro-electro-mechanical systems (MEMS), bio-sensors, servo control, and modeling and control of multibody dynamic systems (MBD). Currently, he is a Professor with the Department of Electrical Engineering, National Chiao Tung University, the Director of the Biomedical Engineering Research and Development Center, China Medical University, Shenyang, China, and the task force leader of the National Science and Technology Program for SOC.

Dr. Chiou is the co-author of advanced reference books on CD-ROM system technology and mechanics and control of large flexible structures. He holds 10 U.S. patents (7 pending), and 8 R.O.C. patents (4 pending). He has received awards from the Acer Foundation, the Y. Z. Hsu Foundation, the Taiwan In-formation Storage Association (TISA), the NCTU, National Science Council, Taiwan, and the Chinese Institute of Engineers (Distinguished Engineering Pro-fessor Award) for his outstanding MEMS and bio-technology research.

Chen-Chun Hung received the B.S. degree in

auto-matic control engineering from Feng Chia University, Taichung, Taiwan, in 1998, and the M.S. degree from the Department of Engineering and System Science, National Tsing Hua University, HsinChu, Taiwan, in 2003, respectively. He is currently working towards the Ph.D. degree at National Chiao Tung University. His research interests are in the areas of SOG process MEMS decoupling actuator, and CMOS-MEMS actuators and micro hot embossing biomedical sensor.

Li-Jung Shieh received the B.S. degree in automatic

control engineering from Feng Chia University, Taichung, Taiwan, in 1997, and the M.S. degree from the Department of Engineering and System Science, National Tsing Hua University, HsinChu, Taiwan, in 2004, respectively. He is currently working towards the Ph.D. degree at National Chiao Tung University.

His research interests are in the area of CMOS-MEMS sensors and actuators.

數據

Fig. 1. The cross-section view of the TSMC CMOS MEMS process.
Fig. 2. The schematic of an individual mirror pixel: (a) top view; (b) cross- cross-section view; (c) stereopicture of the micromirror.
Fig. 3. The deformation of the actual micromirror model with 3 V DC bias voltage.
Fig. 6. Post-CMOS fabrication process flow: (a) completion of the CMOS process; (b) reserving only 100 m of silicon by grinding process; (c) defining proof mass area by backside lithography process; (d) first backside ICP etching step; (e) second backside
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