A FIFO-based buffer management approach for the ATM GFR services

IEEE COMMUNICATIONS LETTERS, VOL. 4, NO. 6, JUNE 2000 205

A FIFO-Based Buffer Management Approach for the

ATM GFR Services

Chia-Tai Chan, Shuo-Cheng Hu, Pi-Chung Wang, and Yaw-Chung Chen, Member, IEEE

Abstract—We investigate the TCP packet transmission over the ATM Guaranteed Frame Rate (GFR) service using a selective packet-discard with buffer vacancy tracking strategy and a packet-based push-out buffering scheme. Our approach is based on FIFO queueing discipline, it features fair sharing of available resources as well as feasibility in hardware implementation.

Index Terms—Packet-based push-out buffering scheme, selec-tive packet-discard.

I. INTRODUCTION

G

UARANTEED Frame Rate (GFR) has recently been stan-dardized by the ATM Forum. It is expected to be useful for TCP/IP based application. The GFR is intended to provide a minimum rate guarantee to VC’s at the frame level. In addition, a connection sending in excess of the minimum rate should re-ceive a fair share of any unused network capacity. The design of a simple and efficient buffer management approach for ac-commodating GFR service requirements is an important issue toward the successful development of GFR.

Fair queueing disciplines [1] such as weighted fair queueing (WFQ), virtual clock, packet-by-packet generalized processor sharing (PGPS), and self-clocked fair queueing (SCFQ) have high processing overhead for tracking the progresses of tasks. It has been suggested in [8] that a simple rate-guaranteeing discipline (i.e., Weighted Round Robin) with per-VC queueing is indeed necessary to ensure GFR service. However, the per-VC queueing (i.e., each virtual connection uses separate queue) greatly complicates the switching system design. The effective throughput of TCP over ATM networks may be unsatisfactory because packet fragmentation may result in wasted bandwidth for transmitting those cells of corrupted packets, in which at least one cell is dropped, and the packet has to be retransmitted [2]–[4]. The Fair Random Early Drop (FRED) [6], a modified version of RED, uses per-active-flow accounting to provide better protection than RED. However, FRED does not address the packet fragmentation problem. It has been demonstrated that the packet-discard strategies, i.e., early packet discard (EPD) and partial packet discard (PPD), prevent packet fragmentation problem. In this work, we propose a feasible FIFO buffering scheme that provides

Manuscript received July 13, 1999. The associate editor coordinating the re-view of this letter and approving it for publication was Prof. N. B. Shroff.

C.-T. Chan is with the Telecommunication Laboratories, Chunghwa Telecom Company, Ltd, Taipei 106, Taiwan, R.O.C. (e-mail: [email protected]). S.-C. Hu, P.-C. Wang, and Y.-C. Chen are with the Department of Computer Science and Information Engineering, National Chiao Tung University, Hsinchu, Taiwan, R.O.C. (e-mail: {[email protected]; [email protected]; [email protected]).

Publisher Item Identifier S 1089-7798(00)05693-3.

the requirements of GFR service. The merit of the proposed approach is the efficient and fair sharing of network resources with a feasible implementation method for ATM GFR services. The organization of this paper is as follows. In Section II, we present the functional approach of the proposed scheme. The implementation architecture is discussed in Section III. Section IV concludes the work.

II. PACKET-DISCARDPUSH-OUTCONTROLAPPROACH

Our approach consists of a selective packet-discard with buffer-vacancy tracking strategy and a packet-based push-out buffering scheme (abbreviated as PDPO here after). The latter ensures the fair sharing of the network resources and prevents misbehaved connections from occupying excessive buffer space, while the former avoids the packet fragmentation problem and improves the TCP throughput [5].

A. Selective Packet-Discard with Buffer-Vacancy Tracking Strategy

Assume that an ATM switch has an output FIFO queue of size (in cell units), and the maximum packet size is cells. The switch maintains a variable to track the buffer vacancy, and a variable to count the incoming packet length for the virtual connection . Initially, the switch sets to and ( ) to zero, where is the number of VC’s. Whenever a cell is transmitted, will be incremented by one. If , the first cell of an arriving packet will be admitted and will be set to . Otherwise, the cell and all sub-sequent cells of the same packet will be dropped. When the first cell of a packet from is admitted, the switch starts to count up until the last cell is received, then is updated to . The switch can identify the last cell of an in-coming packet by checking the ATM-layer user-to-user (AUU) indication bit. By tracking the buffer vacancy, the buffer utiliza-tion can be improved and the packet fragmentautiliza-tion problem can be avoided.

B. Packet-Based Push-out Buffering Scheme

A flow can acquire larger service rate by sending more traffic to keep higher occupancy of the FIFO buffer. To guarantee fair bandwidth sharing, it should either admit or discard the arriving packet according to the fairness requirement. A switch can use per-VC accounting (i.e., keep a separate record for each VC) to realize the dynamic buffer sharing. Let be the bandwidth available in an output port, and be the requested service rate of , where . Using FIFO queueing, the service rate

206 IEEE COMMUNICATIONS LETTERS, VOL. 4, NO. 6, JUNE 2000

can be achieved if keeps an average buffer occupancy of cells, where

(1)

That means the service rate experienced by will be at least , therefore we set a threshold for ,

.

Let be the number of cells of in the FIFO buffer. When the first cell of a packet arrives, it is admitted if

. If and , it activates

the push-out process. The packet discard controller selects a VC with the maximum value of ( ) and pushes out its last packet, whose length is then added to . The push-out process repeats until . By using the push-out scheme, a switch can ensure fair sharing of the band-width through FIFO queueing.

In [5], it has been demonstrated that the proposed strategy not only provides the service requirements of GFR, but also brings the TCP throughput to its optimal level. Although the push-out process complicates the buffer management, it achieves fair sharing of the network resource and improves the total TCP throughput because it reduces the number of packet retransmissions. Moreover, the selective packet-discard strategy using buffer-vacancy tracking increases the buffer utilization that leads to the improvement of TCP throughput. The detailed discussion of the resulting performance has been shown in our previous work [5].

III. REALIZATION OFPDPO

The proposed PDPO approach can be realized using an archi-tecture consisting of four major function components, a packet-discard controller (PDC), a cell dispatcher (CD), a stack con-troller (SC) and a push-out concon-troller (POC), as shown in Fig. 1. The PDC performs two tasks: discarding the incoming packets when there is no buffer vacancy and manipulating the control variables ( ) and . The POC consists of many modules for storing the cells’ PA’s, and performs FIFO queueing and put-out process. The purpose of the SC is to main-tain the address of illegal packets of VC’s. An arriving packet of is defined as legal if . It will be ac-cepted if there is enough buffer space for the whole packet (i.e.,

), otherwise, it will be discarded. The variable is used to activate/deactivate both POC and SC for . Once the first cell of a new packet arrives, if , the physical addresses (PA’s) of all packet cells must be stored into the associated stack for possible push-out operation later, be-cause the packet may be illegal. To maintain stacks, the PDC immediately activates the SC to clear the corresponding stack if , because these associated cells become legal and therefore cannot be discarded.

An arriving cell is classified by the PDC, then written into the cell pool. Prior to this process, the cell’s PA is stored into the POC. If the arriving cell is illegal, the associated stack number (SN) will be extracted by the CD and its PA is pushed into the associated stack. Once the POC receives a push-out signal, it

Fig. 1. Implementation architecture of the proposed traffic controller.

triggers the SC to pop packets out from the stack which has the largest number of illegal packets. Each time the push-out process is activated, at least one packet will be popped out and the total popped-out cells must be no less than L cells, then PA’s of these popped-out cells will be released to the idle-address pool. A packet indication bit for identifying the last cell’s PA is attached to each entry in a stack.

Once the SC pops the last cell of a packet, it continues to pop other cells of the same packet. The number of popped cells must be sent to the PDC to update the NC value. In addition, it is possible to pop out a partial packet because the remaining packet cells may be still on the way. The SC must inform the PDC to discard the subsequent cells of the popped packet and update . Since SC needs comparisons to determine the maximum value of , to reduce the complexity, SC maintains the Max_Stack information of the longest stack. If the cell’s PA of an arriving packet were stored into its associ-ated stack, the stack length is then increased and compared with the Max_Stack. Each time the SC pops the stack which has the maximum length, it updates the Max_Stack.

A feasible architecture to implement the POC is shown in Fig. 2 that is modified from [7]. The service discipline of POC is simply FIFO and a cell’s PA is stored in a 16-bit register. The PA of an incoming cell is appended to the POC FIFO. When a head-of-line(HOL) cell is scheduled for transmission, its PA is retrieved from POC to identify the cell location. Once a cell is transmitted, the content of all 16-bit registers will be shifted one position to the right. In the mean time the PA of the transmitted cell is returned to the idle-address pool.

In the push-out process, when a cell’s PA is to be removed, it is broadcasted to all modules. By comparing the PA value, , with the value, , of module ( ), the control logic is able to decide whether to retain or to shift-right the register content. When the control logic receives a newly broadcasted value, it changes to the shift state. Then it evaluates both values of and , and shifts right the contents of those modules with because their positions must be to the left of the pushed-out cell. After the shifting process, the popped PA value can be extracted and written into the idle-address pool.

CHAN et al.: FIFO-BASED BUFFER MANAGEMENT APPROACH 207

Fig. 2. The architecture of the push-out controller.

The proposed implementation architecture has a regular structure that well suits to the VLSI design. The number of virtual connections can grow flexibly since a large cell buffer capacity can be accommodated by cascading the chips. Moreover, by connecting chips in parallel, a large cell pool can be supported. With the implementation proposed in [7], the realization approach should be able to accommodate the real-time cell streams.

IV. CONCLUSIONS

A major concern to transmit TCP traffic over ATM networks is the implementation cost. Although the per-VC queueing may support the quality of service, it complicates the switch design. In this work, we show that it is feasible to achieve the require-ments of GFR service through FIFO queueing. Our proposed PDPO scheme consists of a selective packet-discard strategy and a packet-based push-out buffering scheme, it ensures the fair sharing of network resource and prevents a misbehaved VC from occupying excessive FIFO buffer space, as well as

im-proves the TCP throughput by avoiding the packet fragmenta-tion problem.

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